Lines Matching +full:interrupt +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/interrupt.h>
24 struct regmap *map; member
52 return &data->chip->irqs[irq]; in irq_to_regmap_irq()
59 mutex_lock(&d->lock); in regmap_irq_lock()
66 if (d->chip->mask_writeonly) in regmap_irq_update_bits()
67 return regmap_write_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
69 return regmap_update_bits(d->map, reg, mask, val); in regmap_irq_update_bits()
75 struct regmap *map = d->map; in regmap_irq_sync_unlock() local
81 if (d->chip->runtime_pm) { in regmap_irq_sync_unlock()
82 ret = pm_runtime_get_sync(map->dev); in regmap_irq_sync_unlock()
84 dev_err(map->dev, "IRQ sync failed to resume: %d\n", in regmap_irq_sync_unlock()
88 if (d->clear_status) { in regmap_irq_sync_unlock()
89 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
90 reg = d->chip->status_base + in regmap_irq_sync_unlock()
91 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
93 ret = regmap_read(map, reg, &val); in regmap_irq_sync_unlock()
95 dev_err(d->map->dev, in regmap_irq_sync_unlock()
96 "Failed to clear the interrupt status bits\n"); in regmap_irq_sync_unlock()
99 d->clear_status = false; in regmap_irq_sync_unlock()
107 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock()
108 if (!d->chip->mask_base) in regmap_irq_sync_unlock()
111 reg = d->chip->mask_base + in regmap_irq_sync_unlock()
112 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
113 if (d->chip->mask_invert) { in regmap_irq_sync_unlock()
115 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
116 } else if (d->chip->unmask_base) { in regmap_irq_sync_unlock()
119 d->mask_buf_def[i], ~d->mask_buf[i]); in regmap_irq_sync_unlock()
121 dev_err(d->map->dev, in regmap_irq_sync_unlock()
124 unmask_offset = d->chip->unmask_base - in regmap_irq_sync_unlock()
125 d->chip->mask_base; in regmap_irq_sync_unlock()
129 d->mask_buf_def[i], in regmap_irq_sync_unlock()
130 d->mask_buf[i]); in regmap_irq_sync_unlock()
133 d->mask_buf_def[i], d->mask_buf[i]); in regmap_irq_sync_unlock()
136 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock()
139 reg = d->chip->wake_base + in regmap_irq_sync_unlock()
140 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
141 if (d->wake_buf) { in regmap_irq_sync_unlock()
142 if (d->chip->wake_invert) in regmap_irq_sync_unlock()
144 d->mask_buf_def[i], in regmap_irq_sync_unlock()
145 ~d->wake_buf[i]); in regmap_irq_sync_unlock()
148 d->mask_buf_def[i], in regmap_irq_sync_unlock()
149 d->wake_buf[i]); in regmap_irq_sync_unlock()
151 dev_err(d->map->dev, in regmap_irq_sync_unlock()
156 if (!d->chip->init_ack_masked) in regmap_irq_sync_unlock()
160 * OR if there is masked interrupt which hasn't been Acked, in regmap_irq_sync_unlock()
163 if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) { in regmap_irq_sync_unlock()
164 reg = d->chip->ack_base + in regmap_irq_sync_unlock()
165 (i * map->reg_stride * d->irq_reg_stride); in regmap_irq_sync_unlock()
167 if (d->chip->ack_invert) in regmap_irq_sync_unlock()
168 ret = regmap_write(map, reg, ~d->mask_buf[i]); in regmap_irq_sync_unlock()
170 ret = regmap_write(map, reg, d->mask_buf[i]); in regmap_irq_sync_unlock()
171 if (d->chip->clear_ack) { in regmap_irq_sync_unlock()
172 if (d->chip->ack_invert && !ret) in regmap_irq_sync_unlock()
173 ret = regmap_write(map, reg, UINT_MAX); in regmap_irq_sync_unlock()
175 ret = regmap_write(map, reg, 0); in regmap_irq_sync_unlock()
178 dev_err(d->map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_sync_unlock()
184 if (!d->chip->type_in_mask) { in regmap_irq_sync_unlock()
185 for (i = 0; i < d->chip->num_type_reg; i++) { in regmap_irq_sync_unlock()
186 if (!d->type_buf_def[i]) in regmap_irq_sync_unlock()
188 reg = d->chip->type_base + in regmap_irq_sync_unlock()
189 (i * map->reg_stride * d->type_reg_stride); in regmap_irq_sync_unlock()
190 if (d->chip->type_invert) in regmap_irq_sync_unlock()
192 d->type_buf_def[i], ~d->type_buf[i]); in regmap_irq_sync_unlock()
195 d->type_buf_def[i], d->type_buf[i]); in regmap_irq_sync_unlock()
197 dev_err(d->map->dev, "Failed to sync type in %x\n", in regmap_irq_sync_unlock()
202 if (d->chip->runtime_pm) in regmap_irq_sync_unlock()
203 pm_runtime_put(map->dev); in regmap_irq_sync_unlock()
206 if (d->wake_count < 0) in regmap_irq_sync_unlock()
207 for (i = d->wake_count; i < 0; i++) in regmap_irq_sync_unlock()
208 irq_set_irq_wake(d->irq, 0); in regmap_irq_sync_unlock()
209 else if (d->wake_count > 0) in regmap_irq_sync_unlock()
210 for (i = 0; i < d->wake_count; i++) in regmap_irq_sync_unlock()
211 irq_set_irq_wake(d->irq, 1); in regmap_irq_sync_unlock()
213 d->wake_count = 0; in regmap_irq_sync_unlock()
215 mutex_unlock(&d->lock); in regmap_irq_sync_unlock()
221 struct regmap *map = d->map; in regmap_irq_enable() local
222 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_enable()
223 unsigned int reg = irq_data->reg_offset / map->reg_stride; in regmap_irq_enable()
226 type = irq_data->type.type_falling_val | irq_data->type.type_rising_val; in regmap_irq_enable()
231 * we want to make them into a single virtual interrupt with in regmap_irq_enable()
234 * If the interrupt we're enabling defines the falling or rising in regmap_irq_enable()
236 * interrupt, use the value previously written to the type buffer in regmap_irq_enable()
239 if (d->chip->type_in_mask && type) in regmap_irq_enable()
240 mask = d->type_buf[reg] & irq_data->mask; in regmap_irq_enable()
242 mask = irq_data->mask; in regmap_irq_enable()
244 if (d->chip->clear_on_unmask) in regmap_irq_enable()
245 d->clear_status = true; in regmap_irq_enable()
247 d->mask_buf[reg] &= ~mask; in regmap_irq_enable()
253 struct regmap *map = d->map; in regmap_irq_disable() local
254 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_disable()
256 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; in regmap_irq_disable()
262 struct regmap *map = d->map; in regmap_irq_set_type() local
263 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_type()
265 const struct regmap_irq_type *t = &irq_data->type; in regmap_irq_set_type()
267 if ((t->types_supported & type) != type) in regmap_irq_set_type()
270 reg = t->type_reg_offset / map->reg_stride; in regmap_irq_set_type()
272 if (t->type_reg_mask) in regmap_irq_set_type()
273 d->type_buf[reg] &= ~t->type_reg_mask; in regmap_irq_set_type()
275 d->type_buf[reg] &= ~(t->type_falling_val | in regmap_irq_set_type()
276 t->type_rising_val | in regmap_irq_set_type()
277 t->type_level_low_val | in regmap_irq_set_type()
278 t->type_level_high_val); in regmap_irq_set_type()
281 d->type_buf[reg] |= t->type_falling_val; in regmap_irq_set_type()
285 d->type_buf[reg] |= t->type_rising_val; in regmap_irq_set_type()
289 d->type_buf[reg] |= (t->type_falling_val | in regmap_irq_set_type()
290 t->type_rising_val); in regmap_irq_set_type()
294 d->type_buf[reg] |= t->type_level_high_val; in regmap_irq_set_type()
298 d->type_buf[reg] |= t->type_level_low_val; in regmap_irq_set_type()
301 return -EINVAL; in regmap_irq_set_type()
309 struct regmap *map = d->map; in regmap_irq_set_wake() local
310 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_wake()
313 if (d->wake_buf) in regmap_irq_set_wake()
314 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
315 &= ~irq_data->mask; in regmap_irq_set_wake()
316 d->wake_count++; in regmap_irq_set_wake()
318 if (d->wake_buf) in regmap_irq_set_wake()
319 d->wake_buf[irq_data->reg_offset / map->reg_stride] in regmap_irq_set_wake()
320 |= irq_data->mask; in regmap_irq_set_wake()
321 d->wake_count--; in regmap_irq_set_wake()
339 const struct regmap_irq_chip *chip = data->chip; in read_sub_irq_data()
340 struct regmap *map = data->map; in read_sub_irq_data() local
344 if (!chip->sub_reg_offsets) { in read_sub_irq_data()
346 ret = regmap_read(map, chip->status_base + in read_sub_irq_data()
347 (b * map->reg_stride * data->irq_reg_stride), in read_sub_irq_data()
348 &data->status_buf[b]); in read_sub_irq_data()
350 subreg = &chip->sub_reg_offsets[b]; in read_sub_irq_data()
351 for (i = 0; i < subreg->num_regs; i++) { in read_sub_irq_data()
352 unsigned int offset = subreg->offset[i]; in read_sub_irq_data()
354 ret = regmap_read(map, chip->status_base + offset, in read_sub_irq_data()
355 &data->status_buf[offset]); in read_sub_irq_data()
366 const struct regmap_irq_chip *chip = data->chip; in regmap_irq_thread()
367 struct regmap *map = data->map; in regmap_irq_thread() local
372 if (chip->handle_pre_irq) in regmap_irq_thread()
373 chip->handle_pre_irq(chip->irq_drv_data); in regmap_irq_thread()
375 if (chip->runtime_pm) { in regmap_irq_thread()
376 ret = pm_runtime_get_sync(map->dev); in regmap_irq_thread()
378 dev_err(map->dev, "IRQ thread failed to resume: %d\n", in regmap_irq_thread()
390 if (chip->num_main_regs) { in regmap_irq_thread()
394 size = chip->num_regs * sizeof(unsigned int); in regmap_irq_thread()
396 max_main_bits = (chip->num_main_status_bits) ? in regmap_irq_thread()
397 chip->num_main_status_bits : chip->num_regs; in regmap_irq_thread()
399 memset(data->status_buf, 0, size); in regmap_irq_thread()
406 for (i = 0; i < chip->num_main_regs; i++) { in regmap_irq_thread()
407 ret = regmap_read(map, chip->main_status + in regmap_irq_thread()
408 (i * map->reg_stride in regmap_irq_thread()
409 * data->irq_reg_stride), in regmap_irq_thread()
410 &data->main_status_buf[i]); in regmap_irq_thread()
412 dev_err(map->dev, in regmap_irq_thread()
420 for (i = 0; i < chip->num_main_regs; i++) { in regmap_irq_thread()
422 const unsigned long mreg = data->main_status_buf[i]; in regmap_irq_thread()
424 for_each_set_bit(b, &mreg, map->format.val_bytes * 8) { in regmap_irq_thread()
425 if (i * map->format.val_bytes * 8 + b > in regmap_irq_thread()
431 dev_err(map->dev, in regmap_irq_thread()
439 } else if (!map->use_single_read && map->reg_stride == 1 && in regmap_irq_thread()
440 data->irq_reg_stride == 1) { in regmap_irq_thread()
442 u8 *buf8 = data->status_reg_buf; in regmap_irq_thread()
443 u16 *buf16 = data->status_reg_buf; in regmap_irq_thread()
444 u32 *buf32 = data->status_reg_buf; in regmap_irq_thread()
446 BUG_ON(!data->status_reg_buf); in regmap_irq_thread()
448 ret = regmap_bulk_read(map, chip->status_base, in regmap_irq_thread()
449 data->status_reg_buf, in regmap_irq_thread()
450 chip->num_regs); in regmap_irq_thread()
452 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_irq_thread()
457 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
458 switch (map->format.val_bytes) { in regmap_irq_thread()
460 data->status_buf[i] = buf8[i]; in regmap_irq_thread()
463 data->status_buf[i] = buf16[i]; in regmap_irq_thread()
466 data->status_buf[i] = buf32[i]; in regmap_irq_thread()
475 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
476 ret = regmap_read(map, chip->status_base + in regmap_irq_thread()
477 (i * map->reg_stride in regmap_irq_thread()
478 * data->irq_reg_stride), in regmap_irq_thread()
479 &data->status_buf[i]); in regmap_irq_thread()
482 dev_err(map->dev, in regmap_irq_thread()
493 * interrupt. We assume that typically few of the interrupts in regmap_irq_thread()
497 for (i = 0; i < data->chip->num_regs; i++) { in regmap_irq_thread()
498 data->status_buf[i] &= ~data->mask_buf[i]; in regmap_irq_thread()
500 if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_irq_thread()
501 reg = chip->ack_base + in regmap_irq_thread()
502 (i * map->reg_stride * data->irq_reg_stride); in regmap_irq_thread()
503 if (chip->ack_invert) in regmap_irq_thread()
504 ret = regmap_write(map, reg, in regmap_irq_thread()
505 ~data->status_buf[i]); in regmap_irq_thread()
507 ret = regmap_write(map, reg, in regmap_irq_thread()
508 data->status_buf[i]); in regmap_irq_thread()
509 if (chip->clear_ack) { in regmap_irq_thread()
510 if (chip->ack_invert && !ret) in regmap_irq_thread()
511 ret = regmap_write(map, reg, UINT_MAX); in regmap_irq_thread()
513 ret = regmap_write(map, reg, 0); in regmap_irq_thread()
516 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_irq_thread()
521 for (i = 0; i < chip->num_irqs; i++) { in regmap_irq_thread()
522 if (data->status_buf[chip->irqs[i].reg_offset / in regmap_irq_thread()
523 map->reg_stride] & chip->irqs[i].mask) { in regmap_irq_thread()
524 handle_nested_irq(irq_find_mapping(data->domain, i)); in regmap_irq_thread()
530 if (chip->runtime_pm) in regmap_irq_thread()
531 pm_runtime_put(map->dev); in regmap_irq_thread()
533 if (chip->handle_post_irq) in regmap_irq_thread()
534 chip->handle_post_irq(chip->irq_drv_data); in regmap_irq_thread()
545 struct regmap_irq_chip_data *data = h->host_data; in regmap_irq_map()
548 irq_set_chip(virq, &data->irq_chip); in regmap_irq_map()
550 irq_set_parent(virq, data->irq); in regmap_irq_map()
557 .map = regmap_irq_map,
562 * regmap_add_irq_chip_fwnode() - Use standard regmap IRQ controller handling
565 * @map: The regmap for the device.
567 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
569 * @chip: Configuration for the interrupt controller.
579 struct regmap *map, int irq, in regmap_add_irq_chip_fwnode() argument
586 int ret = -ENOMEM; in regmap_add_irq_chip_fwnode()
591 if (chip->num_regs <= 0) in regmap_add_irq_chip_fwnode()
592 return -EINVAL; in regmap_add_irq_chip_fwnode()
594 if (chip->clear_on_unmask && (chip->ack_base || chip->use_ack)) in regmap_add_irq_chip_fwnode()
595 return -EINVAL; in regmap_add_irq_chip_fwnode()
597 for (i = 0; i < chip->num_irqs; i++) { in regmap_add_irq_chip_fwnode()
598 if (chip->irqs[i].reg_offset % map->reg_stride) in regmap_add_irq_chip_fwnode()
599 return -EINVAL; in regmap_add_irq_chip_fwnode()
600 if (chip->irqs[i].reg_offset / map->reg_stride >= in regmap_add_irq_chip_fwnode()
601 chip->num_regs) in regmap_add_irq_chip_fwnode()
602 return -EINVAL; in regmap_add_irq_chip_fwnode()
606 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); in regmap_add_irq_chip_fwnode()
608 dev_warn(map->dev, "Failed to allocate IRQs: %d\n", in regmap_add_irq_chip_fwnode()
616 return -ENOMEM; in regmap_add_irq_chip_fwnode()
618 if (chip->num_main_regs) { in regmap_add_irq_chip_fwnode()
619 d->main_status_buf = kcalloc(chip->num_main_regs, in regmap_add_irq_chip_fwnode()
623 if (!d->main_status_buf) in regmap_add_irq_chip_fwnode()
627 d->status_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
629 if (!d->status_buf) in regmap_add_irq_chip_fwnode()
632 d->mask_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
634 if (!d->mask_buf) in regmap_add_irq_chip_fwnode()
637 d->mask_buf_def = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
639 if (!d->mask_buf_def) in regmap_add_irq_chip_fwnode()
642 if (chip->wake_base) { in regmap_add_irq_chip_fwnode()
643 d->wake_buf = kcalloc(chip->num_regs, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
645 if (!d->wake_buf) in regmap_add_irq_chip_fwnode()
649 num_type_reg = chip->type_in_mask ? chip->num_regs : chip->num_type_reg; in regmap_add_irq_chip_fwnode()
651 d->type_buf_def = kcalloc(num_type_reg, in regmap_add_irq_chip_fwnode()
653 if (!d->type_buf_def) in regmap_add_irq_chip_fwnode()
656 d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int), in regmap_add_irq_chip_fwnode()
658 if (!d->type_buf) in regmap_add_irq_chip_fwnode()
662 d->irq_chip = regmap_irq_chip; in regmap_add_irq_chip_fwnode()
663 d->irq_chip.name = chip->name; in regmap_add_irq_chip_fwnode()
664 d->irq = irq; in regmap_add_irq_chip_fwnode()
665 d->map = map; in regmap_add_irq_chip_fwnode()
666 d->chip = chip; in regmap_add_irq_chip_fwnode()
667 d->irq_base = irq_base; in regmap_add_irq_chip_fwnode()
669 if (chip->irq_reg_stride) in regmap_add_irq_chip_fwnode()
670 d->irq_reg_stride = chip->irq_reg_stride; in regmap_add_irq_chip_fwnode()
672 d->irq_reg_stride = 1; in regmap_add_irq_chip_fwnode()
674 if (chip->type_reg_stride) in regmap_add_irq_chip_fwnode()
675 d->type_reg_stride = chip->type_reg_stride; in regmap_add_irq_chip_fwnode()
677 d->type_reg_stride = 1; in regmap_add_irq_chip_fwnode()
679 if (!map->use_single_read && map->reg_stride == 1 && in regmap_add_irq_chip_fwnode()
680 d->irq_reg_stride == 1) { in regmap_add_irq_chip_fwnode()
681 d->status_reg_buf = kmalloc_array(chip->num_regs, in regmap_add_irq_chip_fwnode()
682 map->format.val_bytes, in regmap_add_irq_chip_fwnode()
684 if (!d->status_reg_buf) in regmap_add_irq_chip_fwnode()
688 mutex_init(&d->lock); in regmap_add_irq_chip_fwnode()
690 for (i = 0; i < chip->num_irqs; i++) in regmap_add_irq_chip_fwnode()
691 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] in regmap_add_irq_chip_fwnode()
692 |= chip->irqs[i].mask; in regmap_add_irq_chip_fwnode()
695 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip_fwnode()
696 d->mask_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
697 if (!chip->mask_base) in regmap_add_irq_chip_fwnode()
700 reg = chip->mask_base + in regmap_add_irq_chip_fwnode()
701 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
702 if (chip->mask_invert) in regmap_add_irq_chip_fwnode()
704 d->mask_buf[i], ~d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
705 else if (d->chip->unmask_base) { in regmap_add_irq_chip_fwnode()
706 unmask_offset = d->chip->unmask_base - in regmap_add_irq_chip_fwnode()
707 d->chip->mask_base; in regmap_add_irq_chip_fwnode()
710 d->mask_buf[i], in regmap_add_irq_chip_fwnode()
711 d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
714 d->mask_buf[i], d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
716 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
721 if (!chip->init_ack_masked) in regmap_add_irq_chip_fwnode()
725 reg = chip->status_base + in regmap_add_irq_chip_fwnode()
726 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
727 ret = regmap_read(map, reg, &d->status_buf[i]); in regmap_add_irq_chip_fwnode()
729 dev_err(map->dev, "Failed to read IRQ status: %d\n", in regmap_add_irq_chip_fwnode()
734 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) { in regmap_add_irq_chip_fwnode()
735 reg = chip->ack_base + in regmap_add_irq_chip_fwnode()
736 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
737 if (chip->ack_invert) in regmap_add_irq_chip_fwnode()
738 ret = regmap_write(map, reg, in regmap_add_irq_chip_fwnode()
739 ~(d->status_buf[i] & d->mask_buf[i])); in regmap_add_irq_chip_fwnode()
741 ret = regmap_write(map, reg, in regmap_add_irq_chip_fwnode()
742 d->status_buf[i] & d->mask_buf[i]); in regmap_add_irq_chip_fwnode()
743 if (chip->clear_ack) { in regmap_add_irq_chip_fwnode()
744 if (chip->ack_invert && !ret) in regmap_add_irq_chip_fwnode()
745 ret = regmap_write(map, reg, UINT_MAX); in regmap_add_irq_chip_fwnode()
747 ret = regmap_write(map, reg, 0); in regmap_add_irq_chip_fwnode()
750 dev_err(map->dev, "Failed to ack 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
758 if (d->wake_buf) { in regmap_add_irq_chip_fwnode()
759 for (i = 0; i < chip->num_regs; i++) { in regmap_add_irq_chip_fwnode()
760 d->wake_buf[i] = d->mask_buf_def[i]; in regmap_add_irq_chip_fwnode()
761 reg = chip->wake_base + in regmap_add_irq_chip_fwnode()
762 (i * map->reg_stride * d->irq_reg_stride); in regmap_add_irq_chip_fwnode()
764 if (chip->wake_invert) in regmap_add_irq_chip_fwnode()
766 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
770 d->mask_buf_def[i], in regmap_add_irq_chip_fwnode()
771 d->wake_buf[i]); in regmap_add_irq_chip_fwnode()
773 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
780 if (chip->num_type_reg && !chip->type_in_mask) { in regmap_add_irq_chip_fwnode()
781 for (i = 0; i < chip->num_type_reg; ++i) { in regmap_add_irq_chip_fwnode()
782 reg = chip->type_base + in regmap_add_irq_chip_fwnode()
783 (i * map->reg_stride * d->type_reg_stride); in regmap_add_irq_chip_fwnode()
785 ret = regmap_read(map, reg, &d->type_buf_def[i]); in regmap_add_irq_chip_fwnode()
787 if (d->chip->type_invert) in regmap_add_irq_chip_fwnode()
788 d->type_buf_def[i] = ~d->type_buf_def[i]; in regmap_add_irq_chip_fwnode()
791 dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n", in regmap_add_irq_chip_fwnode()
799 d->domain = irq_domain_add_legacy(to_of_node(fwnode), in regmap_add_irq_chip_fwnode()
800 chip->num_irqs, irq_base, in regmap_add_irq_chip_fwnode()
803 d->domain = irq_domain_add_linear(to_of_node(fwnode), in regmap_add_irq_chip_fwnode()
804 chip->num_irqs, in regmap_add_irq_chip_fwnode()
806 if (!d->domain) { in regmap_add_irq_chip_fwnode()
807 dev_err(map->dev, "Failed to create IRQ domain\n"); in regmap_add_irq_chip_fwnode()
808 ret = -ENOMEM; in regmap_add_irq_chip_fwnode()
814 chip->name, d); in regmap_add_irq_chip_fwnode()
816 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n", in regmap_add_irq_chip_fwnode()
817 irq, chip->name, ret); in regmap_add_irq_chip_fwnode()
828 kfree(d->type_buf); in regmap_add_irq_chip_fwnode()
829 kfree(d->type_buf_def); in regmap_add_irq_chip_fwnode()
830 kfree(d->wake_buf); in regmap_add_irq_chip_fwnode()
831 kfree(d->mask_buf_def); in regmap_add_irq_chip_fwnode()
832 kfree(d->mask_buf); in regmap_add_irq_chip_fwnode()
833 kfree(d->status_buf); in regmap_add_irq_chip_fwnode()
834 kfree(d->status_reg_buf); in regmap_add_irq_chip_fwnode()
841 * regmap_add_irq_chip() - Use standard regmap IRQ controller handling
843 * @map: The regmap for the device.
845 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
847 * @chip: Configuration for the interrupt controller.
855 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, in regmap_add_irq_chip() argument
859 return regmap_add_irq_chip_fwnode(dev_fwnode(map->dev), map, irq, in regmap_add_irq_chip()
865 * regmap_del_irq_chip() - Stop interrupt handling for a regmap IRQ chip
883 for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) { in regmap_del_irq_chip()
885 if (!d->chip->irqs[hwirq].mask) in regmap_del_irq_chip()
892 virq = irq_find_mapping(d->domain, hwirq); in regmap_del_irq_chip()
897 irq_domain_remove(d->domain); in regmap_del_irq_chip()
898 kfree(d->type_buf); in regmap_del_irq_chip()
899 kfree(d->type_buf_def); in regmap_del_irq_chip()
900 kfree(d->wake_buf); in regmap_del_irq_chip()
901 kfree(d->mask_buf_def); in regmap_del_irq_chip()
902 kfree(d->mask_buf); in regmap_del_irq_chip()
903 kfree(d->status_reg_buf); in regmap_del_irq_chip()
904 kfree(d->status_buf); in regmap_del_irq_chip()
913 regmap_del_irq_chip(d->irq, d); in devm_regmap_irq_chip_release()
929 * devm_regmap_add_irq_chip_fwnode() - Resource managed regmap_add_irq_chip_fwnode()
933 * @map: The regmap for the device.
935 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
937 * @chip: Configuration for the interrupt controller.
947 struct regmap *map, int irq, in devm_regmap_add_irq_chip_fwnode() argument
958 return -ENOMEM; in devm_regmap_add_irq_chip_fwnode()
960 ret = regmap_add_irq_chip_fwnode(fwnode, map, irq, irq_flags, irq_base, in devm_regmap_add_irq_chip_fwnode()
975 * devm_regmap_add_irq_chip() - Resource manager regmap_add_irq_chip()
978 * @map: The regmap for the device.
980 * @irq_flags: The IRQF_ flags to use for the primary interrupt.
982 * @chip: Configuration for the interrupt controller.
990 int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, in devm_regmap_add_irq_chip() argument
995 return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(map->dev), map, in devm_regmap_add_irq_chip()
1002 * devm_regmap_del_irq_chip() - Resource managed regmap_del_irq_chip()
1015 WARN_ON(irq != data->irq); in devm_regmap_del_irq_chip()
1025 * regmap_irq_chip_get_base() - Retrieve interrupt base for a regmap IRQ chip
1033 WARN_ON(!data->irq_base); in regmap_irq_chip_get_base()
1034 return data->irq_base; in regmap_irq_chip_get_base()
1039 * regmap_irq_get_virq() - Map an interrupt on a chip to a virtual IRQ
1042 * @irq: index of the interrupt requested in the chip IRQs.
1049 if (!data->chip->irqs[irq].mask) in regmap_irq_get_virq()
1050 return -EINVAL; in regmap_irq_get_virq()
1052 return irq_create_mapping(data->domain, irq); in regmap_irq_get_virq()
1057 * regmap_irq_get_domain() - Retrieve the irq_domain for the chip
1069 return data->domain; in regmap_irq_get_domain()