Lines Matching +full:0 +full:x02000
18 #define MEMCTRLSTATUS_MAGIC 0x00
19 #define MM_MAGIC_VALUE (unsigned char)0x59
21 #define MEMCTRLSTATUS_BATTERY 0x04
22 #define BATTERY_1_DISABLED 0x01
23 #define BATTERY_1_FAILURE 0x02
24 #define BATTERY_2_DISABLED 0x04
25 #define BATTERY_2_FAILURE 0x08
27 #define MEMCTRLSTATUS_MEMORY 0x07
28 #define MEM_128_MB 0xfe
29 #define MEM_256_MB 0xfc
30 #define MEM_512_MB 0xf8
31 #define MEM_1_GB 0xf0
32 #define MEM_2_GB 0xe0
34 #define MEMCTRLCMD_LEDCTRL 0x08
39 #define LED_OFF 0x00
40 #define LED_ON 0x01
41 #define LED_FLASH_3_5 0x02
42 #define LED_FLASH_7_0 0x03
43 #define LED_POWER_ON 0x00
44 #define LED_POWER_OFF 0x01
45 #define USER_BIT1 0x01
46 #define USER_BIT2 0x02
50 #define MEMCTRLCMD_ERRCTRL 0x0C
51 #define EDC_NONE_DEFAULT 0x00
52 #define EDC_NONE 0x01
53 #define EDC_STORE_READ 0x02
54 #define EDC_STORE_CORRECT 0x03
56 #define MEMCTRLCMD_ERRCNT 0x0D
57 #define MEMCTRLCMD_ERRSTATUS 0x0E
59 #define ERROR_DATA_LOG 0x20
60 #define ERROR_ADDR_LOG 0x28
61 #define ERROR_COUNT 0x3D
62 #define ERROR_SYNDROME 0x3E
63 #define ERROR_CHECK 0x3F
65 #define DMA_PCI_ADDR 0x40
66 #define DMA_LOCAL_ADDR 0x48
67 #define DMA_TRANSFER_SIZE 0x50
68 #define DMA_DESCRIPTOR_ADDR 0x58
69 #define DMA_SEMAPHORE_ADDR 0x60
70 #define DMA_STATUS_CTRL 0x68
71 #define DMASCR_GO 0x00001
72 #define DMASCR_TRANSFER_READ 0x00002
73 #define DMASCR_CHAIN_EN 0x00004
74 #define DMASCR_SEM_EN 0x00010
75 #define DMASCR_DMA_COMP_EN 0x00020
76 #define DMASCR_CHAIN_COMP_EN 0x00040
77 #define DMASCR_ERR_INT_EN 0x00080
78 #define DMASCR_PARITY_INT_EN 0x00100
79 #define DMASCR_ANY_ERR 0x00800
80 #define DMASCR_MBE_ERR 0x01000
81 #define DMASCR_PARITY_ERR_REP 0x02000
82 #define DMASCR_PARITY_ERR_DET 0x04000
83 #define DMASCR_SYSTEM_ERR_SIG 0x08000
84 #define DMASCR_TARGET_ABT 0x10000
85 #define DMASCR_MASTER_ABT 0x20000
86 #define DMASCR_DMA_COMPLETE 0x40000
87 #define DMASCR_CHAIN_COMPLETE 0x80000
91 READ-LINE (0xE) OR READ-MULTIPLE (0xC) PCI COMMAND CODES DURING DMA
94 (31..28) OF THE DMA CSR HAVE BEEN MADE PROGRAMMABLE, SO THAT EITHER A 0x6,
95 AN 0xE OR A 0xC CAN BE WRITTEN TO THEM TO SET THE COMMAND CODE USED DURING
98 #define DMASCR_READ 0x60000000
99 #define DMASCR_READLINE 0xE0000000
100 #define DMASCR_READMULTI 0xC0000000
106 #define WINDOWMAP_WINNUM 0x7B
108 #define DMA_READ_FROM_HOST 0