Lines Matching full:parents
294 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
300 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
306 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
312 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
322 .parents = { -1, -1, JZ4780_CLK_EXCLK, -1 },
330 .parents = { -1, JZ4780_CLK_APLL, JZ4780_CLK_EXCLK,
337 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
344 .parents = { JZ4780_CLK_CPUMUX, -1, -1, -1 },
350 .parents = { JZ4780_CLK_CPUMUX, -1, -1, -1 },
356 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
364 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
371 .parents = { JZ4780_CLK_AHB2PMUX, -1, -1, -1 },
377 .parents = { JZ4780_CLK_AHB2PMUX, -1, -1, -1 },
383 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, -1 },
390 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
399 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_EPLL, -1, -1 },
406 .parents = { JZ4780_CLK_EXCLK, JZ4780_CLK_I2SPLL, -1, -1 },
412 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
420 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
428 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, -1 },
434 .parents = { JZ4780_CLK_MSCMUX, -1, -1, -1 },
441 .parents = { JZ4780_CLK_MSCMUX, -1, -1, -1 },
448 .parents = { JZ4780_CLK_MSCMUX, -1, -1, -1 },
455 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
464 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, -1, -1 },
471 .parents = { JZ4780_CLK_EXCLK, JZ4780_CLK_SSIPLL, -1, -1 },
477 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, -1, -1 },
484 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
492 .parents = { JZ4780_CLK_EXCLK, JZ4780_CLK_PCMPLL, -1, -1 },
499 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
508 .parents = { JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
517 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL,
526 .parents = { JZ4780_CLK_EXCLK },
532 .parents = { JZ4780_CLK_EXCLK_DIV512, JZ4780_CLK_RTCLK },
540 .parents = { JZ4780_CLK_AHB2, -1, -1, -1 },
546 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
552 .parents = { JZ4780_CLK_SSI, -1, -1, -1 },
558 .parents = { JZ4780_CLK_PCLK, -1, -1, -1 },
564 .parents = { JZ4780_CLK_PCLK, -1, -1, -1 },
570 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
576 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
582 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
588 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
594 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
600 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
606 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
612 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
618 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
624 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
630 .parents = { JZ4780_CLK_SSI, -1, -1, -1 },
636 .parents = { JZ4780_CLK_SSI, -1, -1, -1 },
642 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
648 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
654 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
660 .parents = { JZ4780_CLK_PCLK, -1, -1, -1 },
666 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
672 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
678 .parents = { JZ4780_CLK_LCD, -1, -1, -1 },
684 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
690 .parents = { JZ4780_CLK_DDR, -1, -1, -1 },
696 .parents = { JZ4780_CLK_DDR, -1, -1, -1 },
702 .parents = { JZ4780_CLK_PCLK, -1, -1, -1 },
708 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
714 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
720 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
726 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
732 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
738 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
744 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
750 .parents = { JZ4780_CLK_PCLK, -1, -1, -1 },
756 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
762 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 },
768 .parents = { JZ4780_CLK_CPU, -1, -1, -1 },