Lines Matching refs:mst_d_mclk
573 AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_MCLK_D_CTRL);
586 AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_MCLK_D_CTRL);
598 static struct clk_regmap mst_d_mclk = variable
599 AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_MCLK_D_CTRL);
761 AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
774 AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
787 AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
851 [AUD_CLKID_MST_D_MCLK] = &mst_d_mclk.hw,
985 [AUD_CLKID_MST_D_MCLK] = &mst_d_mclk.hw,
1284 &mst_d_mclk,
1409 &mst_d_mclk,