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Lines Matching refs:cmd_rcgr

45 #define RCG_CFG_OFFSET(rcg)	((rcg)->cmd_rcgr + (rcg)->cfg_off + CFG_REG)
46 #define RCG_M_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + M_REG)
47 #define RCG_N_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + N_REG)
48 #define RCG_D_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + D_REG)
69 ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, &cmd); in clk_rcg2_is_enabled()
107 ret = regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, in update_config()
114 ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, &cmd); in update_config()
443 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, in clk_edp_pixel_set_rate()
493 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, in clk_edp_pixel_determine_rate()
614 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); in clk_byte2_set_rate()
690 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); in clk_pixel_set_rate()
707 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, in clk_pixel_set_rate()
795 ret = regmap_write(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, cfg); in clk_gfx3d_set_rate_and_parent()
830 ret = regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, in clk_rcg2_set_force_enable()
851 return regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, in clk_rcg2_clear_force_enable()
927 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); in clk_rcg2_shared_disable()
939 regmap_write(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, in clk_rcg2_shared_disable()
947 regmap_write(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, cfg); in clk_rcg2_shared_disable()
972 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + SE_PERF_DFSR(l), &cfg); in clk_rcg2_dfs_populate_freq()
995 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + SE_PERF_M_DFSR(l), in clk_rcg2_dfs_populate_freq()
1000 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + SE_PERF_N_DFSR(l), in clk_rcg2_dfs_populate_freq()
1053 rcg->cmd_rcgr + SE_CMD_DFSR_OFFSET, &level); in clk_rcg2_dfs_recalc_rate()
1067 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + SE_PERF_DFSR(level), in clk_rcg2_dfs_recalc_rate()
1080 rcg->cmd_rcgr + SE_PERF_M_DFSR(level), &m); in clk_rcg2_dfs_recalc_rate()
1084 rcg->cmd_rcgr + SE_PERF_N_DFSR(level), &n); in clk_rcg2_dfs_recalc_rate()
1108 ret = regmap_read(regmap, rcg->cmd_rcgr + SE_CMD_DFSR_OFFSET, &val); in clk_rcg2_enable_dfs()
1159 regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); in clk_rcg2_dp_set_rate()