Lines Matching refs:RK3288_CLKSEL_CON
137 .reg = RK3288_CLKSEL_CON(0), \
145 .reg = RK3288_CLKSEL_CON(37), \
182 .core_reg = RK3288_CLKSEL_CON(0),
251 RK3288_CLKSEL_CON(4), 8, 2, MFLAGS);
255 RK3288_CLKSEL_CON(5), 8, 2, MFLAGS);
259 RK3288_CLKSEL_CON(40), 8, 2, MFLAGS);
263 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS);
267 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS);
271 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS);
275 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS);
279 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS);
292 RK3288_CLKSEL_CON(36), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
295 RK3288_CLKSEL_CON(36), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
298 RK3288_CLKSEL_CON(36), 8, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
301 RK3288_CLKSEL_CON(36), 12, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
304 RK3288_CLKSEL_CON(37), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
307 RK3288_CLKSEL_CON(0), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
310 RK3288_CLKSEL_CON(0), 4, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
313 RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
316 RK3288_CLKSEL_CON(37), 9, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
330 RK3288_CLKSEL_CON(26), 2, 1, MFLAGS, 0, 2,
338 RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, DFLAGS),
340 RK3288_CLKSEL_CON(1), 0, 3, DFLAGS),
344 RK3288_CLKSEL_CON(1), 12, 3, DFLAGS,
347 RK3288_CLKSEL_CON(1), 8, 2, DFLAGS, div_hclk_cpu_t,
352 RK3288_CLKSEL_CON(26), 6, 2, DFLAGS,
360 RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
363 RK3288_CLKSEL_CON(8), 0,
367 RK3288_CLKSEL_CON(4), 12, 1, MFLAGS,
373 RK3288_CLKSEL_CON(5), 15, 1, MFLAGS),
375 RK3288_CLKSEL_CON(5), 0, 7, DFLAGS,
378 RK3288_CLKSEL_CON(9), 0,
384 RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
387 RK3288_CLKSEL_CON(41), 0,
414 RK3288_CLKSEL_CON(32), 6, 2, MFLAGS, 0, 5, DFLAGS,
417 RK3288_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS,
431 RK3288_CLKSEL_CON(31), 6, 2, MFLAGS, 0, 5, DFLAGS,
434 RK3288_CLKSEL_CON(31), 14, 2, MFLAGS, 8, 5, DFLAGS,
438 RK3288_CLKSEL_CON(30), 6, 2, MFLAGS, 0, 5, DFLAGS,
441 RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
445 RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
448 RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
452 RK3288_CLKSEL_CON(28), 15, 1, MFLAGS,
455 RK3288_CLKSEL_CON(28), 6, 2, MFLAGS, 0, 6, DFLAGS,
459 RK3288_CLKSEL_CON(6), 6, 2, MFLAGS, 0, 6, DFLAGS,
462 RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
471 RK3288_CLKSEL_CON(39), 14, 2, MFLAGS, 8, 5, DFLAGS,
474 RK3288_CLKSEL_CON(40), 12, 2, DFLAGS),
477 RK3288_CLKSEL_CON(42), 6, 2, MFLAGS, 0, 5, DFLAGS,
480 RK3288_CLKSEL_CON(42), 14, 2, MFLAGS, 8, 5, DFLAGS,
484 RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
487 RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
490 RK3288_CLKSEL_CON(33), 8, 5, DFLAGS),
492 RK3288_CLKSEL_CON(33), 0, 5, DFLAGS,
496 RK3288_CLKSEL_CON(34), 6, 2, MFLAGS, 0, 5, DFLAGS,
500 RK3288_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
503 RK3288_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
506 RK3288_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
516 RK3288_CLKSEL_CON(25), 7, 1, MFLAGS, 0, 7, DFLAGS,
519 RK3288_CLKSEL_CON(25), 15, 1, MFLAGS, 8, 7, DFLAGS,
522 RK3288_CLKSEL_CON(39), 7, 1, MFLAGS, 0, 7, DFLAGS,
526 RK3288_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 6, DFLAGS,
529 RK3288_CLKSEL_CON(12), 6, 2, MFLAGS, 0, 6, DFLAGS,
532 RK3288_CLKSEL_CON(34), 14, 2, MFLAGS, 8, 6, DFLAGS,
535 RK3288_CLKSEL_CON(12), 14, 2, MFLAGS, 8, 6, DFLAGS,
551 RK3288_CLKSEL_CON(35), 14, 2, MFLAGS, 8, 5, DFLAGS,
554 RK3288_CLKSEL_CON(35), 6, 2, MFLAGS, 0, 5, DFLAGS,
567 RK3288_CLKSEL_CON(2), 0, 6, DFLAGS,
571 RK3288_CLKSEL_CON(24), 8, 8, DFLAGS,
578 RK3288_CLKSEL_CON(38), 7, 1, MFLAGS, 0, 5, DFLAGS,
581 RK3288_CLKSEL_CON(38), 15, 1, MFLAGS, 8, 5, DFLAGS,
585 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS,
588 RK3288_CLKSEL_CON(17), 0,
592 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS),
594 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS,
597 RK3288_CLKSEL_CON(18), 0,
601 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS,
604 RK3288_CLKSEL_CON(19), 0,
608 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS,
611 RK3288_CLKSEL_CON(20), 0,
615 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS,
618 RK3288_CLKSEL_CON(7), 0,
623 RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
626 RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
637 RK3288_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
640 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
642 RK3288_CLKSEL_CON(22), 7, IFLAGS),
648 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
651 RK3288_CLKSEL_CON(29), 0, 2, MFLAGS,
656 RK3288_CLKSEL_CON(11), 8, 6, DFLAGS),
658 RK3288_CLKSEL_CON(22), 4, 1, MFLAGS),
820 INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
822 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
827 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
832 RK3288_CLKSEL_CON(28), 8, 5, DFLAGS),
861 RK3288_CLKSEL_CON(0),
862 RK3288_CLKSEL_CON(1),
863 RK3288_CLKSEL_CON(10),
864 RK3288_CLKSEL_CON(33),
865 RK3288_CLKSEL_CON(37),