31 	op->ss = algt->ss;  in sun8i_ss_hash_crainit()
41 		dev_err(algt->ss->dev, "Fallback driver could no be loaded\n");  in sun8i_ss_hash_crainit()
52 	dev_info(op->ss->dev, "Fallback for %s is %s\n",  in sun8i_ss_hash_crainit()
55 	err = pm_runtime_get_sync(op->ss->dev);  in sun8i_ss_hash_crainit()
60 	pm_runtime_put_noidle(op->ss->dev);  in sun8i_ss_hash_crainit()
70 	pm_runtime_put_sync_suspend(tfmctx->ss->dev);  in sun8i_ss_hash_craexit()
199 static int sun8i_ss_run_hash_task(struct sun8i_ss_dev *ss,  in sun8i_ss_run_hash_task()  argument
208 	ss->flows[flow].stat_req++;  in sun8i_ss_run_hash_task()
223 		mutex_lock(&ss->mlock);  in sun8i_ss_run_hash_task()
226 			writel(rctx->t_dst[i - 1].addr, ss->base + SS_KEY_ADR_REG);  in sun8i_ss_run_hash_task()
227 			writel(rctx->t_dst[i - 1].addr, ss->base + SS_IV_ADR_REG);  in sun8i_ss_run_hash_task()
230 		dev_dbg(ss->dev,  in sun8i_ss_run_hash_task()
236 		writel(rctx->t_src[i].addr, ss->base + SS_SRC_ADR_REG);  in sun8i_ss_run_hash_task()
237 		writel(rctx->t_dst[i].addr, ss->base + SS_DST_ADR_REG);  in sun8i_ss_run_hash_task()
238 		writel(rctx->t_src[i].len, ss->base + SS_LEN_ADR_REG);  in sun8i_ss_run_hash_task()
239 		writel(BIT(0) | BIT(1), ss->base + SS_INT_CTL_REG);  in sun8i_ss_run_hash_task()
241 		reinit_completion(&ss->flows[flow].complete);  in sun8i_ss_run_hash_task()
242 		ss->flows[flow].status = 0;  in sun8i_ss_run_hash_task()
245 		writel(v, ss->base + SS_CTL_REG);  in sun8i_ss_run_hash_task()
246 		mutex_unlock(&ss->mlock);  in sun8i_ss_run_hash_task()
247 		wait_for_completion_interruptible_timeout(&ss->flows[flow].complete,  in sun8i_ss_run_hash_task()
249 		if (ss->flows[flow].status == 0) {  in sun8i_ss_run_hash_task()
250 			dev_err(ss->dev, "DMA timeout for %s\n", name);  in sun8i_ss_run_hash_task()
288 	struct sun8i_ss_dev *ss;  in sun8i_ss_hash_digest()  local
306 	ss = algt->ss;  in sun8i_ss_hash_digest()
308 	e = sun8i_ss_get_engine_number(ss);  in sun8i_ss_hash_digest()
310 	engine = ss->flows[e].engine;  in sun8i_ss_hash_digest()
325 	struct sun8i_ss_dev *ss;  in sun8i_ss_hash_run()  local
338 	ss = algt->ss;  in sun8i_ss_hash_run()
344 	result = ss->flows[rctx->flow].result;  in sun8i_ss_hash_run()
345 	pad = ss->flows[rctx->flow].pad;  in sun8i_ss_hash_run()
358 	rctx->method = ss->variant->alg_hash[algt->ss_algo_id];  in sun8i_ss_hash_run()
360 	nr_sgs = dma_map_sg(ss->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE);  in sun8i_ss_hash_run()
362 		dev_err(ss->dev, "Invalid sg number %d\n", nr_sgs);  in sun8i_ss_hash_run()
367 	addr_res = dma_map_single(ss->dev, result, digestsize, DMA_FROM_DEVICE);  in sun8i_ss_hash_run()
368 	if (dma_mapping_error(ss->dev, addr_res)) {  in sun8i_ss_hash_run()
369 		dev_err(ss->dev, "DMA map dest\n");  in sun8i_ss_hash_run()
392 		dev_err(ss->dev, "remaining len %d\n", len);  in sun8i_ss_hash_run()
424 	addr_pad = dma_map_single(ss->dev, pad, j * 4, DMA_TO_DEVICE);  in sun8i_ss_hash_run()
429 	if (dma_mapping_error(ss->dev, addr_pad)) {  in sun8i_ss_hash_run()
430 		dev_err(ss->dev, "DMA error on padding SG\n");  in sun8i_ss_hash_run()
435 	err = sun8i_ss_run_hash_task(ss, rctx, crypto_tfm_alg_name(areq->base.tfm));  in sun8i_ss_hash_run()
437 	dma_unmap_single(ss->dev, addr_pad, j * 4, DMA_TO_DEVICE);  in sun8i_ss_hash_run()
438 	dma_unmap_sg(ss->dev, areq->src, nr_sgs, DMA_TO_DEVICE);  in sun8i_ss_hash_run()
439 	dma_unmap_single(ss->dev, addr_res, digestsize, DMA_FROM_DEVICE);  in sun8i_ss_hash_run()