797 	int cs_mode = 0;  in f17_get_cs_mode()  local
800 		cs_mode |= CS_EVEN_PRIMARY;  in f17_get_cs_mode()
803 		cs_mode |= CS_ODD_PRIMARY;  in f17_get_cs_mode()
807 		cs_mode |= CS_ODD_SECONDARY;  in f17_get_cs_mode()
820 		cs_mode |= CS_3R_INTERLEAVE;  in f17_get_cs_mode()
823 	return cs_mode;  in f17_get_cs_mode()
828 	int dimm, size0, size1, cs0, cs1, cs_mode;  in debug_display_dimm_sizes_df()  local
836 		cs_mode = f17_get_cs_mode(dimm, ctrl, pvt);  in debug_display_dimm_sizes_df()
838 		size0 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs0);  in debug_display_dimm_sizes_df()
839 		size1 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs1);  in debug_display_dimm_sizes_df()
1357 				  unsigned cs_mode, int cs_mask_nr)  in k8_dbam_to_chip_select()  argument
1362 		WARN_ON(cs_mode > 11);  in k8_dbam_to_chip_select()
1363 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in k8_dbam_to_chip_select()
1367 		WARN_ON(cs_mode > 10);  in k8_dbam_to_chip_select()
1393 		diff = cs_mode/3 + (unsigned)(cs_mode > 5);  in k8_dbam_to_chip_select()
1395 		return 32 << (cs_mode - diff);  in k8_dbam_to_chip_select()
1398 		WARN_ON(cs_mode > 6);  in k8_dbam_to_chip_select()
1399 		return 32 << cs_mode;  in k8_dbam_to_chip_select()
1524 				   unsigned cs_mode, int cs_mask_nr)  in f10_dbam_to_chip_select()  argument
1528 	WARN_ON(cs_mode > 11);  in f10_dbam_to_chip_select()
1531 		return ddr3_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1533 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1540 				   unsigned cs_mode, int cs_mask_nr)  in f15_dbam_to_chip_select()  argument
1542 	WARN_ON(cs_mode > 12);  in f15_dbam_to_chip_select()
1544 	return ddr3_cs_size(cs_mode, false);  in f15_dbam_to_chip_select()
1549 					unsigned cs_mode, int cs_mask_nr)  in f15_m60h_dbam_to_chip_select()  argument
1554 	WARN_ON(cs_mode > 12);  in f15_m60h_dbam_to_chip_select()
1557 		if (cs_mode > 9)  in f15_m60h_dbam_to_chip_select()
1560 		cs_size = ddr4_cs_size(cs_mode);  in f15_m60h_dbam_to_chip_select()
1566 		cs_size = ddr3_lrdimm_cs_size(cs_mode, rank_multiply);  in f15_m60h_dbam_to_chip_select()
1569 		if (cs_mode == 0x1)  in f15_m60h_dbam_to_chip_select()
1572 		cs_size = ddr3_cs_size(cs_mode, false);  in f15_m60h_dbam_to_chip_select()
1582 				unsigned cs_mode, int cs_mask_nr)  in f16_dbam_to_chip_select()  argument
1584 	WARN_ON(cs_mode > 12);  in f16_dbam_to_chip_select()
1586 	if (cs_mode == 6 || cs_mode == 8 ||  in f16_dbam_to_chip_select()
1587 	    cs_mode == 9 || cs_mode == 12)  in f16_dbam_to_chip_select()
1590 		return ddr3_cs_size(cs_mode, false);  in f16_dbam_to_chip_select()
1594 				    unsigned int cs_mode, int csrow_nr)  in f17_addr_mask_to_cs_size()  argument
1601 	if (!cs_mode)  in f17_addr_mask_to_cs_size()
1605 	if (!(cs_mode & CS_EVEN) && !(csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1609 	if (!(cs_mode & CS_ODD) && (csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1620 	if ((csrow_nr & 1) && (cs_mode & CS_ODD_SECONDARY))  in f17_addr_mask_to_cs_size()
1638 	num_zero_bits = msb - weight - !!(cs_mode & CS_3R_INTERLEAVE);  in f17_addr_mask_to_cs_size()
2932 	u32 cs_mode, nr_pages;  in get_csrow_nr_pages()  local
2936 		cs_mode = DBAM_DIMM(csrow_nr, dbam);  in get_csrow_nr_pages()
2938 		cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt);  in get_csrow_nr_pages()
2941 	nr_pages   = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);  in get_csrow_nr_pages()
2945 		    csrow_nr_orig, dct,  cs_mode);  in get_csrow_nr_pages()