Lines Matching refs:edac_dbg
700 edac_dbg(0, "Invalid number of ranks: %d (max = %i) raw value = %x (%04x)\n", in numrank()
713 edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n", in numrow()
726 edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n", in numcol()
1374 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1377 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1384 edac_dbg(0, "edc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1387 edac_dbg(0, "edc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1399 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1402 edac_dbg(0, "mc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1409 edac_dbg(0, "mc route table for CHA %d: %s\n", in knl_get_dimm_capacity()
1412 edac_dbg(0, "mc route table for CHA %d-%d: %s\n", in knl_get_dimm_capacity()
1448 edac_dbg(0, "Unexpected interleave target %d\n", in knl_get_dimm_capacity()
1459 edac_dbg(3, "dram rule %d (base 0x%llx, limit 0x%llx), %d way interleave%s\n", in knl_get_dimm_capacity()
1499 …edac_dbg(0, "TAD region overlaps lower SAD boundary -- TAD tables may be configured incorrectly.\n… in knl_get_dimm_capacity()
1502 …edac_dbg(0, "TAD region overlaps upper SAD boundary -- TAD tables may be configured incorrectly.\n… in knl_get_dimm_capacity()
1505 edac_dbg(3, "TAD region %d 0x%llx - 0x%llx (%lld bytes) table%d\n", in knl_get_dimm_capacity()
1516 edac_dbg(3, " total TAD DRAM footprint in table%d : 0x%llx (%lld bytes)\n", in knl_get_dimm_capacity()
1550 edac_dbg(4, "mc channel %d contributes %lld bytes via sad entry %d\n", in knl_get_dimm_capacity()
1594 edac_dbg(0, "Memory is registered\n"); in __populate_dimms()
1596 edac_dbg(0, "Cannot determine memory type\n"); in __populate_dimms()
1598 edac_dbg(0, "Memory is unregistered\n"); in __populate_dimms()
1629 edac_dbg(4, "Channel #%d MTR%d = %x\n", i, j, mtr); in __populate_dimms()
1654 …edac_dbg(0, "mc#%d: ha %d channel %d, dimm %d, %lld MiB (%d pages) bank: %d, rank: %d, row: %#x, c… in __populate_dimms()
1682 edac_dbg(0, "mc#%d: Node ID: %d, source ID: %d\n", in get_dimm_config()
1698 edac_dbg(0, "Failed to read KNL_MCMTR register\n"); in get_dimm_config()
1704 edac_dbg(0, "Failed to read HASWELL_HASYSDEFEATURE2 register\n"); in get_dimm_config()
1710 edac_dbg(0, "Address range partial memory mirroring is enabled\n"); in get_dimm_config()
1715 edac_dbg(0, "Failed to read RASENABLES register\n"); in get_dimm_config()
1720 edac_dbg(0, "Full memory mirroring is enabled\n"); in get_dimm_config()
1723 edac_dbg(0, "Memory mirroring is disabled\n"); in get_dimm_config()
1728 edac_dbg(0, "Failed to read MCMTR register\n"); in get_dimm_config()
1732 edac_dbg(0, "Lockstep is enabled\n"); in get_dimm_config()
1736 edac_dbg(0, "Lockstep is disabled\n"); in get_dimm_config()
1741 edac_dbg(0, "address map is on closed page mode\n"); in get_dimm_config()
1744 edac_dbg(0, "address map is on open page mode\n"); in get_dimm_config()
1770 edac_dbg(0, "TOLM: %u.%03u GB (0x%016Lx)\n", in get_memory_layout()
1778 edac_dbg(0, "TOHM: %u.%03u GB (0x%016Lx)\n", in get_memory_layout()
1802 edac_dbg(0, "SAD#%d %s up to %u.%03u GB (0x%016Lx) Interleave: %s reg=0x%08x\n", in get_memory_layout()
1819 edac_dbg(0, "SAD#%d, interleave #%d: %d\n", in get_memory_layout()
1839 …edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT:… in get_memory_layout()
1864 edac_dbg(0, "TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n", in get_memory_layout()
1889 edac_dbg(0, "CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n", in get_memory_layout()
1903 edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n", in get_memory_layout()
2000 edac_dbg(0, "SAD interleave #%d: %d\n", in get_memory_error_data()
2003 edac_dbg(0, "mc#%d: Error detected on SAD#%d: address 0x%016Lx < 0x%016Lx, Interleave [%d:6]%s\n", in get_memory_error_data()
2031 edac_dbg(0, "SAD interleave index: %d (wayness %d) = CPU socket %d\n", in get_memory_error_data()
2060 edac_dbg(0, "SAD interleave package: %d = CPU socket %d, HA %i, shiftup: %i\n", in get_memory_error_data()
2068 edac_dbg(0, "SAD interleave package: %d = CPU socket %d, HA %d\n", in get_memory_error_data()
2168 …edac_dbg(0, "TAD#%d: address 0x%016Lx < 0x%016Lx, socket interleave %d, channel interleave %d (off… in get_memory_error_data()
2205 edac_dbg(0, "RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n", in get_memory_error_data()
2229 edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n", in get_memory_error_data()
2305 edac_dbg(0, "\n"); in sbridge_put_devices()
2310 edac_dbg(0, "Removing dev %02x:%02x.%d\n", in sbridge_put_devices()
2376 edac_dbg(0, "Skip IMC1: %04x:%04x (since HA1 was absent)\n", in sbridge_get_onedevice()
2419 edac_dbg(0, "Detected %04x:%04x\n", in sbridge_get_onedevice()
2535 edac_dbg(0, "Associated PCI %02x:%02x, bus %d with dev = %p\n", in sbridge_mci_bind_devs()
2619 edac_dbg(0, "Associated PCI %02x.%02d.%d with dev = %p\n", in ibridge_mci_bind_devs()
2710 edac_dbg(0, "Associated PCI %02x.%02d.%d with dev = %p\n", in haswell_mci_bind_devs()
2791 edac_dbg(0, "Associated PCI %02x.%02d.%d with dev = %p\n", in broadwell_mci_bind_devs()
3024 edac_dbg(0, "%s%s err_code:%04x:%04x EDRAM bank %d\n", in sbridge_mce_output_error()
3103 edac_dbg(0, "%s\n", msg); in sbridge_mce_output_error()
3201 edac_dbg(0, "MC: dev = %p\n", &sbridge_dev->pdev[0]->dev); in sbridge_unregister_mci()
3207 edac_dbg(0, "MC: mci = %p, dev = %p\n", in sbridge_unregister_mci()
3213 edac_dbg(1, "%s: free mci struct\n", mci->ctl_name); in sbridge_unregister_mci()
3241 edac_dbg(0, "MC: mci = %p, dev = %p\n", in sbridge_register_mci()
3395 edac_dbg(0, "MC: failed to get_dimm_config()\n"); in sbridge_register_mci()
3405 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); in sbridge_register_mci()
3451 edac_dbg(0, "couldn't get all devices\n"); in sbridge_probe()
3458 edac_dbg(0, "Registering MC#%d (%d of %d)\n", in sbridge_probe()
3488 edac_dbg(0, "\n"); in sbridge_remove()
3507 edac_dbg(2, "\n"); in sbridge_init()
3542 edac_dbg(2, "\n"); in sbridge_exit()