Lines Matching refs:tc
285 static inline int tc_poll_timeout(struct tc_data *tc, unsigned int addr, in tc_poll_timeout() argument
292 return regmap_read_poll_timeout(tc->regmap, addr, val, in tc_poll_timeout()
297 static int tc_aux_wait_busy(struct tc_data *tc) in tc_aux_wait_busy() argument
299 return tc_poll_timeout(tc, DP0_AUXSTATUS, AUX_BUSY, 0, 100, 100000); in tc_aux_wait_busy()
302 static int tc_aux_write_data(struct tc_data *tc, const void *data, in tc_aux_write_data() argument
310 ret = regmap_raw_write(tc->regmap, DP0_AUXWDATA(0), auxwdata, count); in tc_aux_write_data()
317 static int tc_aux_read_data(struct tc_data *tc, void *data, size_t size) in tc_aux_read_data() argument
322 ret = regmap_raw_read(tc->regmap, DP0_AUXRDATA(0), auxrdata, count); in tc_aux_read_data()
346 struct tc_data *tc = aux_to_tc(aux); in tc_aux_transfer() local
352 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
363 ret = tc_aux_write_data(tc, msg->buffer, size); in tc_aux_transfer()
373 ret = regmap_write(tc->regmap, DP0_AUXADDR, msg->address); in tc_aux_transfer()
377 ret = regmap_write(tc->regmap, DP0_AUXCFG0, tc_auxcfg0(msg, size)); in tc_aux_transfer()
381 ret = tc_aux_wait_busy(tc); in tc_aux_transfer()
385 ret = regmap_read(tc->regmap, DP0_AUXSTATUS, &auxstatus); in tc_aux_transfer()
405 return tc_aux_read_data(tc, msg->buffer, size); in tc_aux_transfer()
430 static u32 tc_srcctrl(struct tc_data *tc) in tc_srcctrl() argument
438 if (tc->link.scrambler_dis) in tc_srcctrl()
440 if (tc->link.spread) in tc_srcctrl()
442 if (tc->link.num_lanes == 2) in tc_srcctrl()
444 if (tc->link.rate != 162000) in tc_srcctrl()
449 static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) in tc_pllupdate() argument
453 ret = regmap_write(tc->regmap, pllctrl, PLLUPDATE | PLLEN); in tc_pllupdate()
463 static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) in tc_pxl_pll_en() argument
476 dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, in tc_pxl_pll_en()
524 dev_err(tc->dev, "Failed to calc clock for %d pixelclock\n", in tc_pxl_pll_en()
529 dev_dbg(tc->dev, "PLL: got %d, delta %d\n", best_pixelclock, in tc_pxl_pll_en()
531 dev_dbg(tc->dev, "PLL: %d / %d / %d * %d / %d\n", refclk, in tc_pxl_pll_en()
544 ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); in tc_pxl_pll_en()
555 ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam); in tc_pxl_pll_en()
560 return tc_pllupdate(tc, PXL_PLLCTRL); in tc_pxl_pll_en()
563 static int tc_pxl_pll_dis(struct tc_data *tc) in tc_pxl_pll_dis() argument
566 return regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP); in tc_pxl_pll_dis()
569 static int tc_stream_clock_calc(struct tc_data *tc) in tc_stream_clock_calc() argument
586 return regmap_write(tc->regmap, DP0_VIDMNGEN1, 32768); in tc_stream_clock_calc()
589 static int tc_set_syspllparam(struct tc_data *tc) in tc_set_syspllparam() argument
594 rate = clk_get_rate(tc->refclk); in tc_set_syspllparam()
609 dev_err(tc->dev, "Invalid refclk rate: %lu Hz\n", rate); in tc_set_syspllparam()
613 return regmap_write(tc->regmap, SYS_PLLPARAM, pllparam); in tc_set_syspllparam()
616 static int tc_aux_link_setup(struct tc_data *tc) in tc_aux_link_setup() argument
622 ret = tc_set_syspllparam(tc); in tc_aux_link_setup()
626 ret = regmap_write(tc->regmap, DP_PHY_CTRL, in tc_aux_link_setup()
634 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_aux_link_setup()
638 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_aux_link_setup()
642 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 100, 100000); in tc_aux_link_setup()
644 dev_err(tc->dev, "Timeout waiting for PHY to become ready"); in tc_aux_link_setup()
655 ret = regmap_write(tc->regmap, DP0_AUXCFG1, dp0_auxcfg1); in tc_aux_link_setup()
661 dev_err(tc->dev, "tc_aux_link_setup failed: %d\n", ret); in tc_aux_link_setup()
665 static int tc_get_display_props(struct tc_data *tc) in tc_get_display_props() argument
673 ret = drm_dp_dpcd_read(&tc->aux, DP_DPCD_REV, tc->link.dpcd, in tc_get_display_props()
678 revision = tc->link.dpcd[DP_DPCD_REV]; in tc_get_display_props()
679 rate = drm_dp_max_link_rate(tc->link.dpcd); in tc_get_display_props()
680 num_lanes = drm_dp_max_lane_count(tc->link.dpcd); in tc_get_display_props()
683 dev_dbg(tc->dev, "Falling to 2.7 Gbps rate\n"); in tc_get_display_props()
687 tc->link.rate = rate; in tc_get_display_props()
690 dev_dbg(tc->dev, "Falling to 2 lanes\n"); in tc_get_display_props()
694 tc->link.num_lanes = num_lanes; in tc_get_display_props()
696 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAX_DOWNSPREAD, ®); in tc_get_display_props()
699 tc->link.spread = reg & DP_MAX_DOWNSPREAD_0_5; in tc_get_display_props()
701 ret = drm_dp_dpcd_readb(&tc->aux, DP_MAIN_LINK_CHANNEL_CODING, ®); in tc_get_display_props()
705 tc->link.scrambler_dis = false; in tc_get_display_props()
707 ret = drm_dp_dpcd_readb(&tc->aux, DP_EDP_CONFIGURATION_SET, ®); in tc_get_display_props()
710 tc->link.assr = reg & DP_ALTERNATE_SCRAMBLER_RESET_ENABLE; in tc_get_display_props()
712 dev_dbg(tc->dev, "DPCD rev: %d.%d, rate: %s, lanes: %d, framing: %s\n", in tc_get_display_props()
714 (tc->link.rate == 162000) ? "1.62Gbps" : "2.7Gbps", in tc_get_display_props()
715 tc->link.num_lanes, in tc_get_display_props()
716 drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_get_display_props()
718 dev_dbg(tc->dev, "Downspread: %s, scrambler: %s\n", in tc_get_display_props()
719 tc->link.spread ? "0.5%" : "0.0%", in tc_get_display_props()
720 tc->link.scrambler_dis ? "disabled" : "enabled"); in tc_get_display_props()
721 dev_dbg(tc->dev, "Display ASSR: %d, TC358767 ASSR: %d\n", in tc_get_display_props()
722 tc->link.assr, tc->assr); in tc_get_display_props()
727 dev_err(tc->dev, "failed to read DPCD: %d\n", ret); in tc_get_display_props()
731 static int tc_set_video_mode(struct tc_data *tc, in tc_set_video_mode() argument
756 out_bw = tc->link.num_lanes * tc->link.rate; in tc_set_video_mode()
759 dev_dbg(tc->dev, "set mode %dx%d\n", in tc_set_video_mode()
761 dev_dbg(tc->dev, "H margin %d,%d sync %d\n", in tc_set_video_mode()
763 dev_dbg(tc->dev, "V margin %d,%d sync %d\n", in tc_set_video_mode()
765 dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal); in tc_set_video_mode()
774 ret = regmap_write(tc->regmap, VPCTRL0, in tc_set_video_mode()
780 ret = regmap_write(tc->regmap, HTIM01, in tc_set_video_mode()
786 ret = regmap_write(tc->regmap, HTIM02, in tc_set_video_mode()
792 ret = regmap_write(tc->regmap, VTIM01, in tc_set_video_mode()
798 ret = regmap_write(tc->regmap, VTIM02, in tc_set_video_mode()
804 ret = regmap_write(tc->regmap, VFUEN0, VFUEN); /* update settings */ in tc_set_video_mode()
809 ret = regmap_write(tc->regmap, TSTCTL, in tc_set_video_mode()
820 ret = regmap_write(tc->regmap, DP0_VIDSYNCDELAY, in tc_set_video_mode()
824 ret = regmap_write(tc->regmap, DP0_TOTALVAL, in tc_set_video_mode()
830 ret = regmap_write(tc->regmap, DP0_STARTVAL, in tc_set_video_mode()
836 ret = regmap_write(tc->regmap, DP0_ACTIVEVAL, in tc_set_video_mode()
851 ret = regmap_write(tc->regmap, DP0_SYNCVAL, dp0_syncval); in tc_set_video_mode()
855 ret = regmap_write(tc->regmap, DPIPXLFMT, in tc_set_video_mode()
862 ret = regmap_write(tc->regmap, DP0_MISC, in tc_set_video_mode()
872 static int tc_wait_link_training(struct tc_data *tc) in tc_wait_link_training() argument
877 ret = tc_poll_timeout(tc, DP0_LTSTAT, LT_LOOPDONE, in tc_wait_link_training()
880 dev_err(tc->dev, "Link training timeout waiting for LT_LOOPDONE!\n"); in tc_wait_link_training()
884 ret = regmap_read(tc->regmap, DP0_LTSTAT, &value); in tc_wait_link_training()
891 static int tc_main_link_enable(struct tc_data *tc) in tc_main_link_enable() argument
893 struct drm_dp_aux *aux = &tc->aux; in tc_main_link_enable()
894 struct device *dev = tc->dev; in tc_main_link_enable()
900 dev_dbg(tc->dev, "link enable\n"); in tc_main_link_enable()
902 ret = regmap_read(tc->regmap, DP0CTL, &value); in tc_main_link_enable()
907 ret = regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_enable()
912 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc)); in tc_main_link_enable()
916 ret = regmap_write(tc->regmap, DP1_SRCCTRL, in tc_main_link_enable()
917 (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | in tc_main_link_enable()
918 ((tc->link.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); in tc_main_link_enable()
922 ret = tc_set_syspllparam(tc); in tc_main_link_enable()
928 if (tc->link.num_lanes == 2) in tc_main_link_enable()
931 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
936 ret = tc_pllupdate(tc, DP0_PLLCTRL); in tc_main_link_enable()
940 ret = tc_pllupdate(tc, DP1_PLLCTRL); in tc_main_link_enable()
946 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
949 ret = regmap_write(tc->regmap, DP_PHY_CTRL, dp_phy_ctrl); in tc_main_link_enable()
951 ret = tc_poll_timeout(tc, DP_PHY_CTRL, PHY_RDY, PHY_RDY, 500, 100000); in tc_main_link_enable()
958 ret = regmap_update_bits(tc->regmap, DP0_MISC, BPC_8, BPC_8); in tc_main_link_enable()
969 if (tc->assr != tc->link.assr) { in tc_main_link_enable()
971 tc->assr); in tc_main_link_enable()
973 tmp[0] = tc->assr; in tc_main_link_enable()
982 if (tmp[0] != tc->assr) { in tc_main_link_enable()
984 tc->assr); in tc_main_link_enable()
986 tc->link.scrambler_dis = true; in tc_main_link_enable()
991 tmp[0] = drm_dp_link_rate_to_bw_code(tc->link.rate); in tc_main_link_enable()
992 tmp[1] = tc->link.num_lanes; in tc_main_link_enable()
994 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_main_link_enable()
1002 tmp[0] = tc->link.spread ? DP_SPREAD_AMP_0_5 : 0x00; in tc_main_link_enable()
1019 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1025 ret = regmap_write(tc->regmap, DP0_LTLOOPCTRL, in tc_main_link_enable()
1032 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1033 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1040 ret = regmap_write(tc->regmap, DP0CTL, in tc_main_link_enable()
1041 (drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_main_link_enable()
1048 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1053 dev_err(tc->dev, "Link training phase 1 failed: %s\n", in tc_main_link_enable()
1061 ret = regmap_write(tc->regmap, DP0_SNKLTCTRL, in tc_main_link_enable()
1067 ret = regmap_write(tc->regmap, DP0_SRCCTRL, in tc_main_link_enable()
1068 tc_srcctrl(tc) | DP0_SRCCTRL_SCRMBLDIS | in tc_main_link_enable()
1075 ret = tc_wait_link_training(tc); in tc_main_link_enable()
1080 dev_err(tc->dev, "Link training phase 2 failed: %s\n", in tc_main_link_enable()
1095 ret = regmap_write(tc->regmap, DP0_SRCCTRL, tc_srcctrl(tc) | in tc_main_link_enable()
1102 tmp[0] = tc->link.scrambler_dis ? DP_LINK_SCRAMBLING_DISABLE : 0x00; in tc_main_link_enable()
1117 dev_err(tc->dev, "Lane 0 failed: %x\n", value); in tc_main_link_enable()
1121 if (tc->link.num_lanes == 2) { in tc_main_link_enable()
1125 dev_err(tc->dev, "Lane 1 failed: %x\n", value); in tc_main_link_enable()
1130 dev_err(tc->dev, "Interlane align failed\n"); in tc_main_link_enable()
1147 dev_err(tc->dev, "Failed to read DPCD: %d\n", ret); in tc_main_link_enable()
1150 dev_err(tc->dev, "Failed to write DPCD: %d\n", ret); in tc_main_link_enable()
1154 static int tc_main_link_disable(struct tc_data *tc) in tc_main_link_disable() argument
1158 dev_dbg(tc->dev, "link disable\n"); in tc_main_link_disable()
1160 ret = regmap_write(tc->regmap, DP0_SRCCTRL, 0); in tc_main_link_disable()
1164 return regmap_write(tc->regmap, DP0CTL, 0); in tc_main_link_disable()
1167 static int tc_stream_enable(struct tc_data *tc) in tc_stream_enable() argument
1172 dev_dbg(tc->dev, "enable video stream\n"); in tc_stream_enable()
1176 ret = tc_pxl_pll_en(tc, clk_get_rate(tc->refclk), in tc_stream_enable()
1177 1000 * tc->mode.clock); in tc_stream_enable()
1182 ret = tc_set_video_mode(tc, &tc->mode); in tc_stream_enable()
1187 ret = tc_stream_clock_calc(tc); in tc_stream_enable()
1192 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_stream_enable()
1194 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_stream_enable()
1206 ret = regmap_write(tc->regmap, DP0CTL, value); in tc_stream_enable()
1215 ret = regmap_write(tc->regmap, SYSCTRL, value); in tc_stream_enable()
1222 static int tc_stream_disable(struct tc_data *tc) in tc_stream_disable() argument
1226 dev_dbg(tc->dev, "disable video stream\n"); in tc_stream_disable()
1228 ret = regmap_update_bits(tc->regmap, DP0CTL, VID_EN, 0); in tc_stream_disable()
1232 tc_pxl_pll_dis(tc); in tc_stream_disable()
1239 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_enable() local
1242 ret = tc_get_display_props(tc); in tc_bridge_enable()
1244 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_bridge_enable()
1248 ret = tc_main_link_enable(tc); in tc_bridge_enable()
1250 dev_err(tc->dev, "main link enable error: %d\n", ret); in tc_bridge_enable()
1254 ret = tc_stream_enable(tc); in tc_bridge_enable()
1256 dev_err(tc->dev, "main link stream start error: %d\n", ret); in tc_bridge_enable()
1257 tc_main_link_disable(tc); in tc_bridge_enable()
1264 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_disable() local
1267 ret = tc_stream_disable(tc); in tc_bridge_disable()
1269 dev_err(tc->dev, "main link stream stop error: %d\n", ret); in tc_bridge_disable()
1271 ret = tc_main_link_disable(tc); in tc_bridge_disable()
1273 dev_err(tc->dev, "main link disable error: %d\n", ret); in tc_bridge_disable()
1292 struct tc_data *tc = bridge_to_tc(bridge); in tc_mode_valid() local
1301 avail = tc->link.num_lanes * tc->link.rate; in tc_mode_valid()
1313 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_mode_set() local
1315 tc->mode = *mode; in tc_bridge_mode_set()
1321 struct tc_data *tc = bridge_to_tc(bridge); in tc_get_edid() local
1323 return drm_get_edid(connector, &tc->aux.ddc); in tc_get_edid()
1328 struct tc_data *tc = connector_to_tc(connector); in tc_connector_get_modes() local
1333 ret = tc_get_display_props(tc); in tc_connector_get_modes()
1335 dev_err(tc->dev, "failed to read display props: %d\n", ret); in tc_connector_get_modes()
1339 if (tc->panel_bridge) { in tc_connector_get_modes()
1340 num_modes = drm_bridge_get_modes(tc->panel_bridge, connector); in tc_connector_get_modes()
1345 edid = tc_get_edid(&tc->bridge, connector); in tc_connector_get_modes()
1358 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_detect() local
1363 ret = regmap_read(tc->regmap, GPIOI, &val); in tc_bridge_detect()
1367 conn = val & BIT(tc->hpd_pin); in tc_bridge_detect()
1378 struct tc_data *tc = connector_to_tc(connector); in tc_connector_detect() local
1380 if (tc->hpd_pin >= 0) in tc_connector_detect()
1381 return tc_bridge_detect(&tc->bridge); in tc_connector_detect()
1383 if (tc->panel_bridge) in tc_connector_detect()
1402 struct tc_data *tc = bridge_to_tc(bridge); in tc_bridge_attach() local
1406 if (tc->panel_bridge) { in tc_bridge_attach()
1408 ret = drm_bridge_attach(tc->bridge.encoder, tc->panel_bridge, in tc_bridge_attach()
1409 &tc->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in tc_bridge_attach()
1418 drm_connector_helper_add(&tc->connector, &tc_connector_helper_funcs); in tc_bridge_attach()
1419 ret = drm_connector_init(drm, &tc->connector, &tc_connector_funcs, tc->bridge.type); in tc_bridge_attach()
1424 if (tc->hpd_pin >= 0) { in tc_bridge_attach()
1425 if (tc->have_irq) in tc_bridge_attach()
1426 tc->connector.polled = DRM_CONNECTOR_POLL_HPD; in tc_bridge_attach()
1428 tc->connector.polled = DRM_CONNECTOR_POLL_CONNECT | in tc_bridge_attach()
1432 drm_display_info_set_bus_formats(&tc->connector.display_info, in tc_bridge_attach()
1434 tc->connector.display_info.bus_flags = in tc_bridge_attach()
1438 drm_connector_attach_encoder(&tc->connector, tc->bridge.encoder); in tc_bridge_attach()
1497 struct tc_data *tc = arg; in tc_irq_handler() local
1501 r = regmap_read(tc->regmap, INTSTS_G, &val); in tc_irq_handler()
1511 regmap_read(tc->regmap, SYSSTAT, &stat); in tc_irq_handler()
1513 dev_err(tc->dev, "syserr %x\n", stat); in tc_irq_handler()
1516 if (tc->hpd_pin >= 0 && tc->bridge.dev) { in tc_irq_handler()
1523 bool h = val & INT_GPIO_H(tc->hpd_pin); in tc_irq_handler()
1524 bool lc = val & INT_GPIO_LC(tc->hpd_pin); in tc_irq_handler()
1526 dev_dbg(tc->dev, "GPIO%d: %s %s\n", tc->hpd_pin, in tc_irq_handler()
1530 drm_kms_helper_hotplug_event(tc->bridge.dev); in tc_irq_handler()
1533 regmap_write(tc->regmap, INTSTS_G, val); in tc_irq_handler()
1538 static int tc_probe_edp_bridge_endpoint(struct tc_data *tc) in tc_probe_edp_bridge_endpoint() argument
1540 struct device *dev = tc->dev; in tc_probe_edp_bridge_endpoint()
1556 tc->panel_bridge = panel_bridge; in tc_probe_edp_bridge_endpoint()
1557 tc->bridge.type = DRM_MODE_CONNECTOR_eDP; in tc_probe_edp_bridge_endpoint()
1559 tc->bridge.type = DRM_MODE_CONNECTOR_DisplayPort; in tc_probe_edp_bridge_endpoint()
1575 struct tc_data *tc; in tc_probe() local
1578 tc = devm_kzalloc(dev, sizeof(*tc), GFP_KERNEL); in tc_probe()
1579 if (!tc) in tc_probe()
1582 tc->dev = dev; in tc_probe()
1584 ret = tc_probe_edp_bridge_endpoint(tc); in tc_probe()
1588 tc->refclk = devm_clk_get(dev, "ref"); in tc_probe()
1589 if (IS_ERR(tc->refclk)) { in tc_probe()
1590 ret = PTR_ERR(tc->refclk); in tc_probe()
1595 ret = clk_prepare_enable(tc->refclk); in tc_probe()
1599 ret = devm_add_action_or_reset(dev, tc_clk_disable, tc->refclk); in tc_probe()
1607 tc->sd_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH); in tc_probe()
1608 if (IS_ERR(tc->sd_gpio)) in tc_probe()
1609 return PTR_ERR(tc->sd_gpio); in tc_probe()
1611 if (tc->sd_gpio) { in tc_probe()
1612 gpiod_set_value_cansleep(tc->sd_gpio, 0); in tc_probe()
1617 tc->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in tc_probe()
1618 if (IS_ERR(tc->reset_gpio)) in tc_probe()
1619 return PTR_ERR(tc->reset_gpio); in tc_probe()
1621 if (tc->reset_gpio) { in tc_probe()
1622 gpiod_set_value_cansleep(tc->reset_gpio, 1); in tc_probe()
1626 tc->regmap = devm_regmap_init_i2c(client, &tc_regmap_config); in tc_probe()
1627 if (IS_ERR(tc->regmap)) { in tc_probe()
1628 ret = PTR_ERR(tc->regmap); in tc_probe()
1634 &tc->hpd_pin); in tc_probe()
1636 tc->hpd_pin = -ENODEV; in tc_probe()
1638 if (tc->hpd_pin < 0 || tc->hpd_pin > 1) { in tc_probe()
1646 regmap_write(tc->regmap, INTCTL_G, INT_SYSERR); in tc_probe()
1651 "tc358767-irq", tc); in tc_probe()
1657 tc->have_irq = true; in tc_probe()
1660 ret = regmap_read(tc->regmap, TC_IDREG, &tc->rev); in tc_probe()
1662 dev_err(tc->dev, "can not read device ID: %d\n", ret); in tc_probe()
1666 if ((tc->rev != 0x6601) && (tc->rev != 0x6603)) { in tc_probe()
1667 dev_err(tc->dev, "invalid device ID: 0x%08x\n", tc->rev); in tc_probe()
1671 tc->assr = (tc->rev == 0x6601); /* Enable ASSR for eDP panels */ in tc_probe()
1673 if (!tc->reset_gpio) { in tc_probe()
1680 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
1683 regmap_update_bits(tc->regmap, SYSRSTENB, in tc_probe()
1689 if (tc->hpd_pin >= 0) { in tc_probe()
1690 u32 lcnt_reg = tc->hpd_pin == 0 ? INT_GP0_LCNT : INT_GP1_LCNT; in tc_probe()
1691 u32 h_lc = INT_GPIO_H(tc->hpd_pin) | INT_GPIO_LC(tc->hpd_pin); in tc_probe()
1694 regmap_write(tc->regmap, lcnt_reg, in tc_probe()
1695 clk_get_rate(tc->refclk) * 2 / 1000); in tc_probe()
1697 regmap_write(tc->regmap, GPIOM, BIT(tc->hpd_pin)); in tc_probe()
1699 if (tc->have_irq) { in tc_probe()
1701 regmap_update_bits(tc->regmap, INTCTL_G, h_lc, h_lc); in tc_probe()
1705 ret = tc_aux_link_setup(tc); in tc_probe()
1710 tc->aux.name = "TC358767 AUX i2c adapter"; in tc_probe()
1711 tc->aux.dev = tc->dev; in tc_probe()
1712 tc->aux.transfer = tc_aux_transfer; in tc_probe()
1713 ret = drm_dp_aux_register(&tc->aux); in tc_probe()
1717 tc->bridge.funcs = &tc_bridge_funcs; in tc_probe()
1718 if (tc->hpd_pin >= 0) in tc_probe()
1719 tc->bridge.ops |= DRM_BRIDGE_OP_DETECT; in tc_probe()
1720 tc->bridge.ops |= DRM_BRIDGE_OP_EDID; in tc_probe()
1722 tc->bridge.of_node = dev->of_node; in tc_probe()
1723 drm_bridge_add(&tc->bridge); in tc_probe()
1725 i2c_set_clientdata(client, tc); in tc_probe()
1732 struct tc_data *tc = i2c_get_clientdata(client); in tc_remove() local
1734 drm_bridge_remove(&tc->bridge); in tc_remove()
1735 drm_dp_aux_unregister(&tc->aux); in tc_remove()