Lines Matching refs:gpu
27 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target() local
37 if (gpu->funcs->gpu_set_freq) in msm_devfreq_target()
38 gpu->funcs->gpu_set_freq(gpu, opp); in msm_devfreq_target()
40 clk_set_rate(gpu->core_clk, *freq); in msm_devfreq_target()
50 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status() local
53 if (gpu->funcs->gpu_get_freq) in msm_devfreq_get_dev_status()
54 status->current_frequency = gpu->funcs->gpu_get_freq(gpu); in msm_devfreq_get_dev_status()
56 status->current_frequency = clk_get_rate(gpu->core_clk); in msm_devfreq_get_dev_status()
58 status->busy_time = gpu->funcs->gpu_busy(gpu); in msm_devfreq_get_dev_status()
61 status->total_time = ktime_us_delta(time, gpu->devfreq.time); in msm_devfreq_get_dev_status()
62 gpu->devfreq.time = time; in msm_devfreq_get_dev_status()
69 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_cur_freq() local
71 if (gpu->funcs->gpu_get_freq) in msm_devfreq_get_cur_freq()
72 *freq = gpu->funcs->gpu_get_freq(gpu); in msm_devfreq_get_cur_freq()
74 *freq = clk_get_rate(gpu->core_clk); in msm_devfreq_get_cur_freq()
86 static void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init() argument
89 if (!gpu->funcs->gpu_busy) in msm_devfreq_init()
92 msm_devfreq_profile.initial_freq = gpu->fast_rate; in msm_devfreq_init()
103 gpu->devfreq.devfreq = devm_devfreq_add_device(&gpu->pdev->dev, in msm_devfreq_init()
107 if (IS_ERR(gpu->devfreq.devfreq)) { in msm_devfreq_init()
108 DRM_DEV_ERROR(&gpu->pdev->dev, "Couldn't initialize GPU devfreq\n"); in msm_devfreq_init()
109 gpu->devfreq.devfreq = NULL; in msm_devfreq_init()
112 devfreq_suspend_device(gpu->devfreq.devfreq); in msm_devfreq_init()
115 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail() argument
117 struct drm_device *dev = gpu->dev; in enable_pwrrail()
120 if (gpu->gpu_reg) { in enable_pwrrail()
121 ret = regulator_enable(gpu->gpu_reg); in enable_pwrrail()
128 if (gpu->gpu_cx) { in enable_pwrrail()
129 ret = regulator_enable(gpu->gpu_cx); in enable_pwrrail()
139 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail() argument
141 if (gpu->gpu_cx) in disable_pwrrail()
142 regulator_disable(gpu->gpu_cx); in disable_pwrrail()
143 if (gpu->gpu_reg) in disable_pwrrail()
144 regulator_disable(gpu->gpu_reg); in disable_pwrrail()
148 static int enable_clk(struct msm_gpu *gpu) in enable_clk() argument
150 if (gpu->core_clk && gpu->fast_rate) in enable_clk()
151 clk_set_rate(gpu->core_clk, gpu->fast_rate); in enable_clk()
154 if (gpu->rbbmtimer_clk) in enable_clk()
155 clk_set_rate(gpu->rbbmtimer_clk, 19200000); in enable_clk()
157 return clk_bulk_prepare_enable(gpu->nr_clocks, gpu->grp_clks); in enable_clk()
160 static int disable_clk(struct msm_gpu *gpu) in disable_clk() argument
162 clk_bulk_disable_unprepare(gpu->nr_clocks, gpu->grp_clks); in disable_clk()
169 if (gpu->core_clk) in disable_clk()
170 clk_set_rate(gpu->core_clk, 27000000); in disable_clk()
172 if (gpu->rbbmtimer_clk) in disable_clk()
173 clk_set_rate(gpu->rbbmtimer_clk, 0); in disable_clk()
178 static int enable_axi(struct msm_gpu *gpu) in enable_axi() argument
180 if (gpu->ebi1_clk) in enable_axi()
181 clk_prepare_enable(gpu->ebi1_clk); in enable_axi()
185 static int disable_axi(struct msm_gpu *gpu) in disable_axi() argument
187 if (gpu->ebi1_clk) in disable_axi()
188 clk_disable_unprepare(gpu->ebi1_clk); in disable_axi()
192 void msm_gpu_resume_devfreq(struct msm_gpu *gpu) in msm_gpu_resume_devfreq() argument
194 gpu->devfreq.busy_cycles = 0; in msm_gpu_resume_devfreq()
195 gpu->devfreq.time = ktime_get(); in msm_gpu_resume_devfreq()
197 devfreq_resume_device(gpu->devfreq.devfreq); in msm_gpu_resume_devfreq()
200 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume() argument
204 DBG("%s", gpu->name); in msm_gpu_pm_resume()
207 ret = enable_pwrrail(gpu); in msm_gpu_pm_resume()
211 ret = enable_clk(gpu); in msm_gpu_pm_resume()
215 ret = enable_axi(gpu); in msm_gpu_pm_resume()
219 msm_gpu_resume_devfreq(gpu); in msm_gpu_pm_resume()
221 gpu->needs_hw_init = true; in msm_gpu_pm_resume()
226 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend() argument
230 DBG("%s", gpu->name); in msm_gpu_pm_suspend()
233 devfreq_suspend_device(gpu->devfreq.devfreq); in msm_gpu_pm_suspend()
235 ret = disable_axi(gpu); in msm_gpu_pm_suspend()
239 ret = disable_clk(gpu); in msm_gpu_pm_suspend()
243 ret = disable_pwrrail(gpu); in msm_gpu_pm_suspend()
250 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init() argument
254 WARN_ON(!mutex_is_locked(&gpu->dev->struct_mutex)); in msm_gpu_hw_init()
256 if (!gpu->needs_hw_init) in msm_gpu_hw_init()
259 disable_irq(gpu->irq); in msm_gpu_hw_init()
260 ret = gpu->funcs->hw_init(gpu); in msm_gpu_hw_init()
262 gpu->needs_hw_init = false; in msm_gpu_hw_init()
263 enable_irq(gpu->irq); in msm_gpu_hw_init()
272 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_read() local
277 state = msm_gpu_crashstate_get(gpu); in msm_gpu_devcoredump_read()
298 gpu->funcs->show(gpu, state, &p); in msm_gpu_devcoredump_read()
300 msm_gpu_crashstate_put(gpu); in msm_gpu_devcoredump_read()
307 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_free() local
309 msm_gpu_crashstate_put(gpu); in msm_gpu_devcoredump_free()
343 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, in msm_gpu_crashstate_capture() argument
349 if (!gpu->funcs->gpu_state_get) in msm_gpu_crashstate_capture()
353 if (gpu->crashstate) in msm_gpu_crashstate_capture()
356 state = gpu->funcs->gpu_state_get(gpu); in msm_gpu_crashstate_capture()
397 gpu->crashstate = state; in msm_gpu_crashstate_capture()
400 dev_coredumpm(gpu->dev->dev, THIS_MODULE, gpu, 0, GFP_KERNEL, in msm_gpu_crashstate_capture()
404 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, in msm_gpu_crashstate_capture() argument
414 static void update_fences(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in update_fences() argument
433 WARN_ON(!mutex_is_locked(&ring->gpu->dev->struct_mutex)); in find_submit()
442 static void retire_submits(struct msm_gpu *gpu);
446 struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work); in recover_worker() local
447 struct drm_device *dev = gpu->dev; in recover_worker()
450 struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu); in recover_worker()
456 DRM_DEV_ERROR(dev->dev, "%s: hangcheck recover!\n", gpu->name); in recover_worker()
463 gpu->global_faults++; in recover_worker()
475 gpu->name, comm, cmd); in recover_worker()
484 pm_runtime_get_sync(&gpu->pdev->dev); in recover_worker()
485 msm_gpu_crashstate_capture(gpu, submit, comm, cmd); in recover_worker()
486 pm_runtime_put_sync(&gpu->pdev->dev); in recover_worker()
496 for (i = 0; i < gpu->nr_rings; i++) { in recover_worker()
497 struct msm_ringbuffer *ring = gpu->rb[i]; in recover_worker()
508 update_fences(gpu, ring, fence); in recover_worker()
511 if (msm_gpu_active(gpu)) { in recover_worker()
513 retire_submits(gpu); in recover_worker()
515 pm_runtime_get_sync(&gpu->pdev->dev); in recover_worker()
516 gpu->funcs->recover(gpu); in recover_worker()
517 pm_runtime_put_sync(&gpu->pdev->dev); in recover_worker()
523 for (i = 0; i < gpu->nr_rings; i++) { in recover_worker()
524 struct msm_ringbuffer *ring = gpu->rb[i]; in recover_worker()
527 gpu->funcs->submit(gpu, submit); in recover_worker()
533 msm_gpu_retire(gpu); in recover_worker()
536 static void hangcheck_timer_reset(struct msm_gpu *gpu) in hangcheck_timer_reset() argument
538 DBG("%s", gpu->name); in hangcheck_timer_reset()
539 mod_timer(&gpu->hangcheck_timer, in hangcheck_timer_reset()
545 struct msm_gpu *gpu = from_timer(gpu, t, hangcheck_timer); in hangcheck_handler() local
546 struct drm_device *dev = gpu->dev; in hangcheck_handler()
548 struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu); in hangcheck_handler()
558 gpu->name, ring->id); in hangcheck_handler()
560 gpu->name, fence); in hangcheck_handler()
562 gpu->name, ring->seqno); in hangcheck_handler()
564 queue_work(priv->wq, &gpu->recover_work); in hangcheck_handler()
569 hangcheck_timer_reset(gpu); in hangcheck_handler()
572 queue_work(priv->wq, &gpu->retire_work); in hangcheck_handler()
580 static int update_hw_cntrs(struct msm_gpu *gpu, uint32_t ncntrs, uint32_t *cntrs) in update_hw_cntrs() argument
582 uint32_t current_cntrs[ARRAY_SIZE(gpu->last_cntrs)]; in update_hw_cntrs()
583 int i, n = min(ncntrs, gpu->num_perfcntrs); in update_hw_cntrs()
586 for (i = 0; i < gpu->num_perfcntrs; i++) in update_hw_cntrs()
587 current_cntrs[i] = gpu_read(gpu, gpu->perfcntrs[i].sample_reg); in update_hw_cntrs()
591 cntrs[i] = current_cntrs[i] - gpu->last_cntrs[i]; in update_hw_cntrs()
594 for (i = 0; i < gpu->num_perfcntrs; i++) in update_hw_cntrs()
595 gpu->last_cntrs[i] = current_cntrs[i]; in update_hw_cntrs()
600 static void update_sw_cntrs(struct msm_gpu *gpu) in update_sw_cntrs() argument
606 spin_lock_irqsave(&gpu->perf_lock, flags); in update_sw_cntrs()
607 if (!gpu->perfcntr_active) in update_sw_cntrs()
611 elapsed = ktime_to_us(ktime_sub(time, gpu->last_sample.time)); in update_sw_cntrs()
613 gpu->totaltime += elapsed; in update_sw_cntrs()
614 if (gpu->last_sample.active) in update_sw_cntrs()
615 gpu->activetime += elapsed; in update_sw_cntrs()
617 gpu->last_sample.active = msm_gpu_active(gpu); in update_sw_cntrs()
618 gpu->last_sample.time = time; in update_sw_cntrs()
621 spin_unlock_irqrestore(&gpu->perf_lock, flags); in update_sw_cntrs()
624 void msm_gpu_perfcntr_start(struct msm_gpu *gpu) in msm_gpu_perfcntr_start() argument
628 pm_runtime_get_sync(&gpu->pdev->dev); in msm_gpu_perfcntr_start()
630 spin_lock_irqsave(&gpu->perf_lock, flags); in msm_gpu_perfcntr_start()
632 gpu->last_sample.active = msm_gpu_active(gpu); in msm_gpu_perfcntr_start()
633 gpu->last_sample.time = ktime_get(); in msm_gpu_perfcntr_start()
634 gpu->activetime = gpu->totaltime = 0; in msm_gpu_perfcntr_start()
635 gpu->perfcntr_active = true; in msm_gpu_perfcntr_start()
636 update_hw_cntrs(gpu, 0, NULL); in msm_gpu_perfcntr_start()
637 spin_unlock_irqrestore(&gpu->perf_lock, flags); in msm_gpu_perfcntr_start()
640 void msm_gpu_perfcntr_stop(struct msm_gpu *gpu) in msm_gpu_perfcntr_stop() argument
642 gpu->perfcntr_active = false; in msm_gpu_perfcntr_stop()
643 pm_runtime_put_sync(&gpu->pdev->dev); in msm_gpu_perfcntr_stop()
647 int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, in msm_gpu_perfcntr_sample() argument
653 spin_lock_irqsave(&gpu->perf_lock, flags); in msm_gpu_perfcntr_sample()
655 if (!gpu->perfcntr_active) { in msm_gpu_perfcntr_sample()
660 *activetime = gpu->activetime; in msm_gpu_perfcntr_sample()
661 *totaltime = gpu->totaltime; in msm_gpu_perfcntr_sample()
663 gpu->activetime = gpu->totaltime = 0; in msm_gpu_perfcntr_sample()
665 ret = update_hw_cntrs(gpu, ncntrs, cntrs); in msm_gpu_perfcntr_sample()
668 spin_unlock_irqrestore(&gpu->perf_lock, flags); in msm_gpu_perfcntr_sample()
677 static void retire_submit(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in retire_submit() argument
707 pm_runtime_mark_last_busy(&gpu->pdev->dev); in retire_submit()
708 pm_runtime_put_autosuspend(&gpu->pdev->dev); in retire_submit()
712 static void retire_submits(struct msm_gpu *gpu) in retire_submits() argument
714 struct drm_device *dev = gpu->dev; in retire_submits()
721 for (i = 0; i < gpu->nr_rings; i++) { in retire_submits()
722 struct msm_ringbuffer *ring = gpu->rb[i]; in retire_submits()
726 retire_submit(gpu, ring, submit); in retire_submits()
733 struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work); in retire_worker() local
734 struct drm_device *dev = gpu->dev; in retire_worker()
737 for (i = 0; i < gpu->nr_rings; i++) in retire_worker()
738 update_fences(gpu, gpu->rb[i], gpu->rb[i]->memptrs->fence); in retire_worker()
741 retire_submits(gpu); in retire_worker()
746 void msm_gpu_retire(struct msm_gpu *gpu) in msm_gpu_retire() argument
748 struct msm_drm_private *priv = gpu->dev->dev_private; in msm_gpu_retire()
749 queue_work(priv->wq, &gpu->retire_work); in msm_gpu_retire()
750 update_sw_cntrs(gpu); in msm_gpu_retire()
754 void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in msm_gpu_submit() argument
756 struct drm_device *dev = gpu->dev; in msm_gpu_submit()
763 pm_runtime_get_sync(&gpu->pdev->dev); in msm_gpu_submit()
765 msm_gpu_hw_init(gpu); in msm_gpu_submit()
773 update_sw_cntrs(gpu); in msm_gpu_submit()
783 WARN_ON(is_active(msm_obj) && (msm_obj->gpu != gpu)); in msm_gpu_submit()
794 msm_gem_active_get(drm_obj, gpu); in msm_gpu_submit()
797 gpu->funcs->submit(gpu, submit); in msm_gpu_submit()
800 hangcheck_timer_reset(gpu); in msm_gpu_submit()
809 struct msm_gpu *gpu = data; in irq_handler() local
810 return gpu->funcs->irq(gpu); in irq_handler()
813 static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu) in get_clocks() argument
815 int ret = devm_clk_bulk_get_all(&pdev->dev, &gpu->grp_clks); in get_clocks()
818 gpu->nr_clocks = 0; in get_clocks()
822 gpu->nr_clocks = ret; in get_clocks()
824 gpu->core_clk = msm_clk_bulk_get_clock(gpu->grp_clks, in get_clocks()
825 gpu->nr_clocks, "core"); in get_clocks()
827 gpu->rbbmtimer_clk = msm_clk_bulk_get_clock(gpu->grp_clks, in get_clocks()
828 gpu->nr_clocks, "rbbmtimer"); in get_clocks()
835 msm_gpu_create_private_address_space(struct msm_gpu *gpu, struct task_struct *task) in msm_gpu_create_private_address_space() argument
838 if (!gpu) in msm_gpu_create_private_address_space()
845 if (gpu->funcs->create_private_address_space) { in msm_gpu_create_private_address_space()
846 aspace = gpu->funcs->create_private_address_space(gpu); in msm_gpu_create_private_address_space()
852 aspace = msm_gem_address_space_get(gpu->aspace); in msm_gpu_create_private_address_space()
858 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, in msm_gpu_init() argument
865 if (WARN_ON(gpu->num_perfcntrs > ARRAY_SIZE(gpu->last_cntrs))) in msm_gpu_init()
866 gpu->num_perfcntrs = ARRAY_SIZE(gpu->last_cntrs); in msm_gpu_init()
868 gpu->dev = drm; in msm_gpu_init()
869 gpu->funcs = funcs; in msm_gpu_init()
870 gpu->name = name; in msm_gpu_init()
872 INIT_LIST_HEAD(&gpu->active_list); in msm_gpu_init()
873 INIT_WORK(&gpu->retire_work, retire_worker); in msm_gpu_init()
874 INIT_WORK(&gpu->recover_work, recover_worker); in msm_gpu_init()
877 timer_setup(&gpu->hangcheck_timer, hangcheck_handler, 0); in msm_gpu_init()
879 spin_lock_init(&gpu->perf_lock); in msm_gpu_init()
883 gpu->mmio = msm_ioremap(pdev, config->ioname, name); in msm_gpu_init()
884 if (IS_ERR(gpu->mmio)) { in msm_gpu_init()
885 ret = PTR_ERR(gpu->mmio); in msm_gpu_init()
890 gpu->irq = platform_get_irq(pdev, 0); in msm_gpu_init()
891 if (gpu->irq < 0) { in msm_gpu_init()
892 ret = gpu->irq; in msm_gpu_init()
897 ret = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, in msm_gpu_init()
898 IRQF_TRIGGER_HIGH, gpu->name, gpu); in msm_gpu_init()
900 DRM_DEV_ERROR(drm->dev, "failed to request IRQ%u: %d\n", gpu->irq, ret); in msm_gpu_init()
904 ret = get_clocks(pdev, gpu); in msm_gpu_init()
908 gpu->ebi1_clk = msm_clk_get(pdev, "bus"); in msm_gpu_init()
909 DBG("ebi1_clk: %p", gpu->ebi1_clk); in msm_gpu_init()
910 if (IS_ERR(gpu->ebi1_clk)) in msm_gpu_init()
911 gpu->ebi1_clk = NULL; in msm_gpu_init()
914 gpu->gpu_reg = devm_regulator_get(&pdev->dev, "vdd"); in msm_gpu_init()
915 DBG("gpu_reg: %p", gpu->gpu_reg); in msm_gpu_init()
916 if (IS_ERR(gpu->gpu_reg)) in msm_gpu_init()
917 gpu->gpu_reg = NULL; in msm_gpu_init()
919 gpu->gpu_cx = devm_regulator_get(&pdev->dev, "vddcx"); in msm_gpu_init()
920 DBG("gpu_cx: %p", gpu->gpu_cx); in msm_gpu_init()
921 if (IS_ERR(gpu->gpu_cx)) in msm_gpu_init()
922 gpu->gpu_cx = NULL; in msm_gpu_init()
924 gpu->pdev = pdev; in msm_gpu_init()
925 platform_set_drvdata(pdev, &gpu->adreno_smmu); in msm_gpu_init()
927 msm_devfreq_init(gpu); in msm_gpu_init()
930 gpu->aspace = gpu->funcs->create_address_space(gpu, pdev); in msm_gpu_init()
932 if (gpu->aspace == NULL) in msm_gpu_init()
934 else if (IS_ERR(gpu->aspace)) { in msm_gpu_init()
935 ret = PTR_ERR(gpu->aspace); in msm_gpu_init()
941 check_apriv(gpu, MSM_BO_UNCACHED), gpu->aspace, &gpu->memptrs_bo, in msm_gpu_init()
950 msm_gem_object_set_name(gpu->memptrs_bo, "memptrs"); in msm_gpu_init()
952 if (nr_rings > ARRAY_SIZE(gpu->rb)) { in msm_gpu_init()
954 ARRAY_SIZE(gpu->rb)); in msm_gpu_init()
955 nr_rings = ARRAY_SIZE(gpu->rb); in msm_gpu_init()
960 gpu->rb[i] = msm_ringbuffer_new(gpu, i, memptrs, memptrs_iova); in msm_gpu_init()
962 if (IS_ERR(gpu->rb[i])) { in msm_gpu_init()
963 ret = PTR_ERR(gpu->rb[i]); in msm_gpu_init()
973 gpu->nr_rings = nr_rings; in msm_gpu_init()
978 for (i = 0; i < ARRAY_SIZE(gpu->rb); i++) { in msm_gpu_init()
979 msm_ringbuffer_destroy(gpu->rb[i]); in msm_gpu_init()
980 gpu->rb[i] = NULL; in msm_gpu_init()
983 msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace, false); in msm_gpu_init()
989 void msm_gpu_cleanup(struct msm_gpu *gpu) in msm_gpu_cleanup() argument
993 DBG("%s", gpu->name); in msm_gpu_cleanup()
995 WARN_ON(!list_empty(&gpu->active_list)); in msm_gpu_cleanup()
997 for (i = 0; i < ARRAY_SIZE(gpu->rb); i++) { in msm_gpu_cleanup()
998 msm_ringbuffer_destroy(gpu->rb[i]); in msm_gpu_cleanup()
999 gpu->rb[i] = NULL; in msm_gpu_cleanup()
1002 msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace, false); in msm_gpu_cleanup()
1004 if (!IS_ERR_OR_NULL(gpu->aspace)) { in msm_gpu_cleanup()
1005 gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu); in msm_gpu_cleanup()
1006 msm_gem_address_space_put(gpu->aspace); in msm_gpu_cleanup()