1084 		track->vgt_strmout_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1211 			track->cb_color_frag_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1242 			track->cb_color_tile_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1282 		track->cb_color_bo[tmp] = reloc->robj;  in r600_cs_check_reg()
1295 		track->db_bo = reloc->robj;  in r600_cs_check_reg()
1308 		track->htile_bo = reloc->robj;  in r600_cs_check_reg()
1806 			if ((tmp + size) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
1808 					 tmp + size, radeon_bo_size(reloc->robj));  in r600_packet3_check()
1836 			if ((tmp + size) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
1838 					 tmp + size, radeon_bo_size(reloc->robj));  in r600_packet3_check()
1970 				texture = reloc->robj;  in r600_packet3_check()
1978 				mipmap = reloc->robj;  in r600_packet3_check()
2000 				if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2003 						 size + offset, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2004 					ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj) - offset;  in r600_packet3_check()
2100 			if (reloc->robj != track->vgt_strmout_bo[idx_value]) {  in r600_packet3_check()
2112 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2114 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2145 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2147 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2164 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2166 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2193 		if ((offset + 8) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2195 				  offset + 8, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2218 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2220 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2242 			if ((offset + 4) > radeon_bo_size(reloc->robj)) {  in r600_packet3_check()
2244 					  offset + 4, radeon_bo_size(reloc->robj));  in r600_packet3_check()
2417 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2419 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()
2484 			if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {  in r600_dma_cs_parse()
2486 					 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));  in r600_dma_cs_parse()
2489 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2491 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()
2507 			if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {  in r600_dma_cs_parse()
2509 					 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));  in r600_dma_cs_parse()