65 	INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);  in radeon_vce_init()
122 	if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)  in radeon_vce_init()
126 		 start, mid, end, rdev->vce.fb_version);  in radeon_vce_init()
128 	rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);  in radeon_vce_init()
131 	if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) &&  in radeon_vce_init()
132 	    (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) &&  in radeon_vce_init()
133 	    (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8))))  in radeon_vce_init()
144 			     &rdev->vce.vcpu_bo);  in radeon_vce_init()
150 	r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);  in radeon_vce_init()
152 		radeon_bo_unref(&rdev->vce.vcpu_bo);  in radeon_vce_init()
157 	r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,  in radeon_vce_init()
158 			  &rdev->vce.gpu_addr);  in radeon_vce_init()
159 	radeon_bo_unreserve(rdev->vce.vcpu_bo);  in radeon_vce_init()
161 		radeon_bo_unref(&rdev->vce.vcpu_bo);  in radeon_vce_init()
167 		atomic_set(&rdev->vce.handles[i], 0);  in radeon_vce_init()
168 		rdev->vce.filp[i] = NULL;  in radeon_vce_init()
183 	if (rdev->vce.vcpu_bo == NULL)  in radeon_vce_fini()
186 	radeon_bo_unref(&rdev->vce.vcpu_bo);  in radeon_vce_fini()
201 	if (rdev->vce.vcpu_bo == NULL)  in radeon_vce_suspend()
205 		if (atomic_read(&rdev->vce.handles[i]))  in radeon_vce_suspend()
226 	if (rdev->vce.vcpu_bo == NULL)  in radeon_vce_resume()
229 	r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);  in radeon_vce_resume()
235 	r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);  in radeon_vce_resume()
237 		radeon_bo_unreserve(rdev->vce.vcpu_bo);  in radeon_vce_resume()
242 	memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo));  in radeon_vce_resume()
248 	radeon_bo_kunmap(rdev->vce.vcpu_bo);  in radeon_vce_resume()
250 	radeon_bo_unreserve(rdev->vce.vcpu_bo);  in radeon_vce_resume()
265 		container_of(work, struct radeon_device, vce.idle_work.work);  in radeon_vce_idle_work_handler()
275 		schedule_delayed_work(&rdev->vce.idle_work,  in radeon_vce_idle_work_handler()
290 	bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);  in radeon_vce_note_usage()
291 	set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,  in radeon_vce_note_usage()
320 		uint32_t handle = atomic_read(&rdev->vce.handles[i]);  in radeon_vce_free_handles()
321 		if (!handle || rdev->vce.filp[i] != filp)  in radeon_vce_free_handles()
331 		rdev->vce.filp[i] = NULL;  in radeon_vce_free_handles()
332 		atomic_set(&rdev->vce.handles[i], 0);  in radeon_vce_free_handles()
528 		if (atomic_read(&p->rdev->vce.handles[i]) == handle) {  in radeon_vce_validate_handle()
529 			if (p->rdev->vce.filp[i] != p->filp) {  in radeon_vce_validate_handle()
539 		if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {  in radeon_vce_validate_handle()
540 			p->rdev->vce.filp[i] = p->filp;  in radeon_vce_validate_handle()
541 			p->rdev->vce.img_size[i] = 0;  in radeon_vce_validate_handle()
588 			size = &p->rdev->vce.img_size[session_idx];  in radeon_vce_cs_parse()
680 			atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);  in radeon_vce_cs_parse()