236 	struct mthca_eqe *eqe;  in next_eqe_sw()  local
237 	eqe = get_eqe(eq, eq->cons_index);  in next_eqe_sw()
238 	return (MTHCA_EQ_ENTRY_OWNER_HW & eqe->owner) ? NULL : eqe;  in next_eqe_sw()
241 static inline void set_eqe_hw(struct mthca_eqe *eqe)  in set_eqe_hw()  argument
243 	eqe->owner =  MTHCA_EQ_ENTRY_OWNER_HW;  in set_eqe_hw()
262 	struct mthca_eqe *eqe;  in mthca_eq_int()  local
267 	while ((eqe = next_eqe_sw(eq))) {  in mthca_eq_int()
274 		switch (eqe->type) {  in mthca_eq_int()
276 			disarm_cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff;  in mthca_eq_int()
282 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
287 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
292 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
297 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
302 			mthca_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & 0xffffff,  in mthca_eq_int()
307 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
312 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
317 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
322 			mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff,  in mthca_eq_int()
328 					be16_to_cpu(eqe->event.cmd.token),  in mthca_eq_int()
329 					eqe->event.cmd.status,  in mthca_eq_int()
330 					be64_to_cpu(eqe->event.cmd.out_param));  in mthca_eq_int()
335 				    (be32_to_cpu(eqe->event.port_change.port) >> 28) & 3,  in mthca_eq_int()
336 				    eqe->subtype == 0x4);  in mthca_eq_int()
341 				   eqe->event.cq_err.syndrome == 1 ?  in mthca_eq_int()
343 				   be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff);  in mthca_eq_int()
344 			mthca_cq_event(dev, be32_to_cpu(eqe->event.cq_err.cqn),  in mthca_eq_int()
358 				   eqe->type, eqe->subtype, eq->eqn);  in mthca_eq_int()
362 		set_eqe_hw(eqe);  in mthca_eq_int()