Lines Matching refs:reg_w
73 static void reg_w(struct gspca_dev *gspca_dev, u16 index, u8 val) in reg_w() function
98 reg_w(gspca_dev, index, val); in reg_w_mask()
129 reg_w(gspca_dev, STK1135_REG_SBUSR, addr); in sensor_read_8()
131 reg_w(gspca_dev, STK1135_REG_SICTL, 0x20); in sensor_read_8()
150 reg_w(gspca_dev, STK1135_REG_SBUSW, addr); in sensor_write_8()
151 reg_w(gspca_dev, STK1135_REG_SBUSW + 1, data); in sensor_write_8()
153 reg_w(gspca_dev, STK1135_REG_SICTL, 0x01); in sensor_write_8()
329 reg_w(gspca_dev, STK1135_REG_TMGEN, 0x12); in stk1135_configure_clock()
332 reg_w(gspca_dev, STK1135_REG_TCP1 + 0, 0x41); in stk1135_configure_clock()
333 reg_w(gspca_dev, STK1135_REG_TCP1 + 1, 0x00); in stk1135_configure_clock()
334 reg_w(gspca_dev, STK1135_REG_TCP1 + 2, 0x00); in stk1135_configure_clock()
335 reg_w(gspca_dev, STK1135_REG_TCP1 + 3, 0x00); in stk1135_configure_clock()
338 reg_w(gspca_dev, STK1135_REG_SENSO + 0, 0x10); in stk1135_configure_clock()
340 reg_w(gspca_dev, STK1135_REG_SENSO + 1, 0x00); in stk1135_configure_clock()
342 reg_w(gspca_dev, STK1135_REG_SENSO + 3, 0x07); in stk1135_configure_clock()
344 reg_w(gspca_dev, STK1135_REG_PLLFD, 0x06); in stk1135_configure_clock()
346 reg_w(gspca_dev, STK1135_REG_TMGEN, 0x80); in stk1135_configure_clock()
348 reg_w(gspca_dev, STK1135_REG_SENSO + 2, 0x04); in stk1135_configure_clock()
351 reg_w(gspca_dev, STK1135_REG_SICTL + 2, 0x1f); in stk1135_configure_clock()
360 reg_w(gspca_dev, STK1135_REG_CIEPO + 2, 0x00); in stk1135_camera_disable()
361 reg_w(gspca_dev, STK1135_REG_CIEPO + 3, 0x00); in stk1135_camera_disable()
371 reg_w(gspca_dev, STK1135_REG_TMGEN, 0x00); in stk1135_camera_disable()
373 reg_w(gspca_dev, STK1135_REG_SENSO + 1, 0x20); in stk1135_camera_disable()
375 reg_w(gspca_dev, STK1135_REG_SENSO, 0x00); in stk1135_camera_disable()
378 reg_w(gspca_dev, STK1135_REG_GCTRL, 0x49); in stk1135_camera_disable()
389 reg_w(gspca_dev, STK1135_REG_GCTRL + 2, 0x78); in sd_init()
391 reg_w(gspca_dev, STK1135_REG_GCTRL, (1 << 5)); in sd_init()
393 reg_w(gspca_dev, STK1135_REG_GCTRL + 3, 0x80); in sd_init()
395 reg_w(gspca_dev, STK1135_REG_ICTRL + 1, 0x00); in sd_init()
396 reg_w(gspca_dev, STK1135_REG_ICTRL + 3, 0x03); in sd_init()
398 reg_w(gspca_dev, STK1135_REG_RMCTL + 1, 0x00); in sd_init()
399 reg_w(gspca_dev, STK1135_REG_RMCTL + 3, 0x02); in sd_init()
402 reg_w(gspca_dev, STK1135_REG_SICTL, 0x80); in sd_init()
403 reg_w(gspca_dev, STK1135_REG_SICTL, 0x00); in sd_init()
405 reg_w(gspca_dev, STK1135_REG_SICTL + 3, 0xba); in sd_init()
407 reg_w(gspca_dev, STK1135_REG_ASIC + 3, 0x00); in sd_init()
436 reg_w(gspca_dev, STK1135_REG_GCTRL, (1 << 5)); in sd_start()
441 reg_w(gspca_dev, STK1135_REG_CISPO + 0, 0x00); in sd_start()
442 reg_w(gspca_dev, STK1135_REG_CISPO + 1, 0x00); in sd_start()
443 reg_w(gspca_dev, STK1135_REG_CISPO + 2, 0x00); in sd_start()
444 reg_w(gspca_dev, STK1135_REG_CISPO + 3, 0x00); in sd_start()
449 reg_w(gspca_dev, STK1135_REG_CIEPO + 0, width & 0xff); in sd_start()
450 reg_w(gspca_dev, STK1135_REG_CIEPO + 1, width >> 8); in sd_start()
451 reg_w(gspca_dev, STK1135_REG_CIEPO + 2, height & 0xff); in sd_start()
452 reg_w(gspca_dev, STK1135_REG_CIEPO + 3, height >> 8); in sd_start()
455 reg_w(gspca_dev, STK1135_REG_SCTRL, 0x20); in sd_start()