489 	u32 pb_addr, mask;  in gaudi_init_mme_protection_bits()  local
515 	mask = 1U << ((mmMME0_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
516 	mask |= 1U << ((mmMME0_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
517 	mask |= 1U << ((mmMME0_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
518 	mask |= 1U << ((mmMME0_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
519 	mask |= 1U << ((mmMME0_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
520 	mask |= 1U << ((mmMME0_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
521 	mask |= 1U << ((mmMME0_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
522 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
523 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
524 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
525 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
526 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
527 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
528 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
529 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
530 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
531 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
532 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
533 	mask |= 1U << ((mmMME0_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
534 	mask |= 1U << ((mmMME0_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
535 	mask |= 1U << ((mmMME0_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
536 	mask |= 1U << ((mmMME0_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
537 	mask |= 1U << ((mmMME0_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
538 	mask |= 1U << ((mmMME0_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
539 	mask |= 1U << ((mmMME0_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
540 	mask |= 1U << ((mmMME0_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
541 	mask |= 1U << ((mmMME0_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
542 	mask |= 1U << ((mmMME0_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
543 	mask |= 1U << ((mmMME0_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
544 	mask |= 1U << ((mmMME0_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
546 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
551 	mask = 1U << ((mmMME0_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
553 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
557 	mask = 1U << ((mmMME0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
558 	mask |= 1U << ((mmMME0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
559 	mask |= 1U << ((mmMME0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
560 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
561 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
562 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
563 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
564 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
565 	mask |= 1U << ((mmMME0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
566 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
567 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
568 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
569 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
570 	mask |= 1U << ((mmMME0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
571 	mask |= 1U << ((mmMME0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
572 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
573 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
574 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
575 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
576 	mask |= 1U << ((mmMME0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
577 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
578 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
579 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
580 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
581 	mask |= 1U << ((mmMME0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
582 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
583 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
584 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
585 	mask |= 1U << ((mmMME0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
587 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
591 	mask = 1U << ((mmMME0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
592 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
593 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
594 	mask |= 1U << ((mmMME0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
595 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
596 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
597 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
598 	mask |= 1U << ((mmMME0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
599 	mask |= 1U << ((mmMME0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
600 	mask |= 1U << ((mmMME0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
601 	mask |= 1U << ((mmMME0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
602 	mask |= 1U << ((mmMME0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
603 	mask |= 1U << ((mmMME0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
604 	mask |= 1U << ((mmMME0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
605 	mask |= 1U << ((mmMME0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
606 	mask |= 1U << ((mmMME0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
607 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
608 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
609 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
610 	mask |= 1U << ((mmMME0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
611 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
612 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
613 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
614 	mask |= 1U << ((mmMME0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
615 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
616 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
617 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
618 	mask |= 1U << ((mmMME0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
619 	mask |= 1U << ((mmMME0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
620 	mask |= 1U << ((mmMME0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
621 	mask |= 1U << ((mmMME0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
622 	mask |= 1U << ((mmMME0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
624 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
628 	mask = 1U << ((mmMME0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
629 	mask |= 1U << ((mmMME0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
630 	mask |= 1U << ((mmMME0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
631 	mask |= 1U << ((mmMME0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
632 	mask |= 1U << ((mmMME0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
633 	mask |= 1U << ((mmMME0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
634 	mask |= 1U << ((mmMME0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
635 	mask |= 1U << ((mmMME0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
636 	mask |= 1U << ((mmMME0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
637 	mask |= 1U << ((mmMME0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
638 	mask |= 1U << ((mmMME0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
639 	mask |= 1U << ((mmMME0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
640 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
641 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
642 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
644 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
648 	mask = 1U << ((mmMME0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
649 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
650 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
651 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
652 	mask |= 1U << ((mmMME0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
653 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
654 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
655 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
656 	mask |= 1U << ((mmMME0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
657 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
658 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
659 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
660 	mask |= 1U << ((mmMME0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
661 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
662 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
663 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
664 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
665 	mask |= 1U << ((mmMME0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
666 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
667 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
668 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
669 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
670 	mask |= 1U << ((mmMME0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
671 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
672 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
673 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
674 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
675 	mask |= 1U << ((mmMME0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
677 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
681 	mask = 1U << ((mmMME0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
682 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
683 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
684 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
685 	mask |= 1U << ((mmMME0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
686 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
687 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
688 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
689 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
690 	mask |= 1U << ((mmMME0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
691 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
692 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
693 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
694 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
695 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
696 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
697 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
698 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
699 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
700 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
701 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
702 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
703 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
704 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
705 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
706 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
707 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
708 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
709 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
710 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
711 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
712 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
714 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
719 	mask = 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
720 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
721 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
722 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
723 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
724 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
725 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
726 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
727 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
728 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
729 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
730 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
731 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
732 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
733 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
734 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
735 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
736 	mask |= 1U << ((mmMME0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
737 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
738 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
739 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
740 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
741 	mask |= 1U << ((mmMME0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
742 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
743 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
744 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
745 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
746 	mask |= 1U << ((mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
747 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
748 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
749 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
751 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
757 	mask = 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
758 	mask |= 1U << ((mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
760 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
764 	mask = 1U << ((mmMME0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
765 	mask |= 1U << ((mmMME0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
766 	mask |= 1U << ((mmMME0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
767 	mask |= 1U << ((mmMME0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
768 	mask |= 1U << ((mmMME0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
769 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
770 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
771 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
772 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
773 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
774 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
775 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
776 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
777 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
778 	mask |= 1U << ((mmMME0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
779 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
780 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
781 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
783 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
787 	mask = 1U << ((mmMME0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
788 	mask |= 1U << ((mmMME0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
789 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
790 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
792 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
796 	mask = 1U << ((mmMME0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
797 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
798 	mask |= 1U << ((mmMME0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
799 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
800 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
801 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
802 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
803 	mask |= 1U << ((mmMME0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
804 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
805 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
806 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
807 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
808 	mask |= 1U << ((mmMME0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
810 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
814 	mask = 1U << ((mmMME0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
815 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
816 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
817 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
818 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
819 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
820 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
821 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
822 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
823 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
824 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
825 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
826 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
827 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
828 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
829 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
830 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
831 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
832 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
833 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
834 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
835 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
836 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
837 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
838 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
840 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
845 	mask = 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
846 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
847 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
848 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
849 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
850 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
851 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
852 	mask |= 1U << ((mmMME0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
853 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
859 	mask = 1U << ((mmMME0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
860 	mask |= 1U << ((mmMME0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
861 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
862 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
863 	mask |= 1U << ((mmMME0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
865 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
869 	mask = 1U << ((mmMME0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
870 	mask |= 1U << ((mmMME0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
871 	mask |= 1U << ((mmMME0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
872 	mask |= 1U << ((mmMME0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
873 	mask |= 1U << ((mmMME0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
874 	mask |= 1U << ((mmMME0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
875 	mask |= 1U << ((mmMME0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
876 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
877 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
878 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
879 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
880 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
881 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
882 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
883 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
884 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
885 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
886 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
887 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
888 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
889 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
890 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
891 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
892 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
893 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
894 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
895 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
897 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
902 	mask = 1U << ((mmMME0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
903 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
904 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
905 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
906 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
907 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
908 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
909 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
910 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
911 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
912 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
913 	mask |= 1U << ((mmMME0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
914 	mask |= 1U << ((mmMME0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
915 	mask |= 1U << ((mmMME0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
916 	mask |= 1U << ((mmMME0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
918 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
922 	mask = 1U << ((mmMME0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
923 	mask |= 1U << ((mmMME0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
924 	mask |= 1U << ((mmMME0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
925 	mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
926 	mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
927 	mask |= 1U << ((mmMME0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
928 	mask |= 1U << ((mmMME0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
929 	mask |= 1U << ((mmMME0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
930 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
931 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
932 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
933 	mask |= 1U << ((mmMME0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
934 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
935 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
936 	mask |= 1U << ((mmMME0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
938 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
943 	mask = 1U << ((mmMME0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
945 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
949 	mask = 1U << ((mmMME1_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
950 	mask |= 1U << ((mmMME1_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
951 	mask |= 1U << ((mmMME1_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
952 	mask |= 1U << ((mmMME1_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
953 	mask |= 1U << ((mmMME1_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
954 	mask |= 1U << ((mmMME1_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
955 	mask |= 1U << ((mmMME1_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
956 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
957 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
958 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
959 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
960 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
961 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
962 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
963 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
964 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
965 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
966 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
967 	mask |= 1U << ((mmMME1_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
968 	mask |= 1U << ((mmMME1_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
969 	mask |= 1U << ((mmMME1_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
970 	mask |= 1U << ((mmMME1_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
971 	mask |= 1U << ((mmMME1_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
972 	mask |= 1U << ((mmMME1_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
973 	mask |= 1U << ((mmMME1_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
974 	mask |= 1U << ((mmMME1_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
975 	mask |= 1U << ((mmMME1_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
976 	mask |= 1U << ((mmMME1_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
977 	mask |= 1U << ((mmMME1_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
978 	mask |= 1U << ((mmMME1_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
980 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
985 	mask = 1U << ((mmMME1_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
987 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
993 	mask = 1U << ((mmMME2_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
994 	mask |= 1U << ((mmMME2_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
995 	mask |= 1U << ((mmMME2_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
996 	mask |= 1U << ((mmMME2_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
997 	mask |= 1U << ((mmMME2_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
998 	mask |= 1U << ((mmMME2_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
999 	mask |= 1U << ((mmMME2_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1000 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1001 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1002 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1003 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1004 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1005 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1006 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1007 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1008 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1009 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1010 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1011 	mask |= 1U << ((mmMME2_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1012 	mask |= 1U << ((mmMME2_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1013 	mask |= 1U << ((mmMME2_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1014 	mask |= 1U << ((mmMME2_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1015 	mask |= 1U << ((mmMME2_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1016 	mask |= 1U << ((mmMME2_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1017 	mask |= 1U << ((mmMME2_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1018 	mask |= 1U << ((mmMME2_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1019 	mask |= 1U << ((mmMME2_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1020 	mask |= 1U << ((mmMME2_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1021 	mask |= 1U << ((mmMME2_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1022 	mask |= 1U << ((mmMME2_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1024 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1029 	mask = 1U << ((mmMME2_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1031 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1035 	mask = 1U << ((mmMME2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1036 	mask |= 1U << ((mmMME2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1037 	mask |= 1U << ((mmMME2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1038 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1039 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1040 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1041 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1042 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1043 	mask |= 1U << ((mmMME2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1044 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1045 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1046 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1047 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1048 	mask |= 1U << ((mmMME2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1049 	mask |= 1U << ((mmMME2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1050 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1051 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1052 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1053 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1054 	mask |= 1U << ((mmMME2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1055 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1056 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1057 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1058 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1059 	mask |= 1U << ((mmMME2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1060 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1061 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1062 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1063 	mask |= 1U << ((mmMME2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1065 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1069 	mask = 1U << ((mmMME2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1070 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1071 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1072 	mask |= 1U << ((mmMME2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1073 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1074 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1075 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1076 	mask |= 1U << ((mmMME2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1077 	mask |= 1U << ((mmMME2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1078 	mask |= 1U << ((mmMME2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1079 	mask |= 1U << ((mmMME2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1080 	mask |= 1U << ((mmMME2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1081 	mask |= 1U << ((mmMME2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1082 	mask |= 1U << ((mmMME2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1083 	mask |= 1U << ((mmMME2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1084 	mask |= 1U << ((mmMME2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1085 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1086 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1087 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1088 	mask |= 1U << ((mmMME2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1089 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1090 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1091 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1092 	mask |= 1U << ((mmMME2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1093 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1094 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1095 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1096 	mask |= 1U << ((mmMME2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1097 	mask |= 1U << ((mmMME2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1098 	mask |= 1U << ((mmMME2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1099 	mask |= 1U << ((mmMME2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1100 	mask |= 1U << ((mmMME2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1102 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1106 	mask = 1U << ((mmMME2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1107 	mask |= 1U << ((mmMME2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1108 	mask |= 1U << ((mmMME2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1109 	mask |= 1U << ((mmMME2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1110 	mask |= 1U << ((mmMME2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1111 	mask |= 1U << ((mmMME2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1112 	mask |= 1U << ((mmMME2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1113 	mask |= 1U << ((mmMME2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1114 	mask |= 1U << ((mmMME2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1115 	mask |= 1U << ((mmMME2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1116 	mask |= 1U << ((mmMME2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1117 	mask |= 1U << ((mmMME2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1118 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1119 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1120 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1122 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1126 	mask = 1U << ((mmMME2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1127 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1128 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1129 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1130 	mask |= 1U << ((mmMME2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1131 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1132 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1133 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1134 	mask |= 1U << ((mmMME2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1135 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1136 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1137 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1138 	mask |= 1U << ((mmMME2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1139 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1140 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1141 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1142 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1143 	mask |= 1U << ((mmMME2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1144 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1145 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1146 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1147 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1148 	mask |= 1U << ((mmMME2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1149 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1150 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1151 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1152 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1153 	mask |= 1U << ((mmMME2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1155 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1159 	mask = 1U << ((mmMME2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1160 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1161 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1162 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1163 	mask |= 1U << ((mmMME2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1164 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1165 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1166 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1167 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1168 	mask |= 1U << ((mmMME2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1169 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1170 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1171 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1172 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1173 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1174 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1175 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1176 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1177 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1178 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1179 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1180 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1181 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1182 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1183 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1184 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1185 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1186 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1187 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1188 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1189 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1190 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1192 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1197 	mask = 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1198 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1199 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1200 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1201 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1202 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1203 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1204 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1205 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1206 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1207 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1208 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1209 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1210 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1211 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1212 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1213 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1214 	mask |= 1U << ((mmMME2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1215 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1216 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1217 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1218 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1219 	mask |= 1U << ((mmMME2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1220 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1221 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1222 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1223 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1224 	mask |= 1U << ((mmMME2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1225 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1226 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1227 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1229 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1235 	mask = 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1236 	mask |= 1U << ((mmMME2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1238 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1242 	mask = 1U << ((mmMME2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1243 	mask |= 1U << ((mmMME2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1244 	mask |= 1U << ((mmMME2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1245 	mask |= 1U << ((mmMME2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1246 	mask |= 1U << ((mmMME2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1247 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1248 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1249 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1250 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1251 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1252 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1253 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1254 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1255 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1256 	mask |= 1U << ((mmMME2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1257 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1258 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1259 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1261 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1265 	mask = 1U << ((mmMME2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1266 	mask |= 1U << ((mmMME2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1267 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1268 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1270 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1274 	mask = 1U << ((mmMME2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1275 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1276 	mask |= 1U << ((mmMME2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1277 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1278 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1279 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1280 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1281 	mask |= 1U << ((mmMME2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1282 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1283 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1284 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1285 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1286 	mask |= 1U << ((mmMME2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1288 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1292 	mask = 1U << ((mmMME2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1293 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1294 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1295 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1296 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1297 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1298 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1299 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1300 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1301 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1302 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1303 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1304 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1305 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1306 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1307 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1308 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1309 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1310 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1311 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1312 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1313 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1314 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1315 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1316 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1318 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1323 	mask = 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1324 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1325 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1326 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1327 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1328 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1329 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1330 	mask |= 1U << ((mmMME2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1332 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1338 	mask = 1U << ((mmMME2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1339 	mask |= 1U << ((mmMME2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1340 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1341 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1342 	mask |= 1U << ((mmMME2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1344 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1348 	mask = 1U << ((mmMME2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1349 	mask |= 1U << ((mmMME2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1350 	mask |= 1U << ((mmMME2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1351 	mask |= 1U << ((mmMME2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1352 	mask |= 1U << ((mmMME2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1353 	mask |= 1U << ((mmMME2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1354 	mask |= 1U << ((mmMME2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1355 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1356 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1357 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1358 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1359 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1360 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1361 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1362 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1363 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1364 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1365 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1366 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1367 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1368 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1369 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1370 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1371 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1372 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1373 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1374 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1376 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1381 	mask = 1U << ((mmMME2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1382 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1383 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1384 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1385 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1386 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1387 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1388 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1389 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1390 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1391 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1392 	mask |= 1U << ((mmMME2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1393 	mask |= 1U << ((mmMME2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1394 	mask |= 1U << ((mmMME2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1395 	mask |= 1U << ((mmMME2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1397 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1401 	mask = 1U << ((mmMME2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1402 	mask |= 1U << ((mmMME2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1403 	mask |= 1U << ((mmMME2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1404 	mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1405 	mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1406 	mask |= 1U << ((mmMME2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1407 	mask |= 1U << ((mmMME2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1408 	mask |= 1U << ((mmMME2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1409 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1410 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1411 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1412 	mask |= 1U << ((mmMME2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1413 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1414 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1415 	mask |= 1U << ((mmMME2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1417 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1422 	mask = 1U << ((mmMME2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1424 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1428 	mask = 1U << ((mmMME3_CTRL_RESET & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1429 	mask |= 1U << ((mmMME3_CTRL_QM_STALL & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1430 	mask |= 1U << ((mmMME3_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1431 	mask |= 1U << ((mmMME3_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1432 	mask |= 1U << ((mmMME3_CTRL_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1433 	mask |= 1U << ((mmMME3_CTRL_INTR_MASK & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1434 	mask |= 1U << ((mmMME3_CTRL_LOG_SHADOW & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1435 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_DESC0 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1436 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1437 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_TH & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1438 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_MIN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1439 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_CTRL_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1440 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_HISTORY_LOG_SIZE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1441 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1442 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_BF16 & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1443 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1444 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_A_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1445 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_ODD & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1446 	mask |= 1U << ((mmMME3_CTRL_PCU_DUMMY_B_FP32_EVEN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1447 	mask |= 1U << ((mmMME3_CTRL_PROT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1448 	mask |= 1U << ((mmMME3_CTRL_EU_POWER_SAVE_DISABLE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1449 	mask |= 1U << ((mmMME3_CTRL_CS_DBG_BLOCK_ID & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1450 	mask |= 1U << ((mmMME3_CTRL_CS_DBG_STATUS_DROP_CNT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1451 	mask |= 1U << ((mmMME3_CTRL_TE_CLOSE_CGATE & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1452 	mask |= 1U << ((mmMME3_CTRL_AGU_SM_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1453 	mask |= 1U << ((mmMME3_CTRL_AGU_SM_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1454 	mask |= 1U << ((mmMME3_CTRL_EZSYNC_OUT_CREDIT & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1455 	mask |= 1U << ((mmMME3_CTRL_PCU_RL_SAT_SEC & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1456 	mask |= 1U << ((mmMME3_CTRL_AGU_SYNC_MSG_AXI_USER & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1457 	mask |= 1U << ((mmMME3_CTRL_QM_SLV_LBW_CLK_EN & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1459 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1464 	mask = 1U << ((mmMME3_CTRL_SHADOW_0_STATUS & 0x7F) >> 2);  in gaudi_init_mme_protection_bits()
1466 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_mme_protection_bits()
1473 	u32 pb_addr, mask;  in gaudi_init_dma_protection_bits()  local
1512 	mask = 1U << ((mmDMA0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1513 	mask |= 1U << ((mmDMA0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1514 	mask |= 1U << ((mmDMA0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1515 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1516 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1517 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1518 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1519 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1520 	mask |= 1U << ((mmDMA0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1521 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1522 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1523 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1524 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1525 	mask |= 1U << ((mmDMA0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1526 	mask |= 1U << ((mmDMA0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1527 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1528 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1529 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1530 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1531 	mask |= 1U << ((mmDMA0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1532 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1533 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1534 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1535 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1536 	mask |= 1U << ((mmDMA0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1537 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1538 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1539 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1540 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1542 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1546 	mask = 1U << ((mmDMA0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1547 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1548 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1549 	mask |= 1U << ((mmDMA0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1550 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1551 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1552 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1553 	mask |= 1U << ((mmDMA0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1554 	mask |= 1U << ((mmDMA0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1555 	mask |= 1U << ((mmDMA0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1556 	mask |= 1U << ((mmDMA0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1557 	mask |= 1U << ((mmDMA0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1558 	mask |= 1U << ((mmDMA0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1559 	mask |= 1U << ((mmDMA0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1560 	mask |= 1U << ((mmDMA0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1561 	mask |= 1U << ((mmDMA0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1562 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1563 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1564 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1565 	mask |= 1U << ((mmDMA0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1566 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1567 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1568 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1569 	mask |= 1U << ((mmDMA0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1570 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1571 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1572 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1573 	mask |= 1U << ((mmDMA0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1574 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1575 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1576 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1577 	mask |= 1U << ((mmDMA0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1579 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1583 	mask = 1U << ((mmDMA0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1584 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1585 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1586 	mask |= 1U << ((mmDMA0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1587 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1588 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1589 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1590 	mask |= 1U << ((mmDMA0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1591 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1592 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1593 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1594 	mask |= 1U << ((mmDMA0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1595 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1596 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1597 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1599 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1603 	mask = 1U << ((mmDMA0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1604 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1605 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1606 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1607 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1608 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1609 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1610 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1611 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1612 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1613 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1614 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1615 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1616 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1617 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1618 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1619 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1620 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1621 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1622 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1623 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1624 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1625 	mask |= 1U << ((mmDMA0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1626 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1627 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1628 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1629 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1630 	mask |= 1U << ((mmDMA0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1632 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1636 	mask = 1U << ((mmDMA0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1637 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1638 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1639 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1640 	mask |= 1U << ((mmDMA0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1641 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1642 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1643 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1644 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1645 	mask |= 1U << ((mmDMA0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1646 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1647 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1648 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1649 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1650 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1651 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1652 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1653 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1654 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1655 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1656 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1657 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1658 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1659 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1660 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1661 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1662 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1663 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1664 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1665 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1666 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1667 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1669 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1674 	mask = 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1675 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1676 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1677 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1678 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1679 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1680 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1681 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1682 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1683 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1684 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1685 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1686 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1687 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1688 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1689 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1690 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1691 	mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1692 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1693 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1694 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1695 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1696 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1697 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1698 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1699 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1700 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1701 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1702 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1703 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1704 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1706 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1713 	mask = 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1714 	mask |= 1U << ((mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1716 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1720 	mask = 1U << ((mmDMA0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1721 	mask |= 1U << ((mmDMA0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1722 	mask |= 1U << ((mmDMA0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1723 	mask |= 1U << ((mmDMA0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1724 	mask |= 1U << ((mmDMA0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1725 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1726 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1727 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1728 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1729 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1730 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1731 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1732 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1733 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1734 	mask |= 1U << ((mmDMA0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1735 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1736 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1737 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1739 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1743 	mask = 1U << ((mmDMA0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1744 	mask |= 1U << ((mmDMA0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1745 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1746 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1748 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1752 	mask = 1U << ((mmDMA0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1753 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1754 	mask |= 1U << ((mmDMA0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1755 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1756 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1757 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1758 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1759 	mask |= 1U << ((mmDMA0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1760 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1761 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1762 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1763 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1764 	mask |= 1U << ((mmDMA0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1766 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1770 	mask = 1U << ((mmDMA0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1771 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1772 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1773 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1774 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1775 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1776 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1777 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1778 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1779 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1780 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1781 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1782 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1783 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1784 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1785 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1786 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1787 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1788 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1789 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1790 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1791 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1792 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1793 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1794 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1796 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1801 	mask = 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1802 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1803 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1804 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1805 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1806 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1807 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1808 	mask |= 1U << ((mmDMA0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1809 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1816 	mask = 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1817 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1818 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1819 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1820 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1822 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1826 	mask = 1U << ((mmDMA0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1827 	mask |= 1U << ((mmDMA0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1828 	mask |= 1U << ((mmDMA0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1829 	mask |= 1U << ((mmDMA0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1830 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1831 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1832 	mask |= 1U << ((mmDMA0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1833 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1834 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1835 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1836 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1837 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1838 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1839 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1840 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1841 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1842 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1843 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1844 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1845 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1846 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1847 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1848 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1849 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1850 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1851 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1852 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1854 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1859 	mask = 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1860 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1861 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1862 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1863 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1864 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1865 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1866 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1867 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1868 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1869 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1870 	mask |= 1U << ((mmDMA0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1871 	mask |= 1U << ((mmDMA0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1872 	mask |= 1U << ((mmDMA0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1873 	mask |= 1U << ((mmDMA0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1875 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1879 	mask = 1U << ((mmDMA0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1880 	mask |= 1U << ((mmDMA0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1881 	mask |= 1U << ((mmDMA0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1882 	mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1883 	mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1884 	mask |= 1U << ((mmDMA0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1885 	mask |= 1U << ((mmDMA0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1886 	mask |= 1U << ((mmDMA0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1887 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1888 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1889 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1890 	mask |= 1U << ((mmDMA0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1891 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1892 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1893 	mask |= 1U << ((mmDMA0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1895 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1900 	mask = 1U << ((mmDMA0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1902 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1906 	mask = 1U << ((mmDMA1_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1907 	mask |= 1U << ((mmDMA1_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1908 	mask |= 1U << ((mmDMA1_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1909 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1910 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1911 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1912 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1913 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1914 	mask |= 1U << ((mmDMA1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1915 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1916 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1917 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1918 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1919 	mask |= 1U << ((mmDMA1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1920 	mask |= 1U << ((mmDMA1_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1921 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1922 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1923 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1924 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1925 	mask |= 1U << ((mmDMA1_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1926 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1927 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1928 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1929 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1930 	mask |= 1U << ((mmDMA1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1931 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1932 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1933 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1934 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1936 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1940 	mask = 1U << ((mmDMA1_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1941 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1942 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1943 	mask |= 1U << ((mmDMA1_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1944 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1945 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1946 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1947 	mask |= 1U << ((mmDMA1_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1948 	mask |= 1U << ((mmDMA1_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1949 	mask |= 1U << ((mmDMA1_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1950 	mask |= 1U << ((mmDMA1_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1951 	mask |= 1U << ((mmDMA1_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1952 	mask |= 1U << ((mmDMA1_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1953 	mask |= 1U << ((mmDMA1_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1954 	mask |= 1U << ((mmDMA1_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1955 	mask |= 1U << ((mmDMA1_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1956 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1957 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1958 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1959 	mask |= 1U << ((mmDMA1_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1960 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1961 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1962 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1963 	mask |= 1U << ((mmDMA1_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1964 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1965 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1966 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1967 	mask |= 1U << ((mmDMA1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1968 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1969 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1970 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1971 	mask |= 1U << ((mmDMA1_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1973 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1977 	mask = 1U << ((mmDMA1_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1978 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1979 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1980 	mask |= 1U << ((mmDMA1_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1981 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1982 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1983 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1984 	mask |= 1U << ((mmDMA1_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1985 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1986 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1987 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1988 	mask |= 1U << ((mmDMA1_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1989 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1990 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1991 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1993 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
1997 	mask = 1U << ((mmDMA1_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1998 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
1999 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2000 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2001 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2002 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2003 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2004 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2005 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2006 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2007 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2008 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2009 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2010 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2011 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2012 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2013 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2014 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2015 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2016 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2017 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2018 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2019 	mask |= 1U << ((mmDMA1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2020 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2021 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2022 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2023 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2024 	mask |= 1U << ((mmDMA1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2026 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2030 	mask = 1U << ((mmDMA1_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2031 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2032 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2033 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2034 	mask |= 1U << ((mmDMA1_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2035 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2036 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2037 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2038 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2039 	mask |= 1U << ((mmDMA1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2040 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2041 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2042 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2043 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2044 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2045 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2046 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2047 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2048 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2049 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2050 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2051 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2052 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2053 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2054 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2055 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2056 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2057 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2058 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2059 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2060 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2061 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2063 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2068 	mask = 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2069 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2070 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2071 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2072 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2073 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2074 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2075 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2076 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2077 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2078 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2079 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2080 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2081 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2082 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2083 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2084 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2085 	mask |= 1U << ((mmDMA1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2086 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2087 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2088 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2089 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2090 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2091 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2092 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2093 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2094 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2095 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2096 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2097 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2098 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2100 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2107 	mask = 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2108 	mask |= 1U << ((mmDMA1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2110 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2114 	mask = 1U << ((mmDMA1_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2115 	mask |= 1U << ((mmDMA1_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2116 	mask |= 1U << ((mmDMA1_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2117 	mask |= 1U << ((mmDMA1_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2118 	mask |= 1U << ((mmDMA1_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2119 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2120 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2121 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2122 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2123 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2124 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2125 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2126 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2127 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2128 	mask |= 1U << ((mmDMA1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2129 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2130 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2131 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2133 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2137 	mask = 1U << ((mmDMA1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2138 	mask |= 1U << ((mmDMA1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2139 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2140 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2142 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2146 	mask = 1U << ((mmDMA1_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2147 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2148 	mask |= 1U << ((mmDMA1_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2149 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2150 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2151 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2152 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2153 	mask |= 1U << ((mmDMA1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2154 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2155 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2156 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2157 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2158 	mask |= 1U << ((mmDMA1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2160 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2164 	mask = 1U << ((mmDMA1_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2165 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2166 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2167 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2168 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2169 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2170 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2171 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2172 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2173 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2174 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2175 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2176 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2177 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2178 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2179 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2180 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2181 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2182 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2183 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2184 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2185 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2186 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2187 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2188 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2190 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2195 	mask = 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2196 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2197 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2198 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2199 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2200 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2201 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2202 	mask |= 1U << ((mmDMA1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2204 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2211 	mask = 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2212 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2213 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2214 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2215 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2217 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2221 	mask = 1U << ((mmDMA1_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2222 	mask |= 1U << ((mmDMA1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2223 	mask |= 1U << ((mmDMA1_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2224 	mask |= 1U << ((mmDMA1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2225 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2226 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2227 	mask |= 1U << ((mmDMA1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2228 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2229 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2230 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2231 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2232 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2233 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2234 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2235 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2236 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2237 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2238 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2239 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2240 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2241 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2242 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2243 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2244 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2245 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2246 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2247 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2249 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2254 	mask = 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2255 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2256 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2257 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2258 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2259 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2260 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2261 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2262 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2263 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2264 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2265 	mask |= 1U << ((mmDMA1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2266 	mask |= 1U << ((mmDMA1_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2267 	mask |= 1U << ((mmDMA1_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2268 	mask |= 1U << ((mmDMA1_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2270 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2274 	mask = 1U << ((mmDMA1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2275 	mask |= 1U << ((mmDMA1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2276 	mask |= 1U << ((mmDMA1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2277 	mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2278 	mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2279 	mask |= 1U << ((mmDMA1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2280 	mask |= 1U << ((mmDMA1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2281 	mask |= 1U << ((mmDMA1_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2282 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2283 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2284 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2285 	mask |= 1U << ((mmDMA1_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2286 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2287 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2288 	mask |= 1U << ((mmDMA1_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2290 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2295 	mask = 1U << ((mmDMA1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2297 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2301 	mask = 1U << ((mmDMA2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2302 	mask |= 1U << ((mmDMA2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2303 	mask |= 1U << ((mmDMA2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2304 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2305 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2306 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2307 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2308 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2309 	mask |= 1U << ((mmDMA2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2310 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2311 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2312 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2313 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2314 	mask |= 1U << ((mmDMA2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2315 	mask |= 1U << ((mmDMA2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2316 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2317 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2318 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2319 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2320 	mask |= 1U << ((mmDMA2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2321 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2322 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2323 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2324 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2325 	mask |= 1U << ((mmDMA2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2326 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2327 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2328 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2329 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2331 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2335 	mask = 1U << ((mmDMA2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2336 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2337 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2338 	mask |= 1U << ((mmDMA2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2339 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2340 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2341 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2342 	mask |= 1U << ((mmDMA2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2343 	mask |= 1U << ((mmDMA2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2344 	mask |= 1U << ((mmDMA2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2345 	mask |= 1U << ((mmDMA2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2346 	mask |= 1U << ((mmDMA2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2347 	mask |= 1U << ((mmDMA2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2348 	mask |= 1U << ((mmDMA2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2349 	mask |= 1U << ((mmDMA2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2350 	mask |= 1U << ((mmDMA2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2351 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2352 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2353 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2354 	mask |= 1U << ((mmDMA2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2355 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2356 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2357 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2358 	mask |= 1U << ((mmDMA2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2359 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2360 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2361 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2362 	mask |= 1U << ((mmDMA2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2363 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2364 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2365 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2366 	mask |= 1U << ((mmDMA2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2368 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2372 	mask = 1U << ((mmDMA2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2373 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2374 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2375 	mask |= 1U << ((mmDMA2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2376 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2377 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2378 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2379 	mask |= 1U << ((mmDMA2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2380 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2381 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2382 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2383 	mask |= 1U << ((mmDMA2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2384 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2385 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2386 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2388 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2392 	mask = 1U << ((mmDMA2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2393 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2394 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2395 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2396 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2397 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2398 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2399 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2400 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2401 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2402 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2403 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2404 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2405 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2406 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2407 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2408 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2409 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2410 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2411 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2412 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2413 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2414 	mask |= 1U << ((mmDMA2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2415 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2416 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2417 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2418 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2419 	mask |= 1U << ((mmDMA2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2421 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2425 	mask = 1U << ((mmDMA2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2426 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2427 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2428 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2429 	mask |= 1U << ((mmDMA2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2430 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2431 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2432 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2433 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2434 	mask |= 1U << ((mmDMA2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2435 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2436 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2437 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2438 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2439 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2440 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2441 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2442 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2443 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2444 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2445 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2446 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2447 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2448 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2449 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2450 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2451 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2452 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2453 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2454 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2455 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2456 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2458 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2463 	mask = 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2464 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2465 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2466 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2467 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2468 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2469 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2470 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2471 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2472 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2473 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2474 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2475 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2476 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2477 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2478 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2479 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2480 	mask |= 1U << ((mmDMA2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2481 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2482 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2483 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2484 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2485 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2486 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2487 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2488 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2489 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2490 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2491 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2492 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2493 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2495 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2502 	mask = 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2503 	mask |= 1U << ((mmDMA2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2505 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2509 	mask = 1U << ((mmDMA2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2510 	mask |= 1U << ((mmDMA2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2511 	mask |= 1U << ((mmDMA2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2512 	mask |= 1U << ((mmDMA2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2513 	mask |= 1U << ((mmDMA2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2514 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2515 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2516 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2517 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2518 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2519 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2520 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2521 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2522 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2523 	mask |= 1U << ((mmDMA2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2524 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2525 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2526 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2528 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2532 	mask = 1U << ((mmDMA2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2533 	mask |= 1U << ((mmDMA2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2534 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2535 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2537 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2541 	mask = 1U << ((mmDMA2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2542 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2543 	mask |= 1U << ((mmDMA2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2544 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2545 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2546 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2547 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2548 	mask |= 1U << ((mmDMA2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2549 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2550 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2551 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2552 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2553 	mask |= 1U << ((mmDMA2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2555 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2559 	mask = 1U << ((mmDMA2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2560 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2561 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2562 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2563 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2564 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2565 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2566 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2567 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2568 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2569 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2570 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2571 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2572 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2573 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2574 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2575 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2576 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2577 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2578 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2579 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2580 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2581 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2582 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2583 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2585 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2590 	mask = 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2591 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2592 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2593 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2594 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2595 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2596 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2597 	mask |= 1U << ((mmDMA2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2599 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2606 	mask = 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2607 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2608 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2609 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2610 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2612 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2616 	mask = 1U << ((mmDMA2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2617 	mask |= 1U << ((mmDMA2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2618 	mask |= 1U << ((mmDMA2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2619 	mask |= 1U << ((mmDMA2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2620 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2621 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2622 	mask |= 1U << ((mmDMA2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2623 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2624 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2625 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2626 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2627 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2628 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2629 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2630 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2631 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2632 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2633 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2634 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2635 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2636 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2637 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2638 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2639 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2640 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2641 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2642 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2644 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2649 	mask = 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2650 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2651 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2652 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2653 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2654 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2655 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2656 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2657 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2658 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2659 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2660 	mask |= 1U << ((mmDMA2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2661 	mask |= 1U << ((mmDMA2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2662 	mask |= 1U << ((mmDMA2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2663 	mask |= 1U << ((mmDMA2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2665 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2669 	mask = 1U << ((mmDMA2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2670 	mask |= 1U << ((mmDMA2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2671 	mask |= 1U << ((mmDMA2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2672 	mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2673 	mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2674 	mask |= 1U << ((mmDMA2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2675 	mask |= 1U << ((mmDMA2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2676 	mask |= 1U << ((mmDMA2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2677 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2678 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2679 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2680 	mask |= 1U << ((mmDMA2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2681 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2682 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2683 	mask |= 1U << ((mmDMA2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2685 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2690 	mask = 1U << ((mmDMA2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2692 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2696 	mask = 1U << ((mmDMA3_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2697 	mask |= 1U << ((mmDMA3_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2698 	mask |= 1U << ((mmDMA3_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2699 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2700 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2701 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2702 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2703 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2704 	mask |= 1U << ((mmDMA3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2705 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2706 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2707 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2708 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2709 	mask |= 1U << ((mmDMA3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2710 	mask |= 1U << ((mmDMA3_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2711 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2712 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2713 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2714 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2715 	mask |= 1U << ((mmDMA3_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2716 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2717 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2718 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2719 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2720 	mask |= 1U << ((mmDMA3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2721 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2722 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2723 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2724 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2726 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2730 	mask = 1U << ((mmDMA3_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2731 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2732 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2733 	mask |= 1U << ((mmDMA3_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2734 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2735 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2736 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2737 	mask |= 1U << ((mmDMA3_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2738 	mask |= 1U << ((mmDMA3_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2739 	mask |= 1U << ((mmDMA3_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2740 	mask |= 1U << ((mmDMA3_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2741 	mask |= 1U << ((mmDMA3_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2742 	mask |= 1U << ((mmDMA3_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2743 	mask |= 1U << ((mmDMA3_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2744 	mask |= 1U << ((mmDMA3_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2745 	mask |= 1U << ((mmDMA3_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2746 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2747 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2748 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2749 	mask |= 1U << ((mmDMA3_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2750 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2751 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2752 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2753 	mask |= 1U << ((mmDMA3_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2754 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2755 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2756 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2757 	mask |= 1U << ((mmDMA3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2758 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2759 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2760 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2761 	mask |= 1U << ((mmDMA3_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2763 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2767 	mask = 1U << ((mmDMA3_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2768 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2769 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2770 	mask |= 1U << ((mmDMA3_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2771 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2772 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2773 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2774 	mask |= 1U << ((mmDMA3_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2775 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2776 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2777 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2778 	mask |= 1U << ((mmDMA3_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2779 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2780 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2781 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2783 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2787 	mask = 1U << ((mmDMA3_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2788 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2789 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2790 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2791 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2792 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2793 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2794 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2795 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2796 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2797 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2798 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2799 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2800 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2801 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2802 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2803 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2804 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2805 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2806 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2807 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2808 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2809 	mask |= 1U << ((mmDMA3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2810 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2811 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2812 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2813 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2814 	mask |= 1U << ((mmDMA3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2816 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2820 	mask = 1U << ((mmDMA3_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2821 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2822 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2823 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2824 	mask |= 1U << ((mmDMA3_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2825 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2826 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2827 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2828 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2829 	mask |= 1U << ((mmDMA3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2830 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2831 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2832 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2833 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2834 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2835 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2836 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2837 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2838 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2839 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2840 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2841 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2842 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2843 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2844 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2845 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2846 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2847 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2848 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2849 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2850 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2851 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2853 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2858 	mask = 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2859 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2860 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2861 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2862 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2863 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2864 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2865 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2866 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2867 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2868 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2869 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2870 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2871 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2872 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2873 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2874 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2875 	mask |= 1U << ((mmDMA3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2876 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2877 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2878 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2879 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2880 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2881 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2882 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2883 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2884 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2885 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2886 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2887 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2888 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2890 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2897 	mask = 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2898 	mask |= 1U << ((mmDMA3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2900 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2904 	mask = 1U << ((mmDMA3_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2905 	mask |= 1U << ((mmDMA3_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2906 	mask |= 1U << ((mmDMA3_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2907 	mask |= 1U << ((mmDMA3_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2908 	mask |= 1U << ((mmDMA3_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2909 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2910 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2911 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2912 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2913 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2914 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2915 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2916 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2917 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2918 	mask |= 1U << ((mmDMA3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2919 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2920 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2921 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2923 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2927 	mask = 1U << ((mmDMA3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2928 	mask |= 1U << ((mmDMA3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2929 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2930 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2932 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2936 	mask = 1U << ((mmDMA3_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2937 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2938 	mask |= 1U << ((mmDMA3_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2939 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2940 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2941 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2942 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2943 	mask |= 1U << ((mmDMA3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2944 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2945 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2946 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2947 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2948 	mask |= 1U << ((mmDMA3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2950 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2954 	mask = 1U << ((mmDMA3_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2955 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2956 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2957 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2958 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2959 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2960 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2961 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2962 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2963 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2964 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2965 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2966 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2967 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2968 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2969 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2970 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2971 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2972 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2973 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2974 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2975 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2976 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2977 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2978 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2980 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
2985 	mask = 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2986 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2987 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2988 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2989 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2990 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2991 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2992 	mask |= 1U << ((mmDMA3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
2994 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3001 	mask = 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3002 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3003 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3004 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3005 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3007 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3011 	mask = 1U << ((mmDMA3_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3012 	mask |= 1U << ((mmDMA3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3013 	mask |= 1U << ((mmDMA3_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3014 	mask |= 1U << ((mmDMA3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3015 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3016 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3017 	mask |= 1U << ((mmDMA3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3018 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3019 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3020 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3021 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3022 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3023 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3024 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3025 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3026 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3027 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3028 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3029 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3030 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3031 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3032 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3033 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3034 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3035 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3036 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3037 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3039 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3044 	mask = 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3045 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3046 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3047 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3048 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3049 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3050 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3051 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3052 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3053 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3054 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3055 	mask |= 1U << ((mmDMA3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3056 	mask |= 1U << ((mmDMA3_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3057 	mask |= 1U << ((mmDMA3_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3058 	mask |= 1U << ((mmDMA3_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3060 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3064 	mask = 1U << ((mmDMA3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3065 	mask |= 1U << ((mmDMA3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3066 	mask |= 1U << ((mmDMA3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3067 	mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3068 	mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3069 	mask |= 1U << ((mmDMA3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3070 	mask |= 1U << ((mmDMA3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3071 	mask |= 1U << ((mmDMA3_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3072 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3073 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3074 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3075 	mask |= 1U << ((mmDMA3_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3076 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3077 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3078 	mask |= 1U << ((mmDMA3_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3080 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3085 	mask = 1U << ((mmDMA3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3087 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3091 	mask = 1U << ((mmDMA4_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3092 	mask |= 1U << ((mmDMA4_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3093 	mask |= 1U << ((mmDMA4_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3094 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3095 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3096 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3097 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3098 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3099 	mask |= 1U << ((mmDMA4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3100 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3101 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3102 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3103 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3104 	mask |= 1U << ((mmDMA4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3105 	mask |= 1U << ((mmDMA4_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3106 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3107 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3108 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3109 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3110 	mask |= 1U << ((mmDMA4_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3111 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3112 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3113 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3114 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3115 	mask |= 1U << ((mmDMA4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3116 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3117 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3118 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3119 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3121 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3125 	mask = 1U << ((mmDMA4_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3126 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3127 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3128 	mask |= 1U << ((mmDMA4_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3129 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3130 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3131 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3132 	mask |= 1U << ((mmDMA4_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3133 	mask |= 1U << ((mmDMA4_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3134 	mask |= 1U << ((mmDMA4_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3135 	mask |= 1U << ((mmDMA4_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3136 	mask |= 1U << ((mmDMA4_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3137 	mask |= 1U << ((mmDMA4_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3138 	mask |= 1U << ((mmDMA4_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3139 	mask |= 1U << ((mmDMA4_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3140 	mask |= 1U << ((mmDMA4_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3141 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3142 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3143 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3144 	mask |= 1U << ((mmDMA4_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3145 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3146 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3147 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3148 	mask |= 1U << ((mmDMA4_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3149 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3150 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3151 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3152 	mask |= 1U << ((mmDMA4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3153 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3154 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3155 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3156 	mask |= 1U << ((mmDMA4_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3158 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3162 	mask = 1U << ((mmDMA4_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3163 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3164 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3165 	mask |= 1U << ((mmDMA4_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3166 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3167 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3168 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3169 	mask |= 1U << ((mmDMA4_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3170 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3171 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3172 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3173 	mask |= 1U << ((mmDMA4_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3174 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3175 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3176 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3178 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3182 	mask = 1U << ((mmDMA4_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3183 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3184 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3185 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3186 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3187 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3188 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3189 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3190 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3191 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3192 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3193 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3194 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3195 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3196 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3197 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3198 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3199 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3200 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3201 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3202 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3203 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3204 	mask |= 1U << ((mmDMA4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3205 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3206 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3207 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3208 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3209 	mask |= 1U << ((mmDMA4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3211 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3215 	mask = 1U << ((mmDMA4_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3216 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3217 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3218 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3219 	mask |= 1U << ((mmDMA4_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3220 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3221 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3222 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3223 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3224 	mask |= 1U << ((mmDMA4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3225 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3226 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3227 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3228 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3229 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3230 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3231 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3232 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3233 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3234 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3235 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3236 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3237 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3238 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3239 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3240 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3241 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3242 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3243 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3244 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3245 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3246 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3248 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3253 	mask = 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3254 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3255 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3256 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3257 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3258 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3259 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3260 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3261 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3262 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3263 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3264 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3265 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3266 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3267 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3268 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3269 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3270 	mask |= 1U << ((mmDMA4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3271 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3272 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3273 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3274 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3275 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3276 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3277 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3278 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3279 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3280 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3281 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3282 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3283 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3285 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3292 	mask = 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3293 	mask |= 1U << ((mmDMA4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3295 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3299 	mask = 1U << ((mmDMA4_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3300 	mask |= 1U << ((mmDMA4_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3301 	mask |= 1U << ((mmDMA4_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3302 	mask |= 1U << ((mmDMA4_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3303 	mask |= 1U << ((mmDMA4_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3304 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3305 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3306 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3307 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3308 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3309 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3310 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3311 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3312 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3313 	mask |= 1U << ((mmDMA4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3314 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3315 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3316 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3318 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3322 	mask = 1U << ((mmDMA4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3323 	mask |= 1U << ((mmDMA4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3324 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3325 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3327 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3331 	mask = 1U << ((mmDMA4_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3332 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3333 	mask |= 1U << ((mmDMA4_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3334 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3335 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3336 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3337 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3338 	mask |= 1U << ((mmDMA4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3339 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3340 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3341 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3342 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3343 	mask |= 1U << ((mmDMA4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3345 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3349 	mask = 1U << ((mmDMA4_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3350 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3351 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3352 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3353 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3354 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3355 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3356 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3357 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3358 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3359 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3360 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3361 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3362 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3363 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3364 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3365 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3366 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3367 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3368 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3369 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3370 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3371 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3372 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3373 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3375 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3380 	mask = 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3381 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3382 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3383 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3384 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3385 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3386 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3387 	mask |= 1U << ((mmDMA4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3389 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3396 	mask = 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3397 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3398 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3399 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3400 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3402 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3406 	mask = 1U << ((mmDMA4_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3407 	mask |= 1U << ((mmDMA4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3408 	mask |= 1U << ((mmDMA4_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3409 	mask |= 1U << ((mmDMA4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3410 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3411 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3412 	mask |= 1U << ((mmDMA4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3413 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3414 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3415 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3416 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3417 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3418 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3419 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3420 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3421 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3422 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3423 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3424 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3425 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3426 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3427 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3428 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3429 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3430 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3431 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3432 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3434 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3439 	mask = 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3440 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3441 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3442 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3443 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3444 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3445 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3446 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3447 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3448 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3449 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3450 	mask |= 1U << ((mmDMA4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3451 	mask |= 1U << ((mmDMA4_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3452 	mask |= 1U << ((mmDMA4_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3453 	mask |= 1U << ((mmDMA4_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3455 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3459 	mask = 1U << ((mmDMA4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3460 	mask |= 1U << ((mmDMA4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3461 	mask |= 1U << ((mmDMA4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3462 	mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3463 	mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3464 	mask |= 1U << ((mmDMA4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3465 	mask |= 1U << ((mmDMA4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3466 	mask |= 1U << ((mmDMA4_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3467 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3468 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3469 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3470 	mask |= 1U << ((mmDMA4_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3471 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3472 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3473 	mask |= 1U << ((mmDMA4_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3475 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3480 	mask = 1U << ((mmDMA4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3482 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3486 	mask = 1U << ((mmDMA5_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3487 	mask |= 1U << ((mmDMA5_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3488 	mask |= 1U << ((mmDMA5_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3489 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3490 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3491 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3492 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3493 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3494 	mask |= 1U << ((mmDMA5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3495 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3496 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3497 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3498 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3499 	mask |= 1U << ((mmDMA5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3500 	mask |= 1U << ((mmDMA5_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3501 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3502 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3503 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3504 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3505 	mask |= 1U << ((mmDMA5_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3506 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3507 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3508 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3509 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3510 	mask |= 1U << ((mmDMA5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3511 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3512 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3513 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3514 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3516 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3520 	mask = 1U << ((mmDMA5_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3521 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3522 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3523 	mask |= 1U << ((mmDMA5_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3524 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3525 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3526 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3527 	mask |= 1U << ((mmDMA5_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3528 	mask |= 1U << ((mmDMA5_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3529 	mask |= 1U << ((mmDMA5_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3530 	mask |= 1U << ((mmDMA5_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3531 	mask |= 1U << ((mmDMA5_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3532 	mask |= 1U << ((mmDMA5_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3533 	mask |= 1U << ((mmDMA5_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3534 	mask |= 1U << ((mmDMA5_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3535 	mask |= 1U << ((mmDMA5_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3536 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3537 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3538 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3539 	mask |= 1U << ((mmDMA5_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3540 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3541 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3542 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3543 	mask |= 1U << ((mmDMA5_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3544 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3545 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3546 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3547 	mask |= 1U << ((mmDMA5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3548 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3549 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3550 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3551 	mask |= 1U << ((mmDMA5_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3553 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3557 	mask = 1U << ((mmDMA5_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3558 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3559 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3560 	mask |= 1U << ((mmDMA5_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3561 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3562 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3563 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3564 	mask |= 1U << ((mmDMA5_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3565 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3566 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3567 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3568 	mask |= 1U << ((mmDMA5_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3569 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3570 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3571 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3573 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3577 	mask = 1U << ((mmDMA5_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3578 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3579 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3580 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3581 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3582 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3583 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3584 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3585 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3586 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3587 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3588 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3589 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3590 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3591 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3592 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3593 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3594 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3595 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3596 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3597 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3598 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3599 	mask |= 1U << ((mmDMA5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3600 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3601 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3602 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3603 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3604 	mask |= 1U << ((mmDMA5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3606 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3610 	mask = 1U << ((mmDMA5_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3611 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3612 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3613 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3614 	mask |= 1U << ((mmDMA5_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3615 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3616 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3617 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3618 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3619 	mask |= 1U << ((mmDMA5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3620 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3621 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3622 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3623 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3624 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3625 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3626 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3627 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3628 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3629 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3630 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3631 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3632 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3633 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3634 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3635 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3636 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3637 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3638 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3639 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3640 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3641 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3643 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3648 	mask = 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3649 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3650 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3651 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3652 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3653 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3654 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3655 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3656 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3657 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3658 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3659 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3660 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3661 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3662 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3663 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3664 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3665 	mask |= 1U << ((mmDMA5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3666 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3667 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3668 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3669 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3670 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3671 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3672 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3673 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3674 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3675 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3676 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3677 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3678 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3680 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3687 	mask = 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3688 	mask |= 1U << ((mmDMA5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3690 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3694 	mask = 1U << ((mmDMA5_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3695 	mask |= 1U << ((mmDMA5_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3696 	mask |= 1U << ((mmDMA5_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3697 	mask |= 1U << ((mmDMA5_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3698 	mask |= 1U << ((mmDMA5_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3699 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3700 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3701 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3702 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3703 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3704 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3705 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3706 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3707 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3708 	mask |= 1U << ((mmDMA5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3709 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3710 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3711 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3713 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3717 	mask = 1U << ((mmDMA5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3718 	mask |= 1U << ((mmDMA5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3719 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3720 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3722 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3726 	mask = 1U << ((mmDMA5_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3727 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3728 	mask |= 1U << ((mmDMA5_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3729 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3730 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3731 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3732 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3733 	mask |= 1U << ((mmDMA5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3734 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3735 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3736 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3737 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3738 	mask |= 1U << ((mmDMA5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3740 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3744 	mask = 1U << ((mmDMA5_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3745 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3746 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3747 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3748 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3749 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3750 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3751 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3752 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3753 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3754 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3755 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3756 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3757 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3758 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3759 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3760 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3761 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3762 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3763 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3764 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3765 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3766 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3767 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3768 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3770 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3775 	mask = 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3776 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3777 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3778 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3779 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3780 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3781 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3782 	mask |= 1U << ((mmDMA5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3784 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3791 	mask = 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3792 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3793 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3794 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3795 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3797 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3801 	mask = 1U << ((mmDMA5_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3802 	mask |= 1U << ((mmDMA5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3803 	mask |= 1U << ((mmDMA5_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3804 	mask |= 1U << ((mmDMA5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3805 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3806 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3807 	mask |= 1U << ((mmDMA5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3808 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3809 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3810 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3811 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3812 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3813 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3814 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3815 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3816 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3817 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3818 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3819 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3820 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3821 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3822 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3823 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3824 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3825 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3826 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3827 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3829 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3834 	mask = 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3835 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3836 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3837 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3838 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3839 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3840 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3841 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3842 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3843 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3844 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3845 	mask |= 1U << ((mmDMA5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3846 	mask |= 1U << ((mmDMA5_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3847 	mask |= 1U << ((mmDMA5_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3848 	mask |= 1U << ((mmDMA5_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3850 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3854 	mask = 1U << ((mmDMA5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3855 	mask |= 1U << ((mmDMA5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3856 	mask |= 1U << ((mmDMA5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3857 	mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3858 	mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3859 	mask |= 1U << ((mmDMA5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3860 	mask |= 1U << ((mmDMA5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3861 	mask |= 1U << ((mmDMA5_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3862 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3863 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3864 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3865 	mask |= 1U << ((mmDMA5_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3866 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3867 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3868 	mask |= 1U << ((mmDMA5_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3870 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3875 	mask = 1U << ((mmDMA5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3877 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3881 	mask = 1U << ((mmDMA6_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3882 	mask |= 1U << ((mmDMA6_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3883 	mask |= 1U << ((mmDMA6_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3884 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3885 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3886 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3887 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3888 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3889 	mask |= 1U << ((mmDMA6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3890 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3891 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3892 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3893 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3894 	mask |= 1U << ((mmDMA6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3895 	mask |= 1U << ((mmDMA6_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3896 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3897 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3898 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3899 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3900 	mask |= 1U << ((mmDMA6_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3901 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3902 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3903 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3904 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3905 	mask |= 1U << ((mmDMA6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3906 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3907 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3908 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3909 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3911 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3915 	mask = 1U << ((mmDMA6_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3916 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3917 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3918 	mask |= 1U << ((mmDMA6_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3919 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3920 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3921 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3922 	mask |= 1U << ((mmDMA6_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3923 	mask |= 1U << ((mmDMA6_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3924 	mask |= 1U << ((mmDMA6_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3925 	mask |= 1U << ((mmDMA6_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3926 	mask |= 1U << ((mmDMA6_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3927 	mask |= 1U << ((mmDMA6_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3928 	mask |= 1U << ((mmDMA6_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3929 	mask |= 1U << ((mmDMA6_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3930 	mask |= 1U << ((mmDMA6_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3931 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3932 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3933 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3934 	mask |= 1U << ((mmDMA6_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3935 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3936 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3937 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3938 	mask |= 1U << ((mmDMA6_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3939 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3940 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3941 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3942 	mask |= 1U << ((mmDMA6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3943 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3944 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3945 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3946 	mask |= 1U << ((mmDMA6_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3948 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3952 	mask = 1U << ((mmDMA6_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3953 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3954 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3955 	mask |= 1U << ((mmDMA6_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3956 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3957 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3958 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3959 	mask |= 1U << ((mmDMA6_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3960 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3961 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3962 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3963 	mask |= 1U << ((mmDMA6_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3964 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3965 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3966 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3968 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
3972 	mask = 1U << ((mmDMA6_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3973 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3974 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3975 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3976 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3977 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3978 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3979 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3980 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3981 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3982 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3983 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3984 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3985 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3986 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3987 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3988 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3989 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3990 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3991 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3992 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3993 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3994 	mask |= 1U << ((mmDMA6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3995 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3996 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3997 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3998 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
3999 	mask |= 1U << ((mmDMA6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4001 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4005 	mask = 1U << ((mmDMA6_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4006 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4007 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4008 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4009 	mask |= 1U << ((mmDMA6_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4010 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4011 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4012 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4013 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4014 	mask |= 1U << ((mmDMA6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4015 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4016 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4017 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4018 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4019 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4020 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4021 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4022 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4023 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4024 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4025 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4026 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4027 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4028 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4029 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4030 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4031 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4032 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4033 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4034 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4035 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4036 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4038 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4043 	mask = 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4044 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4045 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4046 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4047 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4048 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4049 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4050 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4051 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4052 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4053 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4054 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4055 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4056 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4057 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4058 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4059 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4060 	mask |= 1U << ((mmDMA6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4061 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4062 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4063 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4064 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4065 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4066 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4067 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4068 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4069 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4070 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4071 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4072 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4073 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4075 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4082 	mask = 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4083 	mask |= 1U << ((mmDMA6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4085 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4089 	mask = 1U << ((mmDMA6_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4090 	mask |= 1U << ((mmDMA6_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4091 	mask |= 1U << ((mmDMA6_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4092 	mask |= 1U << ((mmDMA6_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4093 	mask |= 1U << ((mmDMA6_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4094 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4095 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4096 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4097 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4098 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4099 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4100 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4101 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4102 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4103 	mask |= 1U << ((mmDMA6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4104 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4105 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4106 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4108 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4112 	mask = 1U << ((mmDMA6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4113 	mask |= 1U << ((mmDMA6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4114 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4115 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4117 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4121 	mask = 1U << ((mmDMA6_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4122 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4123 	mask |= 1U << ((mmDMA6_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4124 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4125 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4126 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4127 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4128 	mask |= 1U << ((mmDMA6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4129 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4130 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4131 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4132 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4133 	mask |= 1U << ((mmDMA6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4135 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4139 	mask = 1U << ((mmDMA6_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4140 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4141 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4142 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4143 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4144 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4145 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4146 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4147 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4148 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4149 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4150 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4151 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4152 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4153 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4154 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4155 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4156 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4157 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4158 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4159 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4160 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4161 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4162 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4163 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4165 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4170 	mask = 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4171 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4172 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4173 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4174 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4175 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4176 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4177 	mask |= 1U << ((mmDMA6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4179 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4187 	mask = 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4188 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4189 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4190 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4191 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4193 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4197 	mask = 1U << ((mmDMA6_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4198 	mask |= 1U << ((mmDMA6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4199 	mask |= 1U << ((mmDMA6_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4200 	mask |= 1U << ((mmDMA6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4201 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4202 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4203 	mask |= 1U << ((mmDMA6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4204 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4205 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4206 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4207 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4208 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4209 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4210 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4211 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4212 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4213 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4214 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4215 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4216 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4217 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4218 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4219 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4220 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4221 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4222 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4223 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4225 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4230 	mask = 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4231 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4232 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4233 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4234 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4235 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4236 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4237 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4238 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4239 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4240 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4241 	mask |= 1U << ((mmDMA6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4242 	mask |= 1U << ((mmDMA6_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4243 	mask |= 1U << ((mmDMA6_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4244 	mask |= 1U << ((mmDMA6_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4246 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4250 	mask = 1U << ((mmDMA6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4251 	mask |= 1U << ((mmDMA6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4252 	mask |= 1U << ((mmDMA6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4253 	mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4254 	mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4255 	mask |= 1U << ((mmDMA6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4256 	mask |= 1U << ((mmDMA6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4257 	mask |= 1U << ((mmDMA6_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4258 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4259 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4260 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4261 	mask |= 1U << ((mmDMA6_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4262 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4263 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4264 	mask |= 1U << ((mmDMA6_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4266 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4271 	mask = 1U << ((mmDMA6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4273 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4277 	mask = 1U << ((mmDMA7_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4278 	mask |= 1U << ((mmDMA7_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4279 	mask |= 1U << ((mmDMA7_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4280 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4281 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4282 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4283 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4284 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4285 	mask |= 1U << ((mmDMA7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4286 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4287 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4288 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4289 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4290 	mask |= 1U << ((mmDMA7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4291 	mask |= 1U << ((mmDMA7_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4292 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4293 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4294 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4295 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4296 	mask |= 1U << ((mmDMA7_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4297 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4298 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4299 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4300 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4301 	mask |= 1U << ((mmDMA7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4302 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4303 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4304 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4305 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4307 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4311 	mask = 1U << ((mmDMA7_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4312 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4313 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4314 	mask |= 1U << ((mmDMA7_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4315 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4316 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4317 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4318 	mask |= 1U << ((mmDMA7_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4319 	mask |= 1U << ((mmDMA7_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4320 	mask |= 1U << ((mmDMA7_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4321 	mask |= 1U << ((mmDMA7_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4322 	mask |= 1U << ((mmDMA7_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4323 	mask |= 1U << ((mmDMA7_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4324 	mask |= 1U << ((mmDMA7_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4325 	mask |= 1U << ((mmDMA7_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4326 	mask |= 1U << ((mmDMA7_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4327 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4328 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4329 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4330 	mask |= 1U << ((mmDMA7_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4331 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4332 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4333 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4334 	mask |= 1U << ((mmDMA7_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4335 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4336 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4337 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4338 	mask |= 1U << ((mmDMA7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4339 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4340 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4341 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4342 	mask |= 1U << ((mmDMA7_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4344 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4348 	mask = 1U << ((mmDMA7_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4349 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4350 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4351 	mask |= 1U << ((mmDMA7_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4352 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4353 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4354 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4355 	mask |= 1U << ((mmDMA7_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4356 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4357 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4358 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4359 	mask |= 1U << ((mmDMA7_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4360 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4361 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4362 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4364 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4368 	mask = 1U << ((mmDMA7_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4369 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4370 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4371 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4372 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4373 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4374 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4375 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4376 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4377 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4378 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4379 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4380 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4381 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4382 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4383 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4384 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4385 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4386 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4387 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4388 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4389 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4390 	mask |= 1U << ((mmDMA7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4391 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4392 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4393 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4394 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4395 	mask |= 1U << ((mmDMA7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4397 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4401 	mask = 1U << ((mmDMA7_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4402 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4403 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4404 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4405 	mask |= 1U << ((mmDMA7_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4406 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4407 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4408 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4409 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4410 	mask |= 1U << ((mmDMA7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4411 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4412 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4413 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4414 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4415 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4416 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4417 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4418 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4419 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4420 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4421 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4422 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4423 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4424 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4425 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4426 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4427 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4428 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4429 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4430 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4431 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4432 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4434 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4439 	mask = 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4440 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4441 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4442 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4443 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4444 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4445 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4446 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4447 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4448 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4449 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4450 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4451 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4452 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4453 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4454 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4455 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4456 	mask |= 1U << ((mmDMA7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4457 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4458 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4459 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4460 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4461 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4462 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4463 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4464 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4465 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4466 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4467 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4468 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4469 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4471 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4478 	mask = 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4479 	mask |= 1U << ((mmDMA7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4481 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4485 	mask = 1U << ((mmDMA7_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4486 	mask |= 1U << ((mmDMA7_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4487 	mask |= 1U << ((mmDMA7_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4488 	mask |= 1U << ((mmDMA7_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4489 	mask |= 1U << ((mmDMA7_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4490 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4491 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4492 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4493 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4494 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4495 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4496 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4497 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4498 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4499 	mask |= 1U << ((mmDMA7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4500 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4501 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4502 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4504 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4508 	mask = 1U << ((mmDMA7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4509 	mask |= 1U << ((mmDMA7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4510 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4511 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4513 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4517 	mask = 1U << ((mmDMA7_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4518 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4519 	mask |= 1U << ((mmDMA7_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4520 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4521 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4522 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4523 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4524 	mask |= 1U << ((mmDMA7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4525 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4526 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4527 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4528 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4529 	mask |= 1U << ((mmDMA7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4531 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4535 	mask = 1U << ((mmDMA7_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4536 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4537 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4538 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4539 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4540 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4541 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4542 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4543 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4544 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4545 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4546 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4547 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4548 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4549 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4550 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4551 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4552 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4553 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4554 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4555 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4556 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4557 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4558 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4559 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4561 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4566 	mask = 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4567 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4568 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4569 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4570 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4571 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4572 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4573 	mask |= 1U << ((mmDMA7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4575 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4582 	mask = 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4583 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4584 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4585 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4586 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4588 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4592 	mask = 1U << ((mmDMA7_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4593 	mask |= 1U << ((mmDMA7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4594 	mask |= 1U << ((mmDMA7_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4595 	mask |= 1U << ((mmDMA7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4596 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4597 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4598 	mask |= 1U << ((mmDMA7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4599 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4600 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4601 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4602 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4603 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4604 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4605 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4606 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4607 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4608 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4609 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4610 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4611 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4612 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4613 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4614 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4615 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4616 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4617 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4618 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4620 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4625 	mask = 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4626 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4627 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4628 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4629 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4630 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4631 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4632 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4633 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4634 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4635 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4636 	mask |= 1U << ((mmDMA7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4637 	mask |= 1U << ((mmDMA7_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4638 	mask |= 1U << ((mmDMA7_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4639 	mask |= 1U << ((mmDMA7_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4641 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4645 	mask = 1U << ((mmDMA7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4646 	mask |= 1U << ((mmDMA7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4647 	mask |= 1U << ((mmDMA7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4648 	mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4649 	mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4650 	mask |= 1U << ((mmDMA7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4651 	mask |= 1U << ((mmDMA7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4652 	mask |= 1U << ((mmDMA7_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4653 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4654 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4655 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4656 	mask |= 1U << ((mmDMA7_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4657 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4658 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4659 	mask |= 1U << ((mmDMA7_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4661 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4666 	mask = 1U << ((mmDMA7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4668 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4672 	mask = 1U << ((mmDMA0_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4673 	mask |= 1U << ((mmDMA0_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4674 	mask |= 1U << ((mmDMA0_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4676 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4680 	mask = 1U << ((mmDMA0_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4681 	mask |= 1U << ((mmDMA0_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4682 	mask |= 1U << ((mmDMA0_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4684 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4689 	mask = 1U << ((mmDMA0_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4690 	mask |= 1U << ((mmDMA0_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4691 	mask |= 1U << ((mmDMA0_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4692 	mask |= 1U << ((mmDMA0_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4693 	mask |= 1U << ((mmDMA0_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4694 	mask |= 1U << ((mmDMA0_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4695 	mask |= 1U << ((mmDMA0_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4696 	mask |= 1U << ((mmDMA0_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4697 	mask |= 1U << ((mmDMA0_CORE_WR_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4698 	mask |= 1U << ((mmDMA0_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4699 	mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4700 	mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4701 	mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4702 	mask |= 1U << ((mmDMA0_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4703 	mask |= 1U << ((mmDMA0_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4704 	mask |= 1U << ((mmDMA0_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4705 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4706 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4707 	mask |= 1U << ((mmDMA0_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4709 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4713 	mask = 1U << ((mmDMA0_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4714 	mask |= 1U << ((mmDMA0_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4716 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4720 	mask = 1U << ((mmDMA0_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4721 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4722 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4723 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4724 	mask |= 1U << ((mmDMA0_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4725 	mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4726 	mask |= 1U << ((mmDMA0_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4727 	mask |= 1U << ((mmDMA0_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4728 	mask |= 1U << ((mmDMA0_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4729 	mask |= 1U << ((mmDMA0_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4730 	mask |= 1U << ((mmDMA0_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4731 	mask |= 1U << ((mmDMA0_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4733 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4737 	mask = 1U << ((mmDMA1_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4738 	mask |= 1U << ((mmDMA1_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4739 	mask |= 1U << ((mmDMA1_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4741 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4745 	mask = 1U << ((mmDMA1_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4746 	mask |= 1U << ((mmDMA1_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4747 	mask |= 1U << ((mmDMA1_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4749 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4754 	mask = 1U << ((mmDMA1_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4755 	mask |= 1U << ((mmDMA1_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4756 	mask |= 1U << ((mmDMA1_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4757 	mask |= 1U << ((mmDMA1_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4758 	mask |= 1U << ((mmDMA1_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4759 	mask |= 1U << ((mmDMA1_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4760 	mask |= 1U << ((mmDMA1_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4761 	mask |= 1U << ((mmDMA1_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4762 	mask |= 1U << ((mmDMA1_CORE_WR_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4763 	mask |= 1U << ((mmDMA1_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4764 	mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4765 	mask |= 1U << ((mmDMA1_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4766 	mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4767 	mask |= 1U << ((mmDMA1_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4768 	mask |= 1U << ((mmDMA1_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4769 	mask |= 1U << ((mmDMA1_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4770 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4771 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4772 	mask |= 1U << ((mmDMA1_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4774 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4778 	mask = 1U << ((mmDMA1_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4779 	mask |= 1U << ((mmDMA1_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4781 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4785 	mask = 1U << ((mmDMA1_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4786 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4787 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4788 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4789 	mask |= 1U << ((mmDMA1_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4790 	mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4791 	mask |= 1U << ((mmDMA1_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4792 	mask |= 1U << ((mmDMA1_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4793 	mask |= 1U << ((mmDMA1_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4794 	mask |= 1U << ((mmDMA1_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4795 	mask |= 1U << ((mmDMA1_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4796 	mask |= 1U << ((mmDMA1_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4798 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4802 	mask = 1U << ((mmDMA2_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4803 	mask |= 1U << ((mmDMA2_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4804 	mask |= 1U << ((mmDMA2_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4806 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4810 	mask = 1U << ((mmDMA2_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4811 	mask |= 1U << ((mmDMA2_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4812 	mask |= 1U << ((mmDMA2_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4814 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4819 	mask = 1U << ((mmDMA2_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4820 	mask |= 1U << ((mmDMA2_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4821 	mask |= 1U << ((mmDMA2_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4822 	mask |= 1U << ((mmDMA2_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4823 	mask |= 1U << ((mmDMA2_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4824 	mask |= 1U << ((mmDMA2_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4825 	mask |= 1U << ((mmDMA2_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4826 	mask |= 1U << ((mmDMA2_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4827 	mask |= 1U << ((mmDMA2_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4828 	mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4829 	mask |= 1U << ((mmDMA2_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4830 	mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4831 	mask |= 1U << ((mmDMA2_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4832 	mask |= 1U << ((mmDMA2_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4833 	mask |= 1U << ((mmDMA2_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4834 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4835 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4836 	mask |= 1U << ((mmDMA2_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4838 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4842 	mask = 1U << ((mmDMA2_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4843 	mask |= 1U << ((mmDMA2_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4845 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4849 	mask = 1U << ((mmDMA2_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4850 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4851 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4852 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4853 	mask |= 1U << ((mmDMA2_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4854 	mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4855 	mask |= 1U << ((mmDMA2_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4856 	mask |= 1U << ((mmDMA2_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4857 	mask |= 1U << ((mmDMA2_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4858 	mask |= 1U << ((mmDMA2_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4859 	mask |= 1U << ((mmDMA2_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4860 	mask |= 1U << ((mmDMA2_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4862 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4866 	mask = 1U << ((mmDMA3_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4867 	mask |= 1U << ((mmDMA3_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4868 	mask |= 1U << ((mmDMA3_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4870 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4874 	mask = 1U << ((mmDMA3_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4875 	mask |= 1U << ((mmDMA3_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4876 	mask |= 1U << ((mmDMA3_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4878 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4883 	mask = 1U << ((mmDMA3_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4884 	mask |= 1U << ((mmDMA3_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4885 	mask |= 1U << ((mmDMA3_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4886 	mask |= 1U << ((mmDMA3_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4887 	mask |= 1U << ((mmDMA3_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4888 	mask |= 1U << ((mmDMA3_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4889 	mask |= 1U << ((mmDMA3_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4890 	mask |= 1U << ((mmDMA3_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4891 	mask |= 1U << ((mmDMA3_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4892 	mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4893 	mask |= 1U << ((mmDMA3_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4894 	mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4895 	mask |= 1U << ((mmDMA3_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4896 	mask |= 1U << ((mmDMA3_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4897 	mask |= 1U << ((mmDMA3_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4898 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4899 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4900 	mask |= 1U << ((mmDMA3_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4902 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4906 	mask = 1U << ((mmDMA3_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4907 	mask |= 1U << ((mmDMA3_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4909 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4913 	mask = 1U << ((mmDMA3_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4914 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4915 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4916 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4917 	mask |= 1U << ((mmDMA3_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4918 	mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4919 	mask |= 1U << ((mmDMA3_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4920 	mask |= 1U << ((mmDMA3_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4921 	mask |= 1U << ((mmDMA3_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4922 	mask |= 1U << ((mmDMA3_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4923 	mask |= 1U << ((mmDMA3_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4924 	mask |= 1U << ((mmDMA3_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4926 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4930 	mask = 1U << ((mmDMA4_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4931 	mask |= 1U << ((mmDMA4_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4932 	mask |= 1U << ((mmDMA4_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4934 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4938 	mask = 1U << ((mmDMA4_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4939 	mask |= 1U << ((mmDMA4_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4940 	mask |= 1U << ((mmDMA4_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4942 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4947 	mask = 1U << ((mmDMA4_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4948 	mask |= 1U << ((mmDMA4_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4949 	mask |= 1U << ((mmDMA4_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4950 	mask |= 1U << ((mmDMA4_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4951 	mask |= 1U << ((mmDMA4_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4952 	mask |= 1U << ((mmDMA4_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4953 	mask |= 1U << ((mmDMA4_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4954 	mask |= 1U << ((mmDMA4_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4955 	mask |= 1U << ((mmDMA4_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4956 	mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4957 	mask |= 1U << ((mmDMA4_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4958 	mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4959 	mask |= 1U << ((mmDMA4_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4960 	mask |= 1U << ((mmDMA4_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4961 	mask |= 1U << ((mmDMA4_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4962 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4963 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4964 	mask |= 1U << ((mmDMA4_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4966 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4970 	mask = 1U << ((mmDMA4_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4971 	mask |= 1U << ((mmDMA4_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4973 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4977 	mask = 1U << ((mmDMA4_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4978 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4979 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4980 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4981 	mask |= 1U << ((mmDMA4_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4982 	mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4983 	mask |= 1U << ((mmDMA4_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4984 	mask |= 1U << ((mmDMA4_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4985 	mask |= 1U << ((mmDMA4_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4986 	mask |= 1U << ((mmDMA4_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4987 	mask |= 1U << ((mmDMA4_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4988 	mask |= 1U << ((mmDMA4_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4990 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
4994 	mask = 1U << ((mmDMA5_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4995 	mask |= 1U << ((mmDMA5_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4996 	mask |= 1U << ((mmDMA5_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
4998 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5002 	mask = 1U << ((mmDMA5_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5003 	mask |= 1U << ((mmDMA5_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5004 	mask |= 1U << ((mmDMA5_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5006 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5011 	mask = 1U << ((mmDMA5_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5012 	mask |= 1U << ((mmDMA5_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5013 	mask |= 1U << ((mmDMA5_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5014 	mask |= 1U << ((mmDMA5_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5015 	mask |= 1U << ((mmDMA5_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5016 	mask |= 1U << ((mmDMA5_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5017 	mask |= 1U << ((mmDMA5_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5018 	mask |= 1U << ((mmDMA5_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5019 	mask |= 1U << ((mmDMA5_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5020 	mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5021 	mask |= 1U << ((mmDMA5_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5022 	mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5023 	mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5024 	mask |= 1U << ((mmDMA5_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5025 	mask |= 1U << ((mmDMA5_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5026 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5027 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5028 	mask |= 1U << ((mmDMA5_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5030 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5034 	mask = 1U << ((mmDMA5_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5035 	mask |= 1U << ((mmDMA5_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5037 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5041 	mask = 1U << ((mmDMA5_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5042 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5043 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5044 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5045 	mask |= 1U << ((mmDMA5_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5046 	mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5047 	mask |= 1U << ((mmDMA5_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5048 	mask |= 1U << ((mmDMA5_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5049 	mask |= 1U << ((mmDMA5_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5050 	mask |= 1U << ((mmDMA5_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5051 	mask |= 1U << ((mmDMA5_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5052 	mask |= 1U << ((mmDMA5_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5054 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5058 	mask = 1U << ((mmDMA6_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5059 	mask |= 1U << ((mmDMA6_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5060 	mask |= 1U << ((mmDMA6_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5062 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5066 	mask = 1U << ((mmDMA6_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5067 	mask |= 1U << ((mmDMA6_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5068 	mask |= 1U << ((mmDMA6_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5070 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5075 	mask = 1U << ((mmDMA6_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5076 	mask |= 1U << ((mmDMA6_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5077 	mask |= 1U << ((mmDMA6_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5078 	mask |= 1U << ((mmDMA6_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5079 	mask |= 1U << ((mmDMA6_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5080 	mask |= 1U << ((mmDMA6_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5081 	mask |= 1U << ((mmDMA6_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5082 	mask |= 1U << ((mmDMA6_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5083 	mask |= 1U << ((mmDMA6_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5084 	mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5085 	mask |= 1U << ((mmDMA6_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5086 	mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5087 	mask |= 1U << ((mmDMA6_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5088 	mask |= 1U << ((mmDMA6_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5089 	mask |= 1U << ((mmDMA6_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5090 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5091 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5092 	mask |= 1U << ((mmDMA6_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5094 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5098 	mask = 1U << ((mmDMA6_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5099 	mask |= 1U << ((mmDMA6_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5101 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5105 	mask = 1U << ((mmDMA6_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5106 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5107 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5108 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5109 	mask |= 1U << ((mmDMA6_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5110 	mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5111 	mask |= 1U << ((mmDMA6_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5112 	mask |= 1U << ((mmDMA6_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5113 	mask |= 1U << ((mmDMA6_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5114 	mask |= 1U << ((mmDMA6_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5115 	mask |= 1U << ((mmDMA6_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5116 	mask |= 1U << ((mmDMA6_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5118 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5122 	mask = 1U << ((mmDMA7_CORE_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5123 	mask |= 1U << ((mmDMA7_CORE_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5124 	mask |= 1U << ((mmDMA7_CORE_LBW_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5126 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5130 	mask = 1U << ((mmDMA7_CORE_PROT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5131 	mask |= 1U << ((mmDMA7_CORE_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5132 	mask |= 1U << ((mmDMA7_CORE_NON_SECURE_PROPS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5134 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5139 	mask = 1U << ((mmDMA7_CORE_RD_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5140 	mask |= 1U << ((mmDMA7_CORE_RD_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5141 	mask |= 1U << ((mmDMA7_CORE_RD_ARCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5142 	mask |= 1U << ((mmDMA7_CORE_RD_ARUSER_31_11 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5143 	mask |= 1U << ((mmDMA7_CORE_RD_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5144 	mask |= 1U << ((mmDMA7_CORE_WR_MAX_OUTSTAND & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5145 	mask |= 1U << ((mmDMA7_CORE_WR_MAX_AWID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5146 	mask |= 1U << ((mmDMA7_CORE_WR_AWCACHE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5147 	mask |= 1U << ((mmDMA7_CORE_WR_INFLIGHTS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5148 	mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5149 	mask |= 1U << ((mmDMA7_CORE_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5150 	mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5151 	mask |= 1U << ((mmDMA7_CORE_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5152 	mask |= 1U << ((mmDMA7_CORE_ERR_CFG & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5153 	mask |= 1U << ((mmDMA7_CORE_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5154 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_LO & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5155 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_ADDR_HI & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5156 	mask |= 1U << ((mmDMA7_CORE_ERRMSG_WDATA & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5158 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5162 	mask = 1U << ((mmDMA7_CORE_STS0 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5163 	mask |= 1U << ((mmDMA7_CORE_STS1 & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5165 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5169 	mask = 1U << ((mmDMA7_CORE_RD_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5170 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5171 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5172 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5173 	mask |= 1U << ((mmDMA7_CORE_RD_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5174 	mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AR_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5175 	mask |= 1U << ((mmDMA7_CORE_DBG_HBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5176 	mask |= 1U << ((mmDMA7_CORE_DBG_LBW_AXI_AW_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5177 	mask |= 1U << ((mmDMA7_CORE_DBG_DESC_CNT & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5178 	mask |= 1U << ((mmDMA7_CORE_DBG_STS & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5179 	mask |= 1U << ((mmDMA7_CORE_DBG_RD_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5180 	mask |= 1U << ((mmDMA7_CORE_DBG_WR_DESC_ID & 0x7F) >> 2);  in gaudi_init_dma_protection_bits()
5182 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_dma_protection_bits()
5187 	u32 pb_addr, mask;  in gaudi_init_tpc_protection_bits()  local
5204 	mask = 1U << ((mmTPC0_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5205 	mask |= 1U << ((mmTPC0_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5206 	mask |= 1U << ((mmTPC0_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5207 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5208 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5209 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5210 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5211 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5212 	mask |= 1U << ((mmTPC0_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5213 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5214 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5215 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5216 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5217 	mask |= 1U << ((mmTPC0_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5218 	mask |= 1U << ((mmTPC0_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5219 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5220 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5221 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5222 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5223 	mask |= 1U << ((mmTPC0_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5224 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5225 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5226 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5227 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5228 	mask |= 1U << ((mmTPC0_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5229 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5230 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5231 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5232 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5234 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5238 	mask = 1U << ((mmTPC0_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5239 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5240 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5241 	mask |= 1U << ((mmTPC0_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5242 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5243 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5244 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5245 	mask |= 1U << ((mmTPC0_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5246 	mask |= 1U << ((mmTPC0_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5247 	mask |= 1U << ((mmTPC0_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5248 	mask |= 1U << ((mmTPC0_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5249 	mask |= 1U << ((mmTPC0_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5250 	mask |= 1U << ((mmTPC0_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5251 	mask |= 1U << ((mmTPC0_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5252 	mask |= 1U << ((mmTPC0_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5253 	mask |= 1U << ((mmTPC0_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5254 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5255 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5256 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5257 	mask |= 1U << ((mmTPC0_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5258 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5259 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5260 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5261 	mask |= 1U << ((mmTPC0_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5262 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5263 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5264 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5265 	mask |= 1U << ((mmTPC0_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5266 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5267 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5268 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5269 	mask |= 1U << ((mmTPC0_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5271 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5275 	mask = 1U << ((mmTPC0_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5276 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5277 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5278 	mask |= 1U << ((mmTPC0_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5279 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5280 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5281 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5282 	mask |= 1U << ((mmTPC0_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5283 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5284 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5285 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5286 	mask |= 1U << ((mmTPC0_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5287 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5288 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5289 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5291 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5295 	mask = 1U << ((mmTPC0_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5296 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5297 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5298 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5299 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5300 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5301 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5302 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5303 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5304 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5305 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5306 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5307 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5308 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5309 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5310 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5311 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5312 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5313 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5314 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5315 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5316 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5317 	mask |= 1U << ((mmTPC0_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5318 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5319 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5320 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5321 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5322 	mask |= 1U << ((mmTPC0_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5324 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5328 	mask = 1U << ((mmTPC0_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5329 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5330 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5331 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5332 	mask |= 1U << ((mmTPC0_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5333 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5334 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5335 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5336 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5337 	mask |= 1U << ((mmTPC0_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5338 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5339 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5340 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5341 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5342 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5343 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5344 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5345 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5346 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5347 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5348 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5349 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5350 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5351 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5352 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5353 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5354 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5355 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5356 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5357 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5358 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5359 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5361 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5366 	mask = 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5367 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5368 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5369 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5370 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5371 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5372 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5373 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5374 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5375 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5376 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5377 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5378 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5379 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5380 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5381 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5382 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5383 	mask |= 1U << ((mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5384 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5385 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5386 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5387 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5388 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5389 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5390 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5391 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5392 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5393 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5394 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5395 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5396 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5398 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5406 	mask = 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5407 	mask |= 1U << ((mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5409 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5413 	mask = 1U << ((mmTPC0_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5414 	mask |= 1U << ((mmTPC0_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5415 	mask |= 1U << ((mmTPC0_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5416 	mask |= 1U << ((mmTPC0_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5417 	mask |= 1U << ((mmTPC0_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5418 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5419 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5420 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5421 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5422 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5423 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5424 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5425 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5426 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5427 	mask |= 1U << ((mmTPC0_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5428 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5429 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5430 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5432 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5436 	mask = 1U << ((mmTPC0_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5437 	mask |= 1U << ((mmTPC0_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5438 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5439 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5441 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5445 	mask = 1U << ((mmTPC0_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5446 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5447 	mask |= 1U << ((mmTPC0_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5448 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5449 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5450 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5451 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5452 	mask |= 1U << ((mmTPC0_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5453 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5454 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5455 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5456 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5457 	mask |= 1U << ((mmTPC0_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5459 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5463 	mask = 1U << ((mmTPC0_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5464 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5465 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5466 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5467 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5468 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5469 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5470 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5471 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5472 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5473 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5474 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5475 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5476 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5477 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5478 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5479 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5480 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5481 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5482 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5483 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5484 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5485 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5486 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5487 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5489 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5494 	mask = 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5495 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5496 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5497 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5498 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5499 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5500 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5501 	mask |= 1U << ((mmTPC0_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5503 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5510 	mask = 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5511 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5512 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5513 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5514 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5516 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5520 	mask = 1U << ((mmTPC0_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5521 	mask |= 1U << ((mmTPC0_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5522 	mask |= 1U << ((mmTPC0_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5523 	mask |= 1U << ((mmTPC0_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5524 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5525 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5526 	mask |= 1U << ((mmTPC0_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5527 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5528 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5529 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5530 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5531 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5532 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5533 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5534 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5535 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5536 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5537 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5538 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5539 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5540 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5541 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5542 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5543 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5544 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5545 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5546 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5548 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5553 	mask = 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5554 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5555 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5556 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5557 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5558 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5559 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5560 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5561 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5562 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5563 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5564 	mask |= 1U << ((mmTPC0_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5565 	mask |= 1U << ((mmTPC0_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5566 	mask |= 1U << ((mmTPC0_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5567 	mask |= 1U << ((mmTPC0_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5569 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5573 	mask = 1U << ((mmTPC0_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5574 	mask |= 1U << ((mmTPC0_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5575 	mask |= 1U << ((mmTPC0_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5576 	mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5577 	mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5578 	mask |= 1U << ((mmTPC0_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5579 	mask |= 1U << ((mmTPC0_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5580 	mask |= 1U << ((mmTPC0_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5581 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5582 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5583 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5584 	mask |= 1U << ((mmTPC0_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5585 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5586 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5587 	mask |= 1U << ((mmTPC0_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5589 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5594 	mask = 1U << ((mmTPC0_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5596 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5600 	mask = 1U << ((mmTPC0_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5602 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5606 	mask = 1U << ((mmTPC0_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5607 	mask |= 1U << ((mmTPC0_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5608 	mask |= 1U << ((mmTPC0_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5609 	mask |= 1U << ((mmTPC0_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5610 	mask |= 1U << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5611 	mask |= 1U << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5612 	mask |= 1U << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5613 	mask |= 1U << ((mmTPC0_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5614 	mask |= 1U << ((mmTPC0_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5615 	mask |= 1U << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5616 	mask |= 1U << ((mmTPC0_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5617 	mask |= 1U << ((mmTPC0_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5618 	mask |= 1U << ((mmTPC0_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5619 	mask |= 1U << ((mmTPC0_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5620 	mask |= 1U << ((mmTPC0_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5621 	mask |= 1U << ((mmTPC0_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5622 	mask |= 1U << ((mmTPC0_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5623 	mask |= 1U << ((mmTPC0_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5625 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5630 	mask = 1U << ((mmTPC0_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5631 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5632 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5633 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5634 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5635 	mask |= 1U << ((mmTPC0_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5636 	mask |= 1U << ((mmTPC0_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5637 	mask |= 1U << ((mmTPC0_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5638 	mask |= 1U << ((mmTPC0_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5639 	mask |= 1U << ((mmTPC0_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5640 	mask |= 1U << ((mmTPC0_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5641 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5642 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5643 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5644 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5645 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5646 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5647 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5648 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5649 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5650 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5651 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5652 	mask |= 1U << ((mmTPC0_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5654 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5661 	mask = 1U << ((mmTPC1_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5662 	mask |= 1U << ((mmTPC1_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5663 	mask |= 1U << ((mmTPC1_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5664 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5665 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5666 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5667 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5668 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5669 	mask |= 1U << ((mmTPC1_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5670 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5671 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5672 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5673 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5674 	mask |= 1U << ((mmTPC1_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5675 	mask |= 1U << ((mmTPC1_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5676 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5677 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5678 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5679 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5680 	mask |= 1U << ((mmTPC1_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5681 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5682 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5683 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5684 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5685 	mask |= 1U << ((mmTPC1_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5686 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5687 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5688 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5689 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5691 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5695 	mask = 1U << ((mmTPC1_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5696 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5697 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5698 	mask |= 1U << ((mmTPC1_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5699 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5700 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5701 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5702 	mask |= 1U << ((mmTPC1_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5703 	mask |= 1U << ((mmTPC1_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5704 	mask |= 1U << ((mmTPC1_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5705 	mask |= 1U << ((mmTPC1_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5706 	mask |= 1U << ((mmTPC1_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5707 	mask |= 1U << ((mmTPC1_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5708 	mask |= 1U << ((mmTPC1_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5709 	mask |= 1U << ((mmTPC1_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5710 	mask |= 1U << ((mmTPC1_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5711 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5712 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5713 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5714 	mask |= 1U << ((mmTPC1_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5715 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5716 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5717 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5718 	mask |= 1U << ((mmTPC1_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5719 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5720 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5721 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5722 	mask |= 1U << ((mmTPC1_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5723 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5724 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5725 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5726 	mask |= 1U << ((mmTPC1_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5728 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5732 	mask = 1U << ((mmTPC1_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5733 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5734 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5735 	mask |= 1U << ((mmTPC1_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5736 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5737 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5738 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5739 	mask |= 1U << ((mmTPC1_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5740 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5741 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5742 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5743 	mask |= 1U << ((mmTPC1_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5744 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5745 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5746 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5748 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5752 	mask = 1U << ((mmTPC1_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5753 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5754 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5755 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5756 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5757 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5758 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5759 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5760 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5761 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5762 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5763 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5764 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5765 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5766 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5767 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5768 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5769 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5770 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5771 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5772 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5773 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5774 	mask |= 1U << ((mmTPC1_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5775 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5776 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5777 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5778 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5779 	mask |= 1U << ((mmTPC1_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5781 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5785 	mask = 1U << ((mmTPC1_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5786 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5787 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5788 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5789 	mask |= 1U << ((mmTPC1_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5790 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5791 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5792 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5793 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5794 	mask |= 1U << ((mmTPC1_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5795 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5796 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5797 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5798 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5799 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5800 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5801 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5802 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5803 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5804 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5805 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5806 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5807 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5808 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5809 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5810 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5811 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5812 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5813 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5814 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5815 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5816 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5818 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5823 	mask = 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5824 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5825 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5826 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5827 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5828 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5829 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5830 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5831 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5832 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5833 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5834 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5835 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5836 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5837 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5838 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5839 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5840 	mask |= 1U << ((mmTPC1_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5841 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5842 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5843 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5844 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5845 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5846 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5847 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5848 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5849 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5850 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5851 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5852 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5853 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5855 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5861 	mask = 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5862 	mask |= 1U << ((mmTPC1_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5864 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5868 	mask = 1U << ((mmTPC1_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5869 	mask |= 1U << ((mmTPC1_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5870 	mask |= 1U << ((mmTPC1_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5871 	mask |= 1U << ((mmTPC1_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5872 	mask |= 1U << ((mmTPC1_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5873 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5874 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5875 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5876 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5877 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5878 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5879 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5880 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5881 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5882 	mask |= 1U << ((mmTPC1_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5883 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5884 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5885 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5887 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5891 	mask = 1U << ((mmTPC1_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5892 	mask |= 1U << ((mmTPC1_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5893 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5894 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5896 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5900 	mask = 1U << ((mmTPC1_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5901 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5902 	mask |= 1U << ((mmTPC1_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5903 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5904 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5905 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5906 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5907 	mask |= 1U << ((mmTPC1_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5908 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5909 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5910 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5911 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5912 	mask |= 1U << ((mmTPC1_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5914 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5918 	mask = 1U << ((mmTPC1_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5919 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5920 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5921 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5922 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5923 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5924 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5925 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5926 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5927 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5928 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5929 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5930 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5931 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5932 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5933 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5934 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5935 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5936 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5937 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5938 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5939 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5940 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5941 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5942 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5944 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5949 	mask = 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5950 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5951 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5952 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5953 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5954 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5955 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5956 	mask |= 1U << ((mmTPC1_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5958 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5965 	mask = 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5966 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5967 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5968 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5969 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5971 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
5975 	mask = 1U << ((mmTPC1_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5976 	mask |= 1U << ((mmTPC1_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5977 	mask |= 1U << ((mmTPC1_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5978 	mask |= 1U << ((mmTPC1_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5979 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5980 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5981 	mask |= 1U << ((mmTPC1_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5982 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5983 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5984 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5985 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5986 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5987 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5988 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5989 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5990 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5991 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5992 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5993 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5994 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5995 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5996 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5997 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5998 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
5999 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6000 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6001 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6003 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6008 	mask = 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6009 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6010 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6011 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6012 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6013 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6014 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6015 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6016 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6017 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6018 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6019 	mask |= 1U << ((mmTPC1_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6020 	mask |= 1U << ((mmTPC1_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6021 	mask |= 1U << ((mmTPC1_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6022 	mask |= 1U << ((mmTPC1_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6024 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6028 	mask = 1U << ((mmTPC1_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6029 	mask |= 1U << ((mmTPC1_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6030 	mask |= 1U << ((mmTPC1_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6031 	mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6032 	mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6033 	mask |= 1U << ((mmTPC1_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6034 	mask |= 1U << ((mmTPC1_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6035 	mask |= 1U << ((mmTPC1_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6036 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6037 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6038 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6039 	mask |= 1U << ((mmTPC1_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6040 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6041 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6042 	mask |= 1U << ((mmTPC1_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6044 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6049 	mask = 1U << ((mmTPC1_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6051 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6055 	mask = 1U << ((mmTPC1_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6057 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6061 	mask = 1U << ((mmTPC1_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6062 	mask |= 1U << ((mmTPC1_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6063 	mask |= 1U << ((mmTPC1_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6064 	mask |= 1U << ((mmTPC1_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6065 	mask |= 1U << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6066 	mask |= 1U << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6067 	mask |= 1U << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6068 	mask |= 1U << ((mmTPC1_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6069 	mask |= 1U << ((mmTPC1_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6070 	mask |= 1U << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6071 	mask |= 1U << ((mmTPC1_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6072 	mask |= 1U << ((mmTPC1_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6073 	mask |= 1U << ((mmTPC1_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6074 	mask |= 1U << ((mmTPC1_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6075 	mask |= 1U << ((mmTPC1_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6076 	mask |= 1U << ((mmTPC1_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6077 	mask |= 1U << ((mmTPC1_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6078 	mask |= 1U << ((mmTPC1_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6080 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6085 	mask = 1U << ((mmTPC1_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6086 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6087 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6088 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6089 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6090 	mask |= 1U << ((mmTPC1_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6091 	mask |= 1U << ((mmTPC1_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6092 	mask |= 1U << ((mmTPC1_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6093 	mask |= 1U << ((mmTPC1_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6094 	mask |= 1U << ((mmTPC1_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6095 	mask |= 1U << ((mmTPC1_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6096 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6097 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6098 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6099 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6100 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6101 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6102 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6103 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6104 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6105 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6106 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6107 	mask |= 1U << ((mmTPC1_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6109 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6116 	mask = 1U << ((mmTPC2_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6117 	mask |= 1U << ((mmTPC2_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6118 	mask |= 1U << ((mmTPC2_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6119 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6120 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6121 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6122 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6123 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6124 	mask |= 1U << ((mmTPC2_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6125 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6126 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6127 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6128 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6129 	mask |= 1U << ((mmTPC2_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6130 	mask |= 1U << ((mmTPC2_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6131 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6132 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6133 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6134 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6135 	mask |= 1U << ((mmTPC2_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6136 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6137 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6138 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6139 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6140 	mask |= 1U << ((mmTPC2_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6141 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6142 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6143 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6144 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6146 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6150 	mask = 1U << ((mmTPC2_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6151 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6152 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6153 	mask |= 1U << ((mmTPC2_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6154 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6155 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6156 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6157 	mask |= 1U << ((mmTPC2_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6158 	mask |= 1U << ((mmTPC2_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6159 	mask |= 1U << ((mmTPC2_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6160 	mask |= 1U << ((mmTPC2_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6161 	mask |= 1U << ((mmTPC2_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6162 	mask |= 1U << ((mmTPC2_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6163 	mask |= 1U << ((mmTPC2_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6164 	mask |= 1U << ((mmTPC2_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6165 	mask |= 1U << ((mmTPC2_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6166 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6167 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6168 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6169 	mask |= 1U << ((mmTPC2_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6170 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6171 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6172 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6173 	mask |= 1U << ((mmTPC2_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6174 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6175 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6176 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6177 	mask |= 1U << ((mmTPC2_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6178 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6179 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6180 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6181 	mask |= 1U << ((mmTPC2_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6183 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6187 	mask = 1U << ((mmTPC2_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6188 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6189 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6190 	mask |= 1U << ((mmTPC2_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6191 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6192 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6193 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6194 	mask |= 1U << ((mmTPC2_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6195 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6196 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6197 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6198 	mask |= 1U << ((mmTPC2_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6199 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6200 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6201 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6203 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6207 	mask = 1U << ((mmTPC2_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6208 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6209 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6210 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6211 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6212 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6213 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6214 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6215 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6216 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6217 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6218 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6219 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6220 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6221 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6222 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6223 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6224 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6225 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6226 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6227 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6228 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6229 	mask |= 1U << ((mmTPC2_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6230 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6231 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6232 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6233 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6234 	mask |= 1U << ((mmTPC2_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6236 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6240 	mask = 1U << ((mmTPC2_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6241 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6242 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6243 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6244 	mask |= 1U << ((mmTPC2_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6245 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6246 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6247 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6248 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6249 	mask |= 1U << ((mmTPC2_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6250 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6251 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6252 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6253 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6254 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6255 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6256 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6257 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6258 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6259 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6260 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6261 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6262 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6263 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6264 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6265 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6266 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6267 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6268 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6269 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6270 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6271 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6273 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6278 	mask = 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6279 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6280 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6281 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6282 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6283 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6284 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6285 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6286 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6287 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6288 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6289 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6290 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6291 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6292 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6293 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6294 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6295 	mask |= 1U << ((mmTPC2_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6296 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6297 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6298 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6299 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6300 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6301 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6302 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6303 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6304 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6305 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6306 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6307 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6308 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6310 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6316 	mask = 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6317 	mask |= 1U << ((mmTPC2_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6319 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6323 	mask = 1U << ((mmTPC2_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6324 	mask |= 1U << ((mmTPC2_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6325 	mask |= 1U << ((mmTPC2_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6326 	mask |= 1U << ((mmTPC2_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6327 	mask |= 1U << ((mmTPC2_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6328 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6329 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6330 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6331 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6332 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6333 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6334 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6335 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6336 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6337 	mask |= 1U << ((mmTPC2_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6338 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6339 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6340 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6342 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6346 	mask = 1U << ((mmTPC2_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6347 	mask |= 1U << ((mmTPC2_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6348 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6349 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6351 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6355 	mask = 1U << ((mmTPC2_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6356 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6357 	mask |= 1U << ((mmTPC2_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6358 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6359 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6360 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6361 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6362 	mask |= 1U << ((mmTPC2_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6363 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6364 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6365 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6366 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6367 	mask |= 1U << ((mmTPC2_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6369 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6373 	mask = 1U << ((mmTPC2_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6374 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6375 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6376 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6377 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6378 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6379 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6380 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6381 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6382 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6383 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6384 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6385 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6386 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6387 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6388 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6389 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6390 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6391 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6392 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6393 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6394 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6395 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6396 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6397 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6399 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6404 	mask = 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6405 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6406 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6407 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6408 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6409 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6410 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6411 	mask |= 1U << ((mmTPC2_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6413 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6419 	mask = 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6420 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6421 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6422 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6423 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6425 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6429 	mask = 1U << ((mmTPC2_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6430 	mask |= 1U << ((mmTPC2_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6431 	mask |= 1U << ((mmTPC2_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6432 	mask |= 1U << ((mmTPC2_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6433 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6434 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6435 	mask |= 1U << ((mmTPC2_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6436 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6437 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6438 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6439 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6440 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6441 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6442 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6443 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6444 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6445 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6446 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6447 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6448 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6449 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6450 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6451 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6452 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6453 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6454 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6455 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6457 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6462 	mask = 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6463 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6464 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6465 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6466 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6467 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6468 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6469 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6470 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6471 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6472 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6473 	mask |= 1U << ((mmTPC2_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6474 	mask |= 1U << ((mmTPC2_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6475 	mask |= 1U << ((mmTPC2_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6476 	mask |= 1U << ((mmTPC2_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6478 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6482 	mask = 1U << ((mmTPC2_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6483 	mask |= 1U << ((mmTPC2_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6484 	mask |= 1U << ((mmTPC2_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6485 	mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6486 	mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6487 	mask |= 1U << ((mmTPC2_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6488 	mask |= 1U << ((mmTPC2_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6489 	mask |= 1U << ((mmTPC2_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6490 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6491 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6492 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6493 	mask |= 1U << ((mmTPC2_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6494 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6495 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6496 	mask |= 1U << ((mmTPC2_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6498 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6503 	mask = 1U << ((mmTPC2_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6505 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6509 	mask = 1U << ((mmTPC2_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6511 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6515 	mask = 1U << ((mmTPC2_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6516 	mask |= 1U << ((mmTPC2_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6517 	mask |= 1U << ((mmTPC2_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6518 	mask |= 1U << ((mmTPC2_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6519 	mask |= 1U << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6520 	mask |= 1U << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6521 	mask |= 1U << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6522 	mask |= 1U << ((mmTPC2_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6523 	mask |= 1U << ((mmTPC2_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6524 	mask |= 1U << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6525 	mask |= 1U << ((mmTPC2_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6526 	mask |= 1U << ((mmTPC2_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6527 	mask |= 1U << ((mmTPC2_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6528 	mask |= 1U << ((mmTPC2_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6529 	mask |= 1U << ((mmTPC2_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6530 	mask |= 1U << ((mmTPC2_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6531 	mask |= 1U << ((mmTPC2_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6532 	mask |= 1U << ((mmTPC2_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6534 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6539 	mask = 1U << ((mmTPC2_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6540 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6541 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6542 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6543 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6544 	mask |= 1U << ((mmTPC2_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6545 	mask |= 1U << ((mmTPC2_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6546 	mask |= 1U << ((mmTPC2_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6547 	mask |= 1U << ((mmTPC2_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6548 	mask |= 1U << ((mmTPC2_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6549 	mask |= 1U << ((mmTPC2_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6550 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6551 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6552 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6553 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6554 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6555 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6556 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6557 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6558 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6559 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6560 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6561 	mask |= 1U << ((mmTPC2_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6563 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6570 	mask = 1U << ((mmTPC3_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6571 	mask |= 1U << ((mmTPC3_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6572 	mask |= 1U << ((mmTPC3_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6573 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6574 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6575 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6576 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6577 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6578 	mask |= 1U << ((mmTPC3_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6579 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6580 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6581 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6582 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6583 	mask |= 1U << ((mmTPC3_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6584 	mask |= 1U << ((mmTPC3_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6585 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6586 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6587 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6588 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6589 	mask |= 1U << ((mmTPC3_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6590 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6591 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6592 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6593 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6594 	mask |= 1U << ((mmTPC3_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6595 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6596 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6597 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6598 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6600 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6604 	mask = 1U << ((mmTPC3_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6605 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6606 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6607 	mask |= 1U << ((mmTPC3_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6608 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6609 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6610 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6611 	mask |= 1U << ((mmTPC3_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6612 	mask |= 1U << ((mmTPC3_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6613 	mask |= 1U << ((mmTPC3_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6614 	mask |= 1U << ((mmTPC3_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6615 	mask |= 1U << ((mmTPC3_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6616 	mask |= 1U << ((mmTPC3_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6617 	mask |= 1U << ((mmTPC3_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6618 	mask |= 1U << ((mmTPC3_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6619 	mask |= 1U << ((mmTPC3_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6620 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6621 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6622 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6623 	mask |= 1U << ((mmTPC3_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6624 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6625 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6626 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6627 	mask |= 1U << ((mmTPC3_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6628 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6629 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6630 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6631 	mask |= 1U << ((mmTPC3_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6632 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6633 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6634 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6635 	mask |= 1U << ((mmTPC3_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6637 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6641 	mask = 1U << ((mmTPC3_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6642 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6643 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6644 	mask |= 1U << ((mmTPC3_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6645 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6646 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6647 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6648 	mask |= 1U << ((mmTPC3_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6649 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6650 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6651 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6652 	mask |= 1U << ((mmTPC3_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6653 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6654 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6655 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6657 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6661 	mask = 1U << ((mmTPC3_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6662 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6663 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6664 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6665 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6666 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6667 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6668 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6669 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6670 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6671 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6672 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6673 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6674 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6675 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6676 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6677 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6678 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6679 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6680 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6681 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6682 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6683 	mask |= 1U << ((mmTPC3_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6684 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6685 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6686 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6687 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6688 	mask |= 1U << ((mmTPC3_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6690 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6694 	mask = 1U << ((mmTPC3_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6695 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6696 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6697 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6698 	mask |= 1U << ((mmTPC3_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6699 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6700 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6701 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6702 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6703 	mask |= 1U << ((mmTPC3_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6704 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6705 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6706 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6707 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6708 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6709 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6710 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6711 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6712 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6713 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6714 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6715 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6716 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6717 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6718 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6719 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6720 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6721 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6722 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6723 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6724 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6725 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6727 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6732 	mask = 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6733 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6734 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6735 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6736 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6737 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6738 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6739 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6740 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6741 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6742 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6743 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6744 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6745 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6746 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6747 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6748 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6749 	mask |= 1U << ((mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6750 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6751 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6752 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6753 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6754 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6755 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6756 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6757 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6758 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6759 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6760 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6761 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6762 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6764 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6770 	mask = 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6771 	mask |= 1U << ((mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6773 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6777 	mask = 1U << ((mmTPC3_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6778 	mask |= 1U << ((mmTPC3_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6779 	mask |= 1U << ((mmTPC3_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6780 	mask |= 1U << ((mmTPC3_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6781 	mask |= 1U << ((mmTPC3_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6782 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6783 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6784 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6785 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6786 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6787 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6788 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6789 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6790 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6791 	mask |= 1U << ((mmTPC3_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6792 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6793 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6794 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6796 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6800 	mask = 1U << ((mmTPC3_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6801 	mask |= 1U << ((mmTPC3_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6802 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6803 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6805 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6809 	mask = 1U << ((mmTPC3_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6810 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6811 	mask |= 1U << ((mmTPC3_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6812 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6813 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6814 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6815 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6816 	mask |= 1U << ((mmTPC3_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6817 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6818 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6819 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6820 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6821 	mask |= 1U << ((mmTPC3_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6823 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6827 	mask = 1U << ((mmTPC3_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6828 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6829 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6830 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6831 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6832 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6833 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6834 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6835 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6836 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6837 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6838 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6839 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6840 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6841 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6842 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6843 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6844 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6845 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6846 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6847 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6848 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6849 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6850 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6851 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6853 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6858 	mask = 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6859 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6860 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6861 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6862 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6863 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6864 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6865 	mask |= 1U << ((mmTPC3_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6867 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6873 	mask = 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6874 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6875 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6876 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6877 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6879 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6883 	mask = 1U << ((mmTPC3_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6884 	mask |= 1U << ((mmTPC3_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6885 	mask |= 1U << ((mmTPC3_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6886 	mask |= 1U << ((mmTPC3_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6887 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6888 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6889 	mask |= 1U << ((mmTPC3_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6890 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6891 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6892 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6893 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6894 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6895 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6896 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6897 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6898 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6899 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6900 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6901 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6902 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6903 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6904 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6905 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6906 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6907 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6908 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6909 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6911 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6916 	mask = 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6917 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6918 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6919 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6920 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6921 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6922 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6923 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6924 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6925 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6926 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6927 	mask |= 1U << ((mmTPC3_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6928 	mask |= 1U << ((mmTPC3_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6929 	mask |= 1U << ((mmTPC3_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6930 	mask |= 1U << ((mmTPC3_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6932 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6936 	mask = 1U << ((mmTPC3_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6937 	mask |= 1U << ((mmTPC3_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6938 	mask |= 1U << ((mmTPC3_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6939 	mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6940 	mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6941 	mask |= 1U << ((mmTPC3_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6942 	mask |= 1U << ((mmTPC3_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6943 	mask |= 1U << ((mmTPC3_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6944 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6945 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6946 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6947 	mask |= 1U << ((mmTPC3_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6948 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6949 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6950 	mask |= 1U << ((mmTPC3_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6952 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6957 	mask = 1U << ((mmTPC3_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6959 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6963 	mask = 1U << ((mmTPC3_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6965 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6969 	mask = 1U << ((mmTPC3_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6970 	mask |= 1U << ((mmTPC3_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6971 	mask |= 1U << ((mmTPC3_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6972 	mask |= 1U << ((mmTPC3_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6973 	mask |= 1U << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6974 	mask |= 1U << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6975 	mask |= 1U << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6976 	mask |= 1U << ((mmTPC3_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6977 	mask |= 1U << ((mmTPC3_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6978 	mask |= 1U << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6979 	mask |= 1U << ((mmTPC3_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6980 	mask |= 1U << ((mmTPC3_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6981 	mask |= 1U << ((mmTPC3_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6982 	mask |= 1U << ((mmTPC3_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6983 	mask |= 1U << ((mmTPC3_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6984 	mask |= 1U << ((mmTPC3_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6985 	mask |= 1U << ((mmTPC3_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6986 	mask |= 1U << ((mmTPC3_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6988 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
6993 	mask = 1U << ((mmTPC3_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6994 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6995 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6996 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6997 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6998 	mask |= 1U << ((mmTPC3_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
6999 	mask |= 1U << ((mmTPC3_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7000 	mask |= 1U << ((mmTPC3_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7001 	mask |= 1U << ((mmTPC3_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7002 	mask |= 1U << ((mmTPC3_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7003 	mask |= 1U << ((mmTPC3_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7004 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7005 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7006 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7007 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7008 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7009 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7010 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7011 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7012 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7013 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7014 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7015 	mask |= 1U << ((mmTPC3_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7017 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7024 	mask = 1U << ((mmTPC4_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7025 	mask |= 1U << ((mmTPC4_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7026 	mask |= 1U << ((mmTPC4_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7027 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7028 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7029 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7030 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7031 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7032 	mask |= 1U << ((mmTPC4_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7033 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7034 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7035 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7036 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7037 	mask |= 1U << ((mmTPC4_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7038 	mask |= 1U << ((mmTPC4_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7039 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7040 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7041 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7042 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7043 	mask |= 1U << ((mmTPC4_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7044 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7045 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7046 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7047 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7048 	mask |= 1U << ((mmTPC4_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7049 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7050 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7051 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7052 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7054 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7058 	mask = 1U << ((mmTPC4_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7059 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7060 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7061 	mask |= 1U << ((mmTPC4_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7062 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7063 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7064 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7065 	mask |= 1U << ((mmTPC4_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7066 	mask |= 1U << ((mmTPC4_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7067 	mask |= 1U << ((mmTPC4_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7068 	mask |= 1U << ((mmTPC4_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7069 	mask |= 1U << ((mmTPC4_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7070 	mask |= 1U << ((mmTPC4_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7071 	mask |= 1U << ((mmTPC4_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7072 	mask |= 1U << ((mmTPC4_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7073 	mask |= 1U << ((mmTPC4_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7074 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7075 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7076 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7077 	mask |= 1U << ((mmTPC4_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7078 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7079 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7080 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7081 	mask |= 1U << ((mmTPC4_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7082 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7083 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7084 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7085 	mask |= 1U << ((mmTPC4_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7086 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7087 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7088 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7089 	mask |= 1U << ((mmTPC4_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7091 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7095 	mask = 1U << ((mmTPC4_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7096 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7097 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7098 	mask |= 1U << ((mmTPC4_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7099 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7100 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7101 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7102 	mask |= 1U << ((mmTPC4_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7103 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7104 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7105 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7106 	mask |= 1U << ((mmTPC4_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7107 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7108 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7109 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7111 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7115 	mask = 1U << ((mmTPC4_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7116 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7117 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7118 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7119 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7120 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7121 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7122 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7123 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7124 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7125 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7126 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7127 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7128 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7129 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7130 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7131 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7132 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7133 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7134 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7135 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7136 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7137 	mask |= 1U << ((mmTPC4_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7138 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7139 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7140 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7141 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7142 	mask |= 1U << ((mmTPC4_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7144 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7148 	mask = 1U << ((mmTPC4_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7149 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7150 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7151 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7152 	mask |= 1U << ((mmTPC4_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7153 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7154 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7155 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7156 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7157 	mask |= 1U << ((mmTPC4_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7158 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7159 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7160 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7161 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7162 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7163 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7164 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7165 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7166 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7167 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7168 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7169 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7170 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7171 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7172 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7173 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7174 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7175 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7176 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7177 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7178 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7179 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7181 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7186 	mask = 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7187 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7188 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7189 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7190 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7191 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7192 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7193 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7194 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7195 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7196 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7197 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7198 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7199 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7200 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7201 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7202 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7203 	mask |= 1U << ((mmTPC4_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7204 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7205 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7206 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7207 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7208 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7209 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7210 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7211 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7212 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7213 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7214 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7215 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7216 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7218 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7224 	mask = 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7225 	mask |= 1U << ((mmTPC4_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7227 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7231 	mask = 1U << ((mmTPC4_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7232 	mask |= 1U << ((mmTPC4_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7233 	mask |= 1U << ((mmTPC4_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7234 	mask |= 1U << ((mmTPC4_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7235 	mask |= 1U << ((mmTPC4_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7236 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7237 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7238 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7239 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7240 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7241 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7242 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7243 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7244 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7245 	mask |= 1U << ((mmTPC4_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7246 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7247 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7248 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7250 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7254 	mask = 1U << ((mmTPC4_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7255 	mask |= 1U << ((mmTPC4_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7256 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7257 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7259 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7263 	mask = 1U << ((mmTPC4_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7264 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7265 	mask |= 1U << ((mmTPC4_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7266 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7267 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7268 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7269 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7270 	mask |= 1U << ((mmTPC4_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7271 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7272 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7273 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7274 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7275 	mask |= 1U << ((mmTPC4_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7277 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7281 	mask = 1U << ((mmTPC4_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7282 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7283 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7284 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7285 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7286 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7287 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7288 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7289 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7290 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7291 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7292 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7293 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7294 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7295 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7296 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7297 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7298 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7299 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7300 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7301 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7302 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7303 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7304 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7305 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7307 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7312 	mask = 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7313 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7314 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7315 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7316 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7317 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7318 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7319 	mask |= 1U << ((mmTPC4_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7321 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7327 	mask = 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7328 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7329 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7330 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7331 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7333 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7337 	mask = 1U << ((mmTPC4_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7338 	mask |= 1U << ((mmTPC4_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7339 	mask |= 1U << ((mmTPC4_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7340 	mask |= 1U << ((mmTPC4_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7341 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7342 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7343 	mask |= 1U << ((mmTPC4_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7344 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7345 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7346 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7347 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7348 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7349 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7350 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7351 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7352 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7353 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7354 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7355 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7356 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7357 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7358 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7359 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7360 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7361 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7362 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7363 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7365 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7370 	mask = 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7371 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7372 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7373 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7374 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7375 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7376 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7377 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7378 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7379 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7380 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7381 	mask |= 1U << ((mmTPC4_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7382 	mask |= 1U << ((mmTPC4_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7383 	mask |= 1U << ((mmTPC4_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7384 	mask |= 1U << ((mmTPC4_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7386 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7390 	mask = 1U << ((mmTPC4_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7391 	mask |= 1U << ((mmTPC4_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7392 	mask |= 1U << ((mmTPC4_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7393 	mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7394 	mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7395 	mask |= 1U << ((mmTPC4_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7396 	mask |= 1U << ((mmTPC4_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7397 	mask |= 1U << ((mmTPC4_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7398 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7399 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7400 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7401 	mask |= 1U << ((mmTPC4_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7402 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7403 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7404 	mask |= 1U << ((mmTPC4_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7406 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7411 	mask = 1U << ((mmTPC4_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7413 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7417 	mask = 1U << ((mmTPC4_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7419 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7423 	mask = 1U << ((mmTPC4_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7424 	mask |= 1U << ((mmTPC4_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7425 	mask |= 1U << ((mmTPC4_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7426 	mask |= 1U << ((mmTPC4_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7427 	mask |= 1U << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7428 	mask |= 1U << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7429 	mask |= 1U << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7430 	mask |= 1U << ((mmTPC4_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7431 	mask |= 1U << ((mmTPC4_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7432 	mask |= 1U << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7433 	mask |= 1U << ((mmTPC4_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7434 	mask |= 1U << ((mmTPC4_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7435 	mask |= 1U << ((mmTPC4_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7436 	mask |= 1U << ((mmTPC4_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7437 	mask |= 1U << ((mmTPC4_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7438 	mask |= 1U << ((mmTPC4_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7439 	mask |= 1U << ((mmTPC4_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7440 	mask |= 1U << ((mmTPC4_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7442 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7447 	mask = 1U << ((mmTPC4_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7448 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7449 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7450 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7451 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7452 	mask |= 1U << ((mmTPC4_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7453 	mask |= 1U << ((mmTPC4_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7454 	mask |= 1U << ((mmTPC4_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7455 	mask |= 1U << ((mmTPC4_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7456 	mask |= 1U << ((mmTPC4_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7457 	mask |= 1U << ((mmTPC4_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7458 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7459 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7460 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7461 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7462 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7463 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7464 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7465 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7466 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7467 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7468 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7469 	mask |= 1U << ((mmTPC4_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7471 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7478 	mask = 1U << ((mmTPC5_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7479 	mask |= 1U << ((mmTPC5_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7480 	mask |= 1U << ((mmTPC5_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7481 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7482 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7483 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7484 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7485 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7486 	mask |= 1U << ((mmTPC5_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7487 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7488 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7489 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7490 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7491 	mask |= 1U << ((mmTPC5_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7492 	mask |= 1U << ((mmTPC5_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7493 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7494 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7495 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7496 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7497 	mask |= 1U << ((mmTPC5_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7498 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7499 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7500 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7501 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7502 	mask |= 1U << ((mmTPC5_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7503 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7504 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7505 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7506 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7508 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7512 	mask = 1U << ((mmTPC5_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7513 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7514 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7515 	mask |= 1U << ((mmTPC5_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7516 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7517 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7518 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7519 	mask |= 1U << ((mmTPC5_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7520 	mask |= 1U << ((mmTPC5_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7521 	mask |= 1U << ((mmTPC5_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7522 	mask |= 1U << ((mmTPC5_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7523 	mask |= 1U << ((mmTPC5_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7524 	mask |= 1U << ((mmTPC5_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7525 	mask |= 1U << ((mmTPC5_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7526 	mask |= 1U << ((mmTPC5_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7527 	mask |= 1U << ((mmTPC5_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7528 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7529 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7530 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7531 	mask |= 1U << ((mmTPC5_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7532 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7533 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7534 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7535 	mask |= 1U << ((mmTPC5_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7536 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7537 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7538 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7539 	mask |= 1U << ((mmTPC5_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7540 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7541 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7542 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7543 	mask |= 1U << ((mmTPC5_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7545 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7549 	mask = 1U << ((mmTPC5_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7550 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7551 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7552 	mask |= 1U << ((mmTPC5_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7553 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7554 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7555 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7556 	mask |= 1U << ((mmTPC5_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7557 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7558 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7559 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7560 	mask |= 1U << ((mmTPC5_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7561 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7562 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7563 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7565 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7569 	mask = 1U << ((mmTPC5_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7570 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7571 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7572 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7573 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7574 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7575 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7576 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7577 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7578 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7579 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7580 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7581 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7582 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7583 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7584 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7585 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7586 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7587 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7588 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7589 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7590 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7591 	mask |= 1U << ((mmTPC5_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7592 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7593 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7594 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7595 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7596 	mask |= 1U << ((mmTPC5_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7598 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7602 	mask = 1U << ((mmTPC5_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7603 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7604 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7605 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7606 	mask |= 1U << ((mmTPC5_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7607 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7608 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7609 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7610 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7611 	mask |= 1U << ((mmTPC5_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7612 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7613 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7614 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7615 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7616 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7617 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7618 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7619 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7620 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7621 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7622 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7623 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7624 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7625 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7626 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7627 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7628 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7629 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7630 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7631 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7632 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7633 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7635 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7640 	mask = 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7641 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7642 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7643 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7644 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7645 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7646 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7647 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7648 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7649 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7650 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7651 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7652 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7653 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7654 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7655 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7656 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7657 	mask |= 1U << ((mmTPC5_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7658 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7659 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7660 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7661 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7662 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7663 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7664 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7665 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7666 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7667 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7668 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7669 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7670 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7672 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7678 	mask = 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7679 	mask |= 1U << ((mmTPC5_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7681 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7685 	mask = 1U << ((mmTPC5_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7686 	mask |= 1U << ((mmTPC5_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7687 	mask |= 1U << ((mmTPC5_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7688 	mask |= 1U << ((mmTPC5_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7689 	mask |= 1U << ((mmTPC5_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7690 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7691 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7692 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7693 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7694 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7695 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7696 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7697 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7698 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7699 	mask |= 1U << ((mmTPC5_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7700 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7701 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7702 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7704 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7708 	mask = 1U << ((mmTPC5_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7709 	mask |= 1U << ((mmTPC5_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7710 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7711 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7713 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7717 	mask = 1U << ((mmTPC5_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7718 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7719 	mask |= 1U << ((mmTPC5_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7720 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7721 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7722 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7723 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7724 	mask |= 1U << ((mmTPC5_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7725 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7726 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7727 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7728 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7729 	mask |= 1U << ((mmTPC5_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7731 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7735 	mask = 1U << ((mmTPC5_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7736 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7737 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7738 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7739 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7740 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7741 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7742 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7743 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7744 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7745 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7746 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7747 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7748 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7749 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7750 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7751 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7752 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7753 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7754 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7755 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7756 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7757 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7758 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7759 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7761 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7766 	mask = 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7767 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7768 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7769 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7770 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7771 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7772 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7773 	mask |= 1U << ((mmTPC5_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7775 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7781 	mask = 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7782 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7783 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7784 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7785 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7787 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7791 	mask = 1U << ((mmTPC5_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7792 	mask |= 1U << ((mmTPC5_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7793 	mask |= 1U << ((mmTPC5_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7794 	mask |= 1U << ((mmTPC5_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7795 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7796 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7797 	mask |= 1U << ((mmTPC5_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7798 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7799 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7800 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7801 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7802 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7803 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7804 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7805 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7806 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7807 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7808 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7809 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7810 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7811 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7812 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7813 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7814 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7815 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7816 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7817 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7819 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7824 	mask = 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7825 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7826 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7827 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7828 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7829 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7830 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7831 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7832 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7833 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7834 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7835 	mask |= 1U << ((mmTPC5_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7836 	mask |= 1U << ((mmTPC5_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7837 	mask |= 1U << ((mmTPC5_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7838 	mask |= 1U << ((mmTPC5_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7840 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7844 	mask = 1U << ((mmTPC5_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7845 	mask |= 1U << ((mmTPC5_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7846 	mask |= 1U << ((mmTPC5_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7847 	mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7848 	mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7849 	mask |= 1U << ((mmTPC5_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7850 	mask |= 1U << ((mmTPC5_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7851 	mask |= 1U << ((mmTPC5_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7852 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7853 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7854 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7855 	mask |= 1U << ((mmTPC5_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7856 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7857 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7858 	mask |= 1U << ((mmTPC5_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7860 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7865 	mask = 1U << ((mmTPC5_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7867 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7871 	mask = 1U << ((mmTPC5_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7873 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7877 	mask = 1U << ((mmTPC5_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7878 	mask |= 1U << ((mmTPC5_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7879 	mask |= 1U << ((mmTPC5_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7880 	mask |= 1U << ((mmTPC5_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7881 	mask |= 1U << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7882 	mask |= 1U << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7883 	mask |= 1U << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7884 	mask |= 1U << ((mmTPC5_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7885 	mask |= 1U << ((mmTPC5_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7886 	mask |= 1U << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7887 	mask |= 1U << ((mmTPC5_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7888 	mask |= 1U << ((mmTPC5_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7889 	mask |= 1U << ((mmTPC5_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7890 	mask |= 1U << ((mmTPC5_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7891 	mask |= 1U << ((mmTPC5_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7892 	mask |= 1U << ((mmTPC5_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7893 	mask |= 1U << ((mmTPC5_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7894 	mask |= 1U << ((mmTPC5_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7896 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7901 	mask = 1U << ((mmTPC5_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7902 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7903 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7904 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7905 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7906 	mask |= 1U << ((mmTPC5_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7907 	mask |= 1U << ((mmTPC5_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7908 	mask |= 1U << ((mmTPC5_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7909 	mask |= 1U << ((mmTPC5_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7910 	mask |= 1U << ((mmTPC5_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7911 	mask |= 1U << ((mmTPC5_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7912 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7913 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7914 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7915 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7916 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7917 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7918 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7919 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7920 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7921 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7922 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7923 	mask |= 1U << ((mmTPC5_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7925 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7932 	mask = 1U << ((mmTPC6_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7933 	mask |= 1U << ((mmTPC6_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7934 	mask |= 1U << ((mmTPC6_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7935 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7936 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7937 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7938 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7939 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7940 	mask |= 1U << ((mmTPC6_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7941 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7942 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7943 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7944 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7945 	mask |= 1U << ((mmTPC6_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7946 	mask |= 1U << ((mmTPC6_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7947 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7948 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7949 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7950 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7951 	mask |= 1U << ((mmTPC6_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7952 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7953 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7954 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7955 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7956 	mask |= 1U << ((mmTPC6_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7957 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7958 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7959 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7960 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7962 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
7966 	mask = 1U << ((mmTPC6_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7967 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7968 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7969 	mask |= 1U << ((mmTPC6_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7970 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7971 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7972 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7973 	mask |= 1U << ((mmTPC6_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7974 	mask |= 1U << ((mmTPC6_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7975 	mask |= 1U << ((mmTPC6_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7976 	mask |= 1U << ((mmTPC6_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7977 	mask |= 1U << ((mmTPC6_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7978 	mask |= 1U << ((mmTPC6_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7979 	mask |= 1U << ((mmTPC6_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7980 	mask |= 1U << ((mmTPC6_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7981 	mask |= 1U << ((mmTPC6_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7982 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7983 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7984 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7985 	mask |= 1U << ((mmTPC6_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7986 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7987 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7988 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7989 	mask |= 1U << ((mmTPC6_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7990 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7991 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7992 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7993 	mask |= 1U << ((mmTPC6_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7994 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7995 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7996 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7997 	mask |= 1U << ((mmTPC6_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
7999 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8003 	mask = 1U << ((mmTPC6_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8004 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8005 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8006 	mask |= 1U << ((mmTPC6_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8007 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8008 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8009 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8010 	mask |= 1U << ((mmTPC6_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8011 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8012 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8013 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8014 	mask |= 1U << ((mmTPC6_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8015 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8016 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8017 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8019 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8023 	mask = 1U << ((mmTPC6_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8024 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8025 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8026 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8027 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8028 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8029 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8030 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8031 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8032 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8033 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8034 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8035 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8036 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8037 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8038 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8039 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8040 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8041 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8042 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8043 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8044 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8045 	mask |= 1U << ((mmTPC6_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8046 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8047 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8048 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8049 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8050 	mask |= 1U << ((mmTPC6_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8052 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8056 	mask = 1U << ((mmTPC6_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8057 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8058 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8059 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8060 	mask |= 1U << ((mmTPC6_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8061 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8062 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8063 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8064 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8065 	mask |= 1U << ((mmTPC6_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8066 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8067 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8068 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8069 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8070 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8071 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8072 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8073 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8074 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8075 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8076 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8077 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8078 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8079 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8080 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8081 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8082 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8083 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8084 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8085 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8086 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8087 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8089 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8094 	mask = 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8095 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8096 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8097 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8098 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8099 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8100 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8101 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8102 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8103 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8104 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8105 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8106 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8107 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8108 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8109 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8110 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8111 	mask |= 1U << ((mmTPC6_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8112 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8113 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8114 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8115 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8116 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8117 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8118 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8119 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8120 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8121 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8122 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8123 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8124 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8126 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8132 	mask = 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8133 	mask |= 1U << ((mmTPC6_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8135 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8139 	mask = 1U << ((mmTPC6_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8140 	mask |= 1U << ((mmTPC6_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8141 	mask |= 1U << ((mmTPC6_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8142 	mask |= 1U << ((mmTPC6_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8143 	mask |= 1U << ((mmTPC6_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8144 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8145 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8146 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8147 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8148 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8149 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8150 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8151 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8152 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8153 	mask |= 1U << ((mmTPC6_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8154 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8155 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8156 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8158 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8162 	mask = 1U << ((mmTPC6_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8163 	mask |= 1U << ((mmTPC6_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8164 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8165 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8167 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8171 	mask = 1U << ((mmTPC6_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8172 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8173 	mask |= 1U << ((mmTPC6_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8174 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8175 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8176 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8177 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8178 	mask |= 1U << ((mmTPC6_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8179 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8180 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8181 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8182 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8183 	mask |= 1U << ((mmTPC6_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8185 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8189 	mask = 1U << ((mmTPC6_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8190 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8191 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8192 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8193 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8194 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8195 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8196 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8197 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8198 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8199 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8200 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8201 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8202 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8203 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8204 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8205 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8206 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8207 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8208 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8209 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8210 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8211 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8212 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8213 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8215 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8220 	mask = 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8221 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8222 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8223 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8224 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8225 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8226 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8227 	mask |= 1U << ((mmTPC6_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8229 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8236 	mask = 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8237 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8238 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8239 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8240 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8242 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8246 	mask = 1U << ((mmTPC6_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8247 	mask |= 1U << ((mmTPC6_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8248 	mask |= 1U << ((mmTPC6_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8249 	mask |= 1U << ((mmTPC6_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8250 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8251 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8252 	mask |= 1U << ((mmTPC6_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8253 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8254 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8255 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8256 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8257 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8258 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8259 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8260 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8261 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8262 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8263 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8264 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8265 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8266 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8267 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8268 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8269 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8270 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8271 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8272 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8274 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8279 	mask = 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8280 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8281 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8282 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8283 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8284 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8285 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8286 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8287 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8288 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8289 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8290 	mask |= 1U << ((mmTPC6_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8291 	mask |= 1U << ((mmTPC6_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8292 	mask |= 1U << ((mmTPC6_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8293 	mask |= 1U << ((mmTPC6_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8295 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8299 	mask = 1U << ((mmTPC6_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8300 	mask |= 1U << ((mmTPC6_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8301 	mask |= 1U << ((mmTPC6_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8302 	mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8303 	mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8304 	mask |= 1U << ((mmTPC6_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8305 	mask |= 1U << ((mmTPC6_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8306 	mask |= 1U << ((mmTPC6_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8307 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8308 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8309 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8310 	mask |= 1U << ((mmTPC6_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8311 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8312 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8313 	mask |= 1U << ((mmTPC6_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8315 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8321 	mask = 1U << ((mmTPC6_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8323 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8327 	mask = 1U << ((mmTPC6_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8329 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8333 	mask = 1U << ((mmTPC6_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8334 	mask |= 1U << ((mmTPC6_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8335 	mask |= 1U << ((mmTPC6_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8336 	mask |= 1U << ((mmTPC6_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8337 	mask |= 1U << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8338 	mask |= 1U << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8339 	mask |= 1U << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8340 	mask |= 1U << ((mmTPC6_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8341 	mask |= 1U << ((mmTPC6_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8342 	mask |= 1U << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8343 	mask |= 1U << ((mmTPC6_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8344 	mask |= 1U << ((mmTPC6_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8345 	mask |= 1U << ((mmTPC6_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8346 	mask |= 1U << ((mmTPC6_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8347 	mask |= 1U << ((mmTPC6_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8348 	mask |= 1U << ((mmTPC6_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8349 	mask |= 1U << ((mmTPC6_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8350 	mask |= 1U << ((mmTPC6_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8352 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8357 	mask = 1U << ((mmTPC6_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8358 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8359 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8360 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8361 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8362 	mask |= 1U << ((mmTPC6_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8363 	mask |= 1U << ((mmTPC6_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8364 	mask |= 1U << ((mmTPC6_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8365 	mask |= 1U << ((mmTPC6_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8366 	mask |= 1U << ((mmTPC6_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8367 	mask |= 1U << ((mmTPC6_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8368 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8369 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8370 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8371 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8372 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8373 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8374 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8375 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8376 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8377 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8378 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8379 	mask |= 1U << ((mmTPC6_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8381 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8388 	mask = 1U << ((mmTPC7_QM_GLBL_CFG0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8389 	mask |= 1U << ((mmTPC7_QM_GLBL_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8390 	mask |= 1U << ((mmTPC7_QM_GLBL_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8391 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8392 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8393 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8394 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8395 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8396 	mask |= 1U << ((mmTPC7_QM_GLBL_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8397 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8398 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8399 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8400 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8401 	mask |= 1U << ((mmTPC7_QM_GLBL_NON_SECURE_PROPS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8402 	mask |= 1U << ((mmTPC7_QM_GLBL_STS0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8403 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8404 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8405 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8406 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8407 	mask |= 1U << ((mmTPC7_QM_GLBL_STS1_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8408 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8409 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8410 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8411 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8412 	mask |= 1U << ((mmTPC7_QM_GLBL_MSG_EN_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8413 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8414 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8415 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8416 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8418 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8422 	mask = 1U << ((mmTPC7_QM_PQ_BASE_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8423 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8424 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8425 	mask |= 1U << ((mmTPC7_QM_PQ_BASE_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8426 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8427 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8428 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8429 	mask |= 1U << ((mmTPC7_QM_PQ_SIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8430 	mask |= 1U << ((mmTPC7_QM_PQ_PI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8431 	mask |= 1U << ((mmTPC7_QM_PQ_PI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8432 	mask |= 1U << ((mmTPC7_QM_PQ_PI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8433 	mask |= 1U << ((mmTPC7_QM_PQ_PI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8434 	mask |= 1U << ((mmTPC7_QM_PQ_CI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8435 	mask |= 1U << ((mmTPC7_QM_PQ_CI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8436 	mask |= 1U << ((mmTPC7_QM_PQ_CI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8437 	mask |= 1U << ((mmTPC7_QM_PQ_CI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8438 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8439 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8440 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8441 	mask |= 1U << ((mmTPC7_QM_PQ_CFG0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8442 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8443 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8444 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8445 	mask |= 1U << ((mmTPC7_QM_PQ_CFG1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8446 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8447 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8448 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8449 	mask |= 1U << ((mmTPC7_QM_PQ_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8450 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8451 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8452 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8453 	mask |= 1U << ((mmTPC7_QM_PQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8455 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8459 	mask = 1U << ((mmTPC7_QM_PQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8460 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8461 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8462 	mask |= 1U << ((mmTPC7_QM_PQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8463 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8464 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8465 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8466 	mask |= 1U << ((mmTPC7_QM_CQ_STS0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8467 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8468 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8469 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8470 	mask |= 1U << ((mmTPC7_QM_CQ_STS1_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8471 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8472 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8473 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8475 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8479 	mask = 1U << ((mmTPC7_QM_CQ_CTL_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8480 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8481 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8482 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8483 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8484 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8485 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8486 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8487 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8488 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8489 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8490 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8491 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8492 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8493 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8494 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8495 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8496 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_LO_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8497 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8498 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8499 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8500 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8501 	mask |= 1U << ((mmTPC7_QM_CQ_PTR_HI_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8502 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8503 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8504 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8505 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8506 	mask |= 1U << ((mmTPC7_QM_CQ_TSIZE_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8508 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8512 	mask = 1U << ((mmTPC7_QM_CQ_CTL_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8513 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8514 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8515 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8516 	mask |= 1U << ((mmTPC7_QM_CQ_CTL_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8517 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8518 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8519 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8520 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8521 	mask |= 1U << ((mmTPC7_QM_CQ_IFIFO_CNT_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8522 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8523 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8524 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8525 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8526 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8527 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8528 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8529 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8530 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8531 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE0_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8532 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8533 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8534 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8535 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8536 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8537 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8538 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8539 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8540 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8541 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE1_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8542 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8543 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8545 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8550 	mask = 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8551 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8552 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8553 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8554 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8555 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8556 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8557 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE2_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8558 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8559 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8560 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8561 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8562 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8563 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8564 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8565 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8566 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8567 	mask |= 1U << ((mmTPC7_QM_CP_MSG_BASE3_ADDR_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8568 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8569 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8570 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8571 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8572 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_TSIZE_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8573 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8574 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8575 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8576 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8577 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8578 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8579 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8580 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8582 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8590 	mask = 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8591 	mask |= 1U << ((mmTPC7_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8593 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8597 	mask = 1U << ((mmTPC7_QM_CP_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8598 	mask |= 1U << ((mmTPC7_QM_CP_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8599 	mask |= 1U << ((mmTPC7_QM_CP_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8600 	mask |= 1U << ((mmTPC7_QM_CP_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8601 	mask |= 1U << ((mmTPC7_QM_CP_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8602 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8603 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8604 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8605 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8606 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_LO_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8607 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8608 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8609 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8610 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8611 	mask |= 1U << ((mmTPC7_QM_CP_CURRENT_INST_HI_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8612 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8613 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8614 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8616 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8620 	mask = 1U << ((mmTPC7_QM_CP_BARRIER_CFG_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8621 	mask |= 1U << ((mmTPC7_QM_CP_BARRIER_CFG_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8622 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8623 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8625 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8629 	mask = 1U << ((mmTPC7_QM_CP_DBG_0_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8630 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8631 	mask |= 1U << ((mmTPC7_QM_CP_DBG_0_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8632 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8633 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8634 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8635 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8636 	mask |= 1U << ((mmTPC7_QM_CP_ARUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8637 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8638 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8639 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8640 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8641 	mask |= 1U << ((mmTPC7_QM_CP_AWUSER_31_11_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8643 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8647 	mask = 1U << ((mmTPC7_QM_ARB_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8648 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8649 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8650 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8651 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8652 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8653 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8654 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8655 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8656 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8657 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8658 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8659 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8660 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8661 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8662 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8663 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8664 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8665 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8666 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8667 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8668 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8669 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8670 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8671 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8673 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8678 	mask = 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8679 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8680 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8681 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8682 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8683 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8684 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8685 	mask |= 1U << ((mmTPC7_QM_ARB_MST_AVAIL_CRED_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8687 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8693 	mask = 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_WDT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8694 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_MAX_INFLIGHT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8695 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_31_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8696 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8697 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_AWUSER_NON_SEC_PROP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8699 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8703 	mask = 1U << ((mmTPC7_QM_ARB_STATE_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8704 	mask |= 1U << ((mmTPC7_QM_ARB_CHOISE_FULLNESS_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8705 	mask |= 1U << ((mmTPC7_QM_ARB_MSG_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8706 	mask |= 1U << ((mmTPC7_QM_ARB_SLV_CHOISE_Q_HEAD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8707 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8708 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_MSG_EN & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8709 	mask |= 1U << ((mmTPC7_QM_ARB_ERR_STS_DRP & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8710 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8711 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8712 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8713 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8714 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8715 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8716 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8717 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8718 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8719 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8720 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_10 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8721 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_11 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8722 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_12 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8723 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_13 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8724 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_14 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8725 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_15 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8726 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_16 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8727 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_17 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8728 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_18 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8729 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_19 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8731 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8736 	mask = 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_20 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8737 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_21 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8738 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_22 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8739 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_23 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8740 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_24 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8741 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_25 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8742 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_26 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8743 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_27 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8744 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_28 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8745 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_29 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8746 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_30 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8747 	mask |= 1U << ((mmTPC7_QM_ARB_MST_CRED_STS_31 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8748 	mask |= 1U << ((mmTPC7_QM_CGM_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8749 	mask |= 1U << ((mmTPC7_QM_CGM_STS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8750 	mask |= 1U << ((mmTPC7_QM_CGM_CFG1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8752 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8756 	mask = 1U << ((mmTPC7_QM_LOCAL_RANGE_BASE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8757 	mask |= 1U << ((mmTPC7_QM_LOCAL_RANGE_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8758 	mask |= 1U << ((mmTPC7_QM_CSMR_STRICT_PRIO_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8759 	mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8760 	mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8761 	mask |= 1U << ((mmTPC7_QM_LBW_WR_RATE_LIM_CFG_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8762 	mask |= 1U << ((mmTPC7_QM_HBW_RD_RATE_LIM_CFG_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8763 	mask |= 1U << ((mmTPC7_QM_GLBL_AXCACHE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8764 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_CFG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8765 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8766 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_RDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8767 	mask |= 1U << ((mmTPC7_QM_IND_GW_APB_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8768 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8769 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_ADDR_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8770 	mask |= 1U << ((mmTPC7_QM_GLBL_ERR_WDATA & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8772 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8777 	mask = 1U << ((mmTPC7_QM_GLBL_MEM_INIT_BUSY & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8779 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8783 	mask = 1U << ((mmTPC7_CFG_ROUND_CSR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8785 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8789 	mask = 1U << ((mmTPC7_CFG_PROT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8790 	mask |= 1U << ((mmTPC7_CFG_VFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8791 	mask |= 1U << ((mmTPC7_CFG_SFLAGS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8792 	mask |= 1U << ((mmTPC7_CFG_STATUS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8793 	mask |= 1U << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8794 	mask |= 1U << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8795 	mask |= 1U << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8796 	mask |= 1U << ((mmTPC7_CFG_RD_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8797 	mask |= 1U << ((mmTPC7_CFG_WR_RATE_LIMIT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8798 	mask |= 1U << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8799 	mask |= 1U << ((mmTPC7_CFG_TPC_INTR_CAUSE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8800 	mask |= 1U << ((mmTPC7_CFG_TPC_INTR_MASK & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8801 	mask |= 1U << ((mmTPC7_CFG_WQ_CREDITS & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8802 	mask |= 1U << ((mmTPC7_CFG_ARUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8803 	mask |= 1U << ((mmTPC7_CFG_ARUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8804 	mask |= 1U << ((mmTPC7_CFG_AWUSER_LO & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8805 	mask |= 1U << ((mmTPC7_CFG_AWUSER_HI & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8806 	mask |= 1U << ((mmTPC7_CFG_OPCODE_EXEC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8808 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()
8813 	mask = 1U << ((mmTPC7_CFG_TSB_CFG_MAX_SIZE & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8814 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_ADD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8815 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_WR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8816 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_DATA_RD & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8817 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_CTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8818 	mask |= 1U << ((mmTPC7_CFG_DBGMEM_RC & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8819 	mask |= 1U << ((mmTPC7_CFG_TSB_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8820 	mask |= 1U << ((mmTPC7_CFG_WQ_INFLIGHT_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8821 	mask |= 1U << ((mmTPC7_CFG_WQ_LBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8822 	mask |= 1U << ((mmTPC7_CFG_WQ_HBW_TOTAL_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8823 	mask |= 1U << ((mmTPC7_CFG_IRQ_OCCOUPY_CNTR & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8824 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_CNTRL & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8825 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_PAT & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8826 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_0 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8827 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_1 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8828 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_2 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8829 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_3 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8830 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_4 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8831 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_5 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8832 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_6 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8833 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_7 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8834 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_8 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8835 	mask |= 1U << ((mmTPC7_CFG_FUNC_MBIST_MEM_9 & 0x7F) >> 2);  in gaudi_init_tpc_protection_bits()
8837 	WREG32(pb_addr + word_offset, ~mask);  in gaudi_init_tpc_protection_bits()