Lines Matching refs:ar
100 static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
101 static int ath10k_pci_cold_reset(struct ath10k *ar);
102 static int ath10k_pci_safe_chip_reset(struct ath10k *ar);
103 static int ath10k_pci_init_irq(struct ath10k *ar);
104 static int ath10k_pci_deinit_irq(struct ath10k *ar);
105 static int ath10k_pci_request_irq(struct ath10k *ar);
106 static void ath10k_pci_free_irq(struct ath10k *ar);
107 static int ath10k_pci_bmi_wait(struct ath10k *ar,
111 static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar);
429 static bool ath10k_pci_is_awake(struct ath10k *ar) in ath10k_pci_is_awake() argument
431 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_is_awake()
438 static void __ath10k_pci_wake(struct ath10k *ar) in __ath10k_pci_wake() argument
440 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in __ath10k_pci_wake()
444 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps wake reg refcount %lu awake %d\n", in __ath10k_pci_wake()
452 static void __ath10k_pci_sleep(struct ath10k *ar) in __ath10k_pci_sleep() argument
454 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in __ath10k_pci_sleep()
458 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps sleep reg refcount %lu awake %d\n", in __ath10k_pci_sleep()
467 static int ath10k_pci_wake_wait(struct ath10k *ar) in ath10k_pci_wake_wait() argument
473 if (ath10k_pci_is_awake(ar)) { in ath10k_pci_wake_wait()
475 …ath10k_warn(ar, "device wakeup took %d ms which is unusually long, otherwise it works normally.\n", in ath10k_pci_wake_wait()
490 static int ath10k_pci_force_wake(struct ath10k *ar) in ath10k_pci_force_wake() argument
492 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_force_wake()
506 ret = ath10k_pci_wake_wait(ar); in ath10k_pci_force_wake()
516 static void ath10k_pci_force_sleep(struct ath10k *ar) in ath10k_pci_force_sleep() argument
518 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_force_sleep()
531 static int ath10k_pci_wake(struct ath10k *ar) in ath10k_pci_wake() argument
533 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_wake()
542 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps wake refcount %lu awake %d\n", in ath10k_pci_wake()
549 __ath10k_pci_wake(ar); in ath10k_pci_wake()
551 ret = ath10k_pci_wake_wait(ar); in ath10k_pci_wake()
566 static void ath10k_pci_sleep(struct ath10k *ar) in ath10k_pci_sleep() argument
568 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_sleep()
576 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps sleep refcount %lu awake %d\n", in ath10k_pci_sleep()
594 struct ath10k *ar = ar_pci->ar; in ath10k_pci_ps_timer() local
599 ath10k_dbg(ar, ATH10K_DBG_PCI_PS, "pci ps timer refcount %lu awake %d\n", in ath10k_pci_ps_timer()
605 __ath10k_pci_sleep(ar); in ath10k_pci_ps_timer()
611 static void ath10k_pci_sleep_sync(struct ath10k *ar) in ath10k_pci_sleep_sync() argument
613 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_sleep_sync()
617 ath10k_pci_force_sleep(ar); in ath10k_pci_sleep_sync()
625 __ath10k_pci_sleep(ar); in ath10k_pci_sleep_sync()
629 static void ath10k_bus_pci_write32(struct ath10k *ar, u32 offset, u32 value) in ath10k_bus_pci_write32() argument
631 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_bus_pci_write32()
635 ath10k_warn(ar, "refusing to write mmio out of bounds at 0x%08x - 0x%08zx (max 0x%08zx)\n", in ath10k_bus_pci_write32()
640 ret = ath10k_pci_wake(ar); in ath10k_bus_pci_write32()
642 ath10k_warn(ar, "failed to wake target for write32 of 0x%08x at 0x%08x: %d\n", in ath10k_bus_pci_write32()
648 ath10k_pci_sleep(ar); in ath10k_bus_pci_write32()
651 static u32 ath10k_bus_pci_read32(struct ath10k *ar, u32 offset) in ath10k_bus_pci_read32() argument
653 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_bus_pci_read32()
658 ath10k_warn(ar, "refusing to read mmio out of bounds at 0x%08x - 0x%08zx (max 0x%08zx)\n", in ath10k_bus_pci_read32()
663 ret = ath10k_pci_wake(ar); in ath10k_bus_pci_read32()
665 ath10k_warn(ar, "failed to wake target for read32 at 0x%08x: %d\n", in ath10k_bus_pci_read32()
671 ath10k_pci_sleep(ar); in ath10k_bus_pci_read32()
676 inline void ath10k_pci_write32(struct ath10k *ar, u32 offset, u32 value) in ath10k_pci_write32() argument
678 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_write32()
680 ce->bus_ops->write32(ar, offset, value); in ath10k_pci_write32()
683 inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset) in ath10k_pci_read32() argument
685 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_read32()
687 return ce->bus_ops->read32(ar, offset); in ath10k_pci_read32()
690 u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr) in ath10k_pci_soc_read32() argument
692 return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr); in ath10k_pci_soc_read32()
695 void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val) in ath10k_pci_soc_write32() argument
697 ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val); in ath10k_pci_soc_write32()
700 u32 ath10k_pci_reg_read32(struct ath10k *ar, u32 addr) in ath10k_pci_reg_read32() argument
702 return ath10k_pci_read32(ar, PCIE_LOCAL_BASE_ADDRESS + addr); in ath10k_pci_reg_read32()
705 void ath10k_pci_reg_write32(struct ath10k *ar, u32 addr, u32 val) in ath10k_pci_reg_write32() argument
707 ath10k_pci_write32(ar, PCIE_LOCAL_BASE_ADDRESS + addr, val); in ath10k_pci_reg_write32()
710 bool ath10k_pci_irq_pending(struct ath10k *ar) in ath10k_pci_irq_pending() argument
715 cause = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_pending()
723 void ath10k_pci_disable_and_clear_legacy_irq(struct ath10k *ar) in ath10k_pci_disable_and_clear_legacy_irq() argument
729 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_disable_and_clear_legacy_irq()
731 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_CLR_ADDRESS, in ath10k_pci_disable_and_clear_legacy_irq()
737 (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_disable_and_clear_legacy_irq()
741 void ath10k_pci_enable_legacy_irq(struct ath10k *ar) in ath10k_pci_enable_legacy_irq() argument
743 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_enable_legacy_irq()
750 (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_enable_legacy_irq()
754 static inline const char *ath10k_pci_get_irq_method(struct ath10k *ar) in ath10k_pci_get_irq_method() argument
756 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_get_irq_method()
766 struct ath10k *ar = pipe->hif_ce_state; in __ath10k_pci_rx_post_buf() local
767 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_pci_rx_post_buf()
779 paddr = dma_map_single(ar->dev, skb->data, in __ath10k_pci_rx_post_buf()
782 if (unlikely(dma_mapping_error(ar->dev, paddr))) { in __ath10k_pci_rx_post_buf()
783 ath10k_warn(ar, "failed to dma map pci rx buf\n"); in __ath10k_pci_rx_post_buf()
794 dma_unmap_single(ar->dev, paddr, skb->len + skb_tailroom(skb), in __ath10k_pci_rx_post_buf()
805 struct ath10k *ar = pipe->hif_ce_state; in ath10k_pci_rx_post_pipe() local
806 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_rx_post_pipe()
807 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_rx_post_pipe()
826 ath10k_warn(ar, "failed to post pci rx buf: %d\n", ret); in ath10k_pci_rx_post_pipe()
835 void ath10k_pci_rx_post(struct ath10k *ar) in ath10k_pci_rx_post() argument
837 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_rx_post()
847 struct ath10k *ar = ar_pci->ar; in ath10k_pci_rx_replenish_retry() local
849 ath10k_pci_rx_post(ar); in ath10k_pci_rx_replenish_retry()
852 static u32 ath10k_pci_qca988x_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) in ath10k_pci_qca988x_targ_cpu_to_ce_addr() argument
856 val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + CORE_CTRL_ADDRESS) in ath10k_pci_qca988x_targ_cpu_to_ce_addr()
867 static u32 ath10k_pci_qca6174_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) in ath10k_pci_qca6174_targ_cpu_to_ce_addr() argument
871 val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + CORE_CTRL_ADDRESS) in ath10k_pci_qca6174_targ_cpu_to_ce_addr()
877 static u32 ath10k_pci_qca99x0_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) in ath10k_pci_qca99x0_targ_cpu_to_ce_addr() argument
881 val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS); in ath10k_pci_qca99x0_targ_cpu_to_ce_addr()
886 static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr) in ath10k_pci_targ_cpu_to_ce_addr() argument
888 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_targ_cpu_to_ce_addr()
893 return ar_pci->targ_cpu_to_ce_addr(ar, addr); in ath10k_pci_targ_cpu_to_ce_addr()
901 static int ath10k_pci_diag_read_mem(struct ath10k *ar, u32 address, void *data, in ath10k_pci_diag_read_mem() argument
904 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_diag_read_mem()
926 data_buf = dma_alloc_coherent(ar->dev, alloc_nbytes, &ce_data_base, in ath10k_pci_diag_read_mem()
940 address = ath10k_pci_targ_cpu_to_ce_addr(ar, address); in ath10k_pci_diag_read_mem()
1000 dma_free_coherent(ar->dev, alloc_nbytes, data_buf, in ath10k_pci_diag_read_mem()
1008 static int ath10k_pci_diag_read32(struct ath10k *ar, u32 address, u32 *value) in ath10k_pci_diag_read32() argument
1013 ret = ath10k_pci_diag_read_mem(ar, address, &val, sizeof(val)); in ath10k_pci_diag_read32()
1019 static int __ath10k_pci_diag_read_hi(struct ath10k *ar, void *dest, in __ath10k_pci_diag_read_hi() argument
1027 ret = ath10k_pci_diag_read32(ar, host_addr, &addr); in __ath10k_pci_diag_read_hi()
1029 ath10k_warn(ar, "failed to get memcpy hi address for firmware address %d: %d\n", in __ath10k_pci_diag_read_hi()
1034 ret = ath10k_pci_diag_read_mem(ar, addr, dest, len); in __ath10k_pci_diag_read_hi()
1036 ath10k_warn(ar, "failed to memcpy firmware memory from %d (%d B): %d\n", in __ath10k_pci_diag_read_hi()
1044 #define ath10k_pci_diag_read_hi(ar, dest, src, len) \ argument
1045 __ath10k_pci_diag_read_hi(ar, dest, HI_ITEM(src), len)
1047 int ath10k_pci_diag_write_mem(struct ath10k *ar, u32 address, in ath10k_pci_diag_write_mem() argument
1050 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_diag_write_mem()
1070 data_buf = dma_alloc_coherent(ar->dev, alloc_nbytes, &ce_data_base, in ath10k_pci_diag_write_mem()
1087 address = ath10k_pci_targ_cpu_to_ce_addr(ar, address); in ath10k_pci_diag_write_mem()
1150 dma_free_coherent(ar->dev, alloc_nbytes, data_buf, in ath10k_pci_diag_write_mem()
1155 ath10k_warn(ar, "failed to write diag value at 0x%x: %d\n", in ath10k_pci_diag_write_mem()
1163 static int ath10k_pci_diag_write32(struct ath10k *ar, u32 address, u32 value) in ath10k_pci_diag_write32() argument
1167 return ath10k_pci_diag_write_mem(ar, address, &val, sizeof(val)); in ath10k_pci_diag_write32()
1173 struct ath10k *ar = ce_state->ar; in ath10k_pci_htc_tx_cb() local
1187 ath10k_htc_tx_completion_handler(ar, skb); in ath10k_pci_htc_tx_cb()
1191 void (*callback)(struct ath10k *ar, in ath10k_pci_process_rx_cb() argument
1194 struct ath10k *ar = ce_state->ar; in ath10k_pci_process_rx_cb() local
1195 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_process_rx_cb()
1207 dma_unmap_single(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_process_rx_cb()
1211 ath10k_warn(ar, "rxed more than expected (nbytes %d, max %d)", in ath10k_pci_process_rx_cb()
1222 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci rx ce pipe %d len %d\n", in ath10k_pci_process_rx_cb()
1224 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci rx: ", in ath10k_pci_process_rx_cb()
1227 callback(ar, skb); in ath10k_pci_process_rx_cb()
1234 void (*callback)(struct ath10k *ar, in ath10k_pci_process_htt_rx_cb() argument
1237 struct ath10k *ar = ce_state->ar; in ath10k_pci_process_htt_rx_cb() local
1238 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_process_htt_rx_cb()
1258 ath10k_warn(ar, "rxed more than expected (nbytes %d, max %d)", in ath10k_pci_process_htt_rx_cb()
1263 dma_sync_single_for_cpu(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_process_htt_rx_cb()
1271 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci rx ce pipe %d len %d\n", in ath10k_pci_process_htt_rx_cb()
1273 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci rx: ", in ath10k_pci_process_htt_rx_cb()
1277 callback(ar, skb); in ath10k_pci_process_htt_rx_cb()
1283 dma_sync_single_for_device(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_process_htt_rx_cb()
1301 ath10k_ce_per_engine_service(ce_state->ar, 4); in ath10k_pci_htt_htc_rx_cb()
1318 struct ath10k *ar = ce_state->ar; in ath10k_pci_htt_tx_cb() local
1326 dma_unmap_single(ar->dev, ATH10K_SKB_CB(skb)->paddr, in ath10k_pci_htt_tx_cb()
1328 ath10k_htt_hif_tx_complete(ar, skb); in ath10k_pci_htt_tx_cb()
1332 static void ath10k_pci_htt_rx_deliver(struct ath10k *ar, struct sk_buff *skb) in ath10k_pci_htt_rx_deliver() argument
1335 ath10k_htt_t2h_msg_handler(ar, skb); in ath10k_pci_htt_rx_deliver()
1344 ath10k_ce_per_engine_service(ce_state->ar, 4); in ath10k_pci_htt_rx_cb()
1349 int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id, in ath10k_pci_hif_tx_sg() argument
1352 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_tx_sg()
1353 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_hif_tx_sg()
1375 ath10k_dbg(ar, ATH10K_DBG_PCI, in ath10k_pci_hif_tx_sg()
1378 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ", in ath10k_pci_hif_tx_sg()
1393 ath10k_dbg(ar, ATH10K_DBG_PCI, in ath10k_pci_hif_tx_sg()
1396 ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ", in ath10k_pci_hif_tx_sg()
1419 int ath10k_pci_hif_diag_read(struct ath10k *ar, u32 address, void *buf, in ath10k_pci_hif_diag_read() argument
1422 return ath10k_pci_diag_read_mem(ar, address, buf, buf_len); in ath10k_pci_hif_diag_read()
1425 u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe) in ath10k_pci_hif_get_free_queue_number() argument
1427 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_get_free_queue_number()
1429 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get free queue number\n"); in ath10k_pci_hif_get_free_queue_number()
1434 static void ath10k_pci_dump_registers(struct ath10k *ar, in ath10k_pci_dump_registers() argument
1440 lockdep_assert_held(&ar->dump_mutex); in ath10k_pci_dump_registers()
1442 ret = ath10k_pci_diag_read_hi(ar, ®_dump_values[0], in ath10k_pci_dump_registers()
1446 ath10k_err(ar, "failed to read firmware dump area: %d\n", ret); in ath10k_pci_dump_registers()
1452 ath10k_err(ar, "firmware register dump:\n"); in ath10k_pci_dump_registers()
1454 ath10k_err(ar, "[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X\n", in ath10k_pci_dump_registers()
1468 static int ath10k_pci_dump_memory_section(struct ath10k *ar, in ath10k_pci_dump_memory_section() argument
1482 ath10k_warn(ar, "incorrect memdump region 0x%x with section start address 0x%x.\n", in ath10k_pci_dump_memory_section()
1503 ath10k_warn(ar, "incorrect ramdump format with start address 0x%x and stop address 0x%x\n", in ath10k_pci_dump_memory_section()
1517 ath10k_warn(ar, "next ramdump section 0x%x is smaller than current end address 0x%x\n", in ath10k_pci_dump_memory_section()
1527 ath10k_warn(ar, "ramdump buffer is too small: %zu\n", buf_len); in ath10k_pci_dump_memory_section()
1534 ret = ath10k_pci_diag_read_mem(ar, cur_section->start, in ath10k_pci_dump_memory_section()
1537 ath10k_warn(ar, "failed to read ramdump from section 0x%x: %d\n", in ath10k_pci_dump_memory_section()
1563 static int ath10k_pci_set_ram_config(struct ath10k *ar, u32 config) in ath10k_pci_set_ram_config() argument
1567 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_set_ram_config()
1570 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_set_ram_config()
1573 ath10k_warn(ar, "failed to set RAM config from 0x%x to 0x%x\n", in ath10k_pci_set_ram_config()
1582 static int ath10k_pci_dump_memory_sram(struct ath10k *ar, in ath10k_pci_dump_memory_sram() argument
1586 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_dump_memory_sram()
1601 static int ath10k_pci_dump_memory_reg(struct ath10k *ar, in ath10k_pci_dump_memory_reg() argument
1605 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_dump_memory_reg()
1609 mutex_lock(&ar->conf_mutex); in ath10k_pci_dump_memory_reg()
1610 if (ar->state != ATH10K_STATE_ON) { in ath10k_pci_dump_memory_reg()
1611 ath10k_warn(ar, "Skipping pci_dump_memory_reg invalid state\n"); in ath10k_pci_dump_memory_reg()
1621 mutex_unlock(&ar->conf_mutex); in ath10k_pci_dump_memory_reg()
1626 static int ath10k_pci_dump_memory_generic(struct ath10k *ar, in ath10k_pci_dump_memory_generic() argument
1634 return ath10k_pci_dump_memory_section(ar, in ath10k_pci_dump_memory_generic()
1642 ret = ath10k_pci_diag_read_mem(ar, in ath10k_pci_dump_memory_generic()
1647 ath10k_warn(ar, "failed to copy ramdump region %s: %d\n", in ath10k_pci_dump_memory_generic()
1655 static void ath10k_pci_dump_memory(struct ath10k *ar, in ath10k_pci_dump_memory() argument
1666 lockdep_assert_held(&ar->dump_mutex); in ath10k_pci_dump_memory()
1671 mem_layout = ath10k_coredump_get_mem_layout(ar); in ath10k_pci_dump_memory()
1686 ath10k_warn(ar, "memory region %s size %d is larger that remaining ramdump buffer size %zu\n", in ath10k_pci_dump_memory()
1700 ret = ath10k_pci_set_ram_config(ar, shift); in ath10k_pci_dump_memory()
1702 ath10k_warn(ar, "failed to switch ram config to IRAM for section %s: %d\n", in ath10k_pci_dump_memory()
1715 count = ath10k_pci_dump_memory_sram(ar, current_region, buf); in ath10k_pci_dump_memory()
1718 ret = ath10k_pci_dump_memory_reg(ar, current_region, buf); in ath10k_pci_dump_memory()
1725 ret = ath10k_pci_dump_memory_generic(ar, current_region, buf); in ath10k_pci_dump_memory()
1753 struct ath10k *ar = ar_pci->ar; in ath10k_pci_fw_dump_work() local
1756 mutex_lock(&ar->dump_mutex); in ath10k_pci_fw_dump_work()
1758 spin_lock_bh(&ar->data_lock); in ath10k_pci_fw_dump_work()
1759 ar->stats.fw_crash_counter++; in ath10k_pci_fw_dump_work()
1760 spin_unlock_bh(&ar->data_lock); in ath10k_pci_fw_dump_work()
1762 crash_data = ath10k_coredump_new(ar); in ath10k_pci_fw_dump_work()
1769 ath10k_err(ar, "firmware crashed! (guid %s)\n", guid); in ath10k_pci_fw_dump_work()
1770 ath10k_print_driver_info(ar); in ath10k_pci_fw_dump_work()
1771 ath10k_pci_dump_registers(ar, crash_data); in ath10k_pci_fw_dump_work()
1772 ath10k_ce_dump_registers(ar, crash_data); in ath10k_pci_fw_dump_work()
1773 ath10k_pci_dump_memory(ar, crash_data); in ath10k_pci_fw_dump_work()
1775 mutex_unlock(&ar->dump_mutex); in ath10k_pci_fw_dump_work()
1777 queue_work(ar->workqueue, &ar->restart_work); in ath10k_pci_fw_dump_work()
1780 static void ath10k_pci_fw_crashed_dump(struct ath10k *ar) in ath10k_pci_fw_crashed_dump() argument
1782 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_fw_crashed_dump()
1784 queue_work(ar->workqueue, &ar_pci->dump_work); in ath10k_pci_fw_crashed_dump()
1787 void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe, in ath10k_pci_hif_send_complete_check() argument
1790 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_send_complete_check()
1792 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif send complete check\n"); in ath10k_pci_hif_send_complete_check()
1803 resources = ath10k_pci_hif_get_free_queue_number(ar, pipe); in ath10k_pci_hif_send_complete_check()
1812 ath10k_ce_per_engine_service(ar, pipe); in ath10k_pci_hif_send_complete_check()
1815 static void ath10k_pci_rx_retry_sync(struct ath10k *ar) in ath10k_pci_rx_retry_sync() argument
1817 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_rx_retry_sync()
1822 int ath10k_pci_hif_map_service_to_pipe(struct ath10k *ar, u16 service_id, in ath10k_pci_hif_map_service_to_pipe() argument
1825 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_map_service_to_pipe()
1830 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif map service\n"); in ath10k_pci_hif_map_service_to_pipe()
1868 void ath10k_pci_hif_get_default_pipe(struct ath10k *ar, in ath10k_pci_hif_get_default_pipe() argument
1871 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get default pipe\n"); in ath10k_pci_hif_get_default_pipe()
1873 (void)ath10k_pci_hif_map_service_to_pipe(ar, in ath10k_pci_hif_get_default_pipe()
1878 void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar) in ath10k_pci_irq_msi_fw_mask() argument
1882 switch (ar->hw_rev) { in ath10k_pci_irq_msi_fw_mask()
1887 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_mask()
1890 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_mask()
1906 static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar) in ath10k_pci_irq_msi_fw_unmask() argument
1910 switch (ar->hw_rev) { in ath10k_pci_irq_msi_fw_unmask()
1915 val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_unmask()
1918 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + in ath10k_pci_irq_msi_fw_unmask()
1934 static void ath10k_pci_irq_disable(struct ath10k *ar) in ath10k_pci_irq_disable() argument
1936 ath10k_ce_disable_interrupts(ar); in ath10k_pci_irq_disable()
1937 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_irq_disable()
1938 ath10k_pci_irq_msi_fw_mask(ar); in ath10k_pci_irq_disable()
1941 static void ath10k_pci_irq_sync(struct ath10k *ar) in ath10k_pci_irq_sync() argument
1943 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_irq_sync()
1948 static void ath10k_pci_irq_enable(struct ath10k *ar) in ath10k_pci_irq_enable() argument
1950 ath10k_ce_enable_interrupts(ar); in ath10k_pci_irq_enable()
1951 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_irq_enable()
1952 ath10k_pci_irq_msi_fw_unmask(ar); in ath10k_pci_irq_enable()
1955 static int ath10k_pci_hif_start(struct ath10k *ar) in ath10k_pci_hif_start() argument
1957 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_start()
1959 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif start\n"); in ath10k_pci_hif_start()
1961 napi_enable(&ar->napi); in ath10k_pci_hif_start()
1963 ath10k_pci_irq_enable(ar); in ath10k_pci_hif_start()
1964 ath10k_pci_rx_post(ar); in ath10k_pci_hif_start()
1974 struct ath10k *ar; in ath10k_pci_rx_pipe_cleanup() local
1980 ar = pci_pipe->hif_ce_state; in ath10k_pci_rx_pipe_cleanup()
1997 dma_unmap_single(ar->dev, ATH10K_SKB_RXCB(skb)->paddr, in ath10k_pci_rx_pipe_cleanup()
2006 struct ath10k *ar; in ath10k_pci_tx_pipe_cleanup() local
2012 ar = pci_pipe->hif_ce_state; in ath10k_pci_tx_pipe_cleanup()
2029 ath10k_htc_tx_completion_handler(ar, skb); in ath10k_pci_tx_pipe_cleanup()
2041 static void ath10k_pci_buffer_cleanup(struct ath10k *ar) in ath10k_pci_buffer_cleanup() argument
2043 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_buffer_cleanup()
2055 void ath10k_pci_ce_deinit(struct ath10k *ar) in ath10k_pci_ce_deinit() argument
2060 ath10k_ce_deinit_pipe(ar, i); in ath10k_pci_ce_deinit()
2063 void ath10k_pci_flush(struct ath10k *ar) in ath10k_pci_flush() argument
2065 ath10k_pci_rx_retry_sync(ar); in ath10k_pci_flush()
2066 ath10k_pci_buffer_cleanup(ar); in ath10k_pci_flush()
2069 static void ath10k_pci_hif_stop(struct ath10k *ar) in ath10k_pci_hif_stop() argument
2071 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_stop()
2074 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif stop\n"); in ath10k_pci_hif_stop()
2076 ath10k_pci_irq_disable(ar); in ath10k_pci_hif_stop()
2077 ath10k_pci_irq_sync(ar); in ath10k_pci_hif_stop()
2078 napi_synchronize(&ar->napi); in ath10k_pci_hif_stop()
2079 napi_disable(&ar->napi); in ath10k_pci_hif_stop()
2093 ath10k_pci_safe_chip_reset(ar); in ath10k_pci_hif_stop()
2095 ath10k_pci_flush(ar); in ath10k_pci_hif_stop()
2102 int ath10k_pci_hif_exchange_bmi_msg(struct ath10k *ar, in ath10k_pci_hif_exchange_bmi_msg() argument
2106 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_exchange_bmi_msg()
2129 req_paddr = dma_map_single(ar->dev, treq, req_len, DMA_TO_DEVICE); in ath10k_pci_hif_exchange_bmi_msg()
2130 ret = dma_mapping_error(ar->dev, req_paddr); in ath10k_pci_hif_exchange_bmi_msg()
2143 resp_paddr = dma_map_single(ar->dev, tresp, *resp_len, in ath10k_pci_hif_exchange_bmi_msg()
2145 ret = dma_mapping_error(ar->dev, resp_paddr); in ath10k_pci_hif_exchange_bmi_msg()
2161 ret = ath10k_pci_bmi_wait(ar, ce_tx, ce_rx, &xfer); in ath10k_pci_hif_exchange_bmi_msg()
2179 dma_unmap_single(ar->dev, resp_paddr, in ath10k_pci_hif_exchange_bmi_msg()
2183 dma_unmap_single(ar->dev, req_paddr, req_len, DMA_TO_DEVICE); in ath10k_pci_hif_exchange_bmi_msg()
2208 struct ath10k *ar = ce_state->ar; in ath10k_pci_bmi_recv_data() local
2220 ath10k_warn(ar, "unexpected: BMI data received; ignoring\n"); in ath10k_pci_bmi_recv_data()
2228 static int ath10k_pci_bmi_wait(struct ath10k *ar, in ath10k_pci_bmi_wait() argument
2255 ath10k_dbg(ar, ATH10K_DBG_BMI, in ath10k_pci_bmi_wait()
2265 static int ath10k_pci_wake_target_cpu(struct ath10k *ar) in ath10k_pci_wake_target_cpu() argument
2270 val = ath10k_pci_read32(ar, addr); in ath10k_pci_wake_target_cpu()
2272 ath10k_pci_write32(ar, addr, val); in ath10k_pci_wake_target_cpu()
2277 static int ath10k_pci_get_num_banks(struct ath10k *ar) in ath10k_pci_get_num_banks() argument
2279 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_get_num_banks()
2291 switch (MS(ar->bus_param.chip_id, SOC_CHIP_ID_REV)) { in ath10k_pci_get_num_banks()
2309 ath10k_warn(ar, "unknown number of banks, assuming 1\n"); in ath10k_pci_get_num_banks()
2313 static int ath10k_bus_get_num_banks(struct ath10k *ar) in ath10k_bus_get_num_banks() argument
2315 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_bus_get_num_banks()
2317 return ce->bus_ops->get_num_banks(ar); in ath10k_bus_get_num_banks()
2320 int ath10k_pci_init_config(struct ath10k *ar) in ath10k_pci_init_config() argument
2322 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_init_config()
2339 ret = ath10k_pci_diag_read32(ar, interconnect_targ_addr, in ath10k_pci_init_config()
2342 ath10k_err(ar, "Failed to get pcie state addr: %d\n", ret); in ath10k_pci_init_config()
2348 ath10k_err(ar, "Invalid pcie state addr\n"); in ath10k_pci_init_config()
2352 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
2357 ath10k_err(ar, "Failed to get pipe cfg addr: %d\n", ret); in ath10k_pci_init_config()
2363 ath10k_err(ar, "Invalid pipe cfg addr\n"); in ath10k_pci_init_config()
2367 ret = ath10k_pci_diag_write_mem(ar, pipe_cfg_targ_addr, in ath10k_pci_init_config()
2373 ath10k_err(ar, "Failed to write pipe cfg: %d\n", ret); in ath10k_pci_init_config()
2377 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
2382 ath10k_err(ar, "Failed to get svc/pipe map: %d\n", ret); in ath10k_pci_init_config()
2388 ath10k_err(ar, "Invalid svc_to_pipe map\n"); in ath10k_pci_init_config()
2392 ret = ath10k_pci_diag_write_mem(ar, svc_to_pipe_map, in ath10k_pci_init_config()
2396 ath10k_err(ar, "Failed to write svc/pipe map: %d\n", ret); in ath10k_pci_init_config()
2400 ret = ath10k_pci_diag_read32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
2405 ath10k_err(ar, "Failed to get pcie config_flags: %d\n", ret); in ath10k_pci_init_config()
2411 ret = ath10k_pci_diag_write32(ar, (pcie_state_targ_addr + in ath10k_pci_init_config()
2416 ath10k_err(ar, "Failed to write pcie config_flags: %d\n", ret); in ath10k_pci_init_config()
2423 ret = ath10k_pci_diag_read32(ar, ealloc_targ_addr, &ealloc_value); in ath10k_pci_init_config()
2425 ath10k_err(ar, "Failed to get early alloc val: %d\n", ret); in ath10k_pci_init_config()
2432 ealloc_value |= ((ath10k_bus_get_num_banks(ar) << in ath10k_pci_init_config()
2436 ret = ath10k_pci_diag_write32(ar, ealloc_targ_addr, ealloc_value); in ath10k_pci_init_config()
2438 ath10k_err(ar, "Failed to set early alloc val: %d\n", ret); in ath10k_pci_init_config()
2445 ret = ath10k_pci_diag_read32(ar, flag2_targ_addr, &flag2_value); in ath10k_pci_init_config()
2447 ath10k_err(ar, "Failed to get option val: %d\n", ret); in ath10k_pci_init_config()
2453 ret = ath10k_pci_diag_write32(ar, flag2_targ_addr, flag2_value); in ath10k_pci_init_config()
2455 ath10k_err(ar, "Failed to set option val: %d\n", ret); in ath10k_pci_init_config()
2462 static void ath10k_pci_override_ce_config(struct ath10k *ar) in ath10k_pci_override_ce_config() argument
2466 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_override_ce_config()
2486 int ath10k_pci_alloc_pipes(struct ath10k *ar) in ath10k_pci_alloc_pipes() argument
2488 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_alloc_pipes()
2490 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_alloc_pipes()
2497 pipe->hif_ce_state = ar; in ath10k_pci_alloc_pipes()
2499 ret = ath10k_ce_alloc_pipe(ar, i, &ar_pci->attr[i]); in ath10k_pci_alloc_pipes()
2501 ath10k_err(ar, "failed to allocate copy engine pipe %d: %d\n", in ath10k_pci_alloc_pipes()
2518 void ath10k_pci_free_pipes(struct ath10k *ar) in ath10k_pci_free_pipes() argument
2523 ath10k_ce_free_pipe(ar, i); in ath10k_pci_free_pipes()
2526 int ath10k_pci_init_pipes(struct ath10k *ar) in ath10k_pci_init_pipes() argument
2528 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_init_pipes()
2532 ret = ath10k_ce_init_pipe(ar, i, &ar_pci->attr[i]); in ath10k_pci_init_pipes()
2534 ath10k_err(ar, "failed to initialize copy engine pipe %d: %d\n", in ath10k_pci_init_pipes()
2543 static bool ath10k_pci_has_fw_crashed(struct ath10k *ar) in ath10k_pci_has_fw_crashed() argument
2545 return ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS) & in ath10k_pci_has_fw_crashed()
2549 static void ath10k_pci_fw_crashed_clear(struct ath10k *ar) in ath10k_pci_fw_crashed_clear() argument
2553 val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS); in ath10k_pci_fw_crashed_clear()
2555 ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, val); in ath10k_pci_fw_crashed_clear()
2558 static bool ath10k_pci_has_device_gone(struct ath10k *ar) in ath10k_pci_has_device_gone() argument
2562 val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS); in ath10k_pci_has_device_gone()
2567 static void ath10k_pci_warm_reset_si0(struct ath10k *ar) in ath10k_pci_warm_reset_si0() argument
2571 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2572 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_si0()
2574 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2578 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2579 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_si0()
2581 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_si0()
2586 static void ath10k_pci_warm_reset_cpu(struct ath10k *ar) in ath10k_pci_warm_reset_cpu() argument
2590 ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, 0); in ath10k_pci_warm_reset_cpu()
2592 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_cpu()
2593 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_cpu()
2597 static void ath10k_pci_warm_reset_ce(struct ath10k *ar) in ath10k_pci_warm_reset_ce() argument
2601 val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS); in ath10k_pci_warm_reset_ce()
2603 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2606 ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, in ath10k_pci_warm_reset_ce()
2610 static void ath10k_pci_warm_reset_clear_lf(struct ath10k *ar) in ath10k_pci_warm_reset_clear_lf() argument
2614 val = ath10k_pci_soc_read32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS); in ath10k_pci_warm_reset_clear_lf()
2615 ath10k_pci_soc_write32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS, in ath10k_pci_warm_reset_clear_lf()
2619 static int ath10k_pci_warm_reset(struct ath10k *ar) in ath10k_pci_warm_reset() argument
2623 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n"); in ath10k_pci_warm_reset()
2625 spin_lock_bh(&ar->data_lock); in ath10k_pci_warm_reset()
2626 ar->stats.fw_warm_reset_counter++; in ath10k_pci_warm_reset()
2627 spin_unlock_bh(&ar->data_lock); in ath10k_pci_warm_reset()
2629 ath10k_pci_irq_disable(ar); in ath10k_pci_warm_reset()
2636 ath10k_pci_warm_reset_si0(ar); in ath10k_pci_warm_reset()
2637 ath10k_pci_warm_reset_cpu(ar); in ath10k_pci_warm_reset()
2638 ath10k_pci_init_pipes(ar); in ath10k_pci_warm_reset()
2639 ath10k_pci_wait_for_target_init(ar); in ath10k_pci_warm_reset()
2641 ath10k_pci_warm_reset_clear_lf(ar); in ath10k_pci_warm_reset()
2642 ath10k_pci_warm_reset_ce(ar); in ath10k_pci_warm_reset()
2643 ath10k_pci_warm_reset_cpu(ar); in ath10k_pci_warm_reset()
2644 ath10k_pci_init_pipes(ar); in ath10k_pci_warm_reset()
2646 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_warm_reset()
2648 ath10k_warn(ar, "failed to wait for target init: %d\n", ret); in ath10k_pci_warm_reset()
2652 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset complete\n"); in ath10k_pci_warm_reset()
2657 static int ath10k_pci_qca99x0_soft_chip_reset(struct ath10k *ar) in ath10k_pci_qca99x0_soft_chip_reset() argument
2659 ath10k_pci_irq_disable(ar); in ath10k_pci_qca99x0_soft_chip_reset()
2660 return ath10k_pci_qca99x0_chip_reset(ar); in ath10k_pci_qca99x0_soft_chip_reset()
2663 static int ath10k_pci_safe_chip_reset(struct ath10k *ar) in ath10k_pci_safe_chip_reset() argument
2665 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_safe_chip_reset()
2670 return ar_pci->pci_soft_reset(ar); in ath10k_pci_safe_chip_reset()
2673 static int ath10k_pci_qca988x_chip_reset(struct ath10k *ar) in ath10k_pci_qca988x_chip_reset() argument
2678 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot 988x chip reset\n"); in ath10k_pci_qca988x_chip_reset()
2688 ret = ath10k_pci_warm_reset(ar); in ath10k_pci_qca988x_chip_reset()
2690 ath10k_warn(ar, "failed to warm reset attempt %d of %d: %d\n", in ath10k_pci_qca988x_chip_reset()
2705 ret = ath10k_pci_init_pipes(ar); in ath10k_pci_qca988x_chip_reset()
2707 ath10k_warn(ar, "failed to init copy engine: %d\n", in ath10k_pci_qca988x_chip_reset()
2712 ret = ath10k_pci_diag_read32(ar, QCA988X_HOST_INTEREST_ADDRESS, in ath10k_pci_qca988x_chip_reset()
2715 ath10k_warn(ar, "failed to poke copy engine: %d\n", in ath10k_pci_qca988x_chip_reset()
2720 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip reset complete (warm)\n"); in ath10k_pci_qca988x_chip_reset()
2725 ath10k_warn(ar, "refusing cold reset as requested\n"); in ath10k_pci_qca988x_chip_reset()
2729 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca988x_chip_reset()
2731 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca988x_chip_reset()
2735 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca988x_chip_reset()
2737 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca988x_chip_reset()
2742 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca988x chip reset complete (cold)\n"); in ath10k_pci_qca988x_chip_reset()
2747 static int ath10k_pci_qca6174_chip_reset(struct ath10k *ar) in ath10k_pci_qca6174_chip_reset() argument
2751 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca6174 chip reset\n"); in ath10k_pci_qca6174_chip_reset()
2755 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca6174_chip_reset()
2757 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca6174_chip_reset()
2761 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca6174_chip_reset()
2763 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca6174_chip_reset()
2768 ret = ath10k_pci_warm_reset(ar); in ath10k_pci_qca6174_chip_reset()
2770 ath10k_warn(ar, "failed to warm reset: %d\n", ret); in ath10k_pci_qca6174_chip_reset()
2774 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca6174 chip reset complete (cold)\n"); in ath10k_pci_qca6174_chip_reset()
2779 static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar) in ath10k_pci_qca99x0_chip_reset() argument
2783 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca99x0 chip reset\n"); in ath10k_pci_qca99x0_chip_reset()
2785 ret = ath10k_pci_cold_reset(ar); in ath10k_pci_qca99x0_chip_reset()
2787 ath10k_warn(ar, "failed to cold reset: %d\n", ret); in ath10k_pci_qca99x0_chip_reset()
2791 ret = ath10k_pci_wait_for_target_init(ar); in ath10k_pci_qca99x0_chip_reset()
2793 ath10k_warn(ar, "failed to wait for target after cold reset: %d\n", in ath10k_pci_qca99x0_chip_reset()
2798 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot qca99x0 chip reset complete (cold)\n"); in ath10k_pci_qca99x0_chip_reset()
2803 static int ath10k_pci_chip_reset(struct ath10k *ar) in ath10k_pci_chip_reset() argument
2805 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_chip_reset()
2810 return ar_pci->pci_hard_reset(ar); in ath10k_pci_chip_reset()
2813 static int ath10k_pci_hif_power_up(struct ath10k *ar, in ath10k_pci_hif_power_up() argument
2816 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_hif_power_up()
2819 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n"); in ath10k_pci_hif_power_up()
2836 ret = ath10k_pci_chip_reset(ar); in ath10k_pci_hif_power_up()
2838 if (ath10k_pci_has_fw_crashed(ar)) { in ath10k_pci_hif_power_up()
2839 ath10k_warn(ar, "firmware crashed during chip reset\n"); in ath10k_pci_hif_power_up()
2840 ath10k_pci_fw_crashed_clear(ar); in ath10k_pci_hif_power_up()
2841 ath10k_pci_fw_crashed_dump(ar); in ath10k_pci_hif_power_up()
2844 ath10k_err(ar, "failed to reset chip: %d\n", ret); in ath10k_pci_hif_power_up()
2848 ret = ath10k_pci_init_pipes(ar); in ath10k_pci_hif_power_up()
2850 ath10k_err(ar, "failed to initialize CE: %d\n", ret); in ath10k_pci_hif_power_up()
2854 ret = ath10k_pci_init_config(ar); in ath10k_pci_hif_power_up()
2856 ath10k_err(ar, "failed to setup init config: %d\n", ret); in ath10k_pci_hif_power_up()
2860 ret = ath10k_pci_wake_target_cpu(ar); in ath10k_pci_hif_power_up()
2862 ath10k_err(ar, "could not wake up target CPU: %d\n", ret); in ath10k_pci_hif_power_up()
2869 ath10k_pci_ce_deinit(ar); in ath10k_pci_hif_power_up()
2875 void ath10k_pci_hif_power_down(struct ath10k *ar) in ath10k_pci_hif_power_down() argument
2877 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power down\n"); in ath10k_pci_hif_power_down()
2884 static int ath10k_pci_hif_suspend(struct ath10k *ar) in ath10k_pci_hif_suspend() argument
2890 static int ath10k_pci_suspend(struct ath10k *ar) in ath10k_pci_suspend() argument
2897 ath10k_pci_sleep_sync(ar); in ath10k_pci_suspend()
2902 static int ath10k_pci_hif_resume(struct ath10k *ar) in ath10k_pci_hif_resume() argument
2908 static int ath10k_pci_resume(struct ath10k *ar) in ath10k_pci_resume() argument
2910 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_resume()
2915 ret = ath10k_pci_force_wake(ar); in ath10k_pci_resume()
2917 ath10k_err(ar, "failed to wake up target: %d\n", ret); in ath10k_pci_resume()
2948 static void ath10k_pci_enable_eeprom(struct ath10k *ar) in ath10k_pci_enable_eeprom() argument
2951 ath10k_pci_soc_write32(ar, CLOCK_CONTROL_OFFSET, 0x0); in ath10k_pci_enable_eeprom()
2954 ath10k_pci_write32(ar, in ath10k_pci_enable_eeprom()
2961 ath10k_pci_write32(ar, in ath10k_pci_enable_eeprom()
2967 ath10k_pci_write32(ar, in ath10k_pci_enable_eeprom()
2973 ath10k_pci_write32(ar, in ath10k_pci_enable_eeprom()
2984 static int ath10k_pci_read_eeprom(struct ath10k *ar, u16 addr, u8 *out) in ath10k_pci_read_eeprom() argument
2993 ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_TX_DATA0_OFFSET, reg); in ath10k_pci_read_eeprom()
2996 ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET, in ath10k_pci_read_eeprom()
3005 reg = ath10k_pci_read32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET); in ath10k_pci_read_eeprom()
3014 ath10k_err(ar, "timeout while reading device EEPROM at %04x\n", in ath10k_pci_read_eeprom()
3020 ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET, reg); in ath10k_pci_read_eeprom()
3023 ath10k_err(ar, "failed to read device EEPROM at %04x\n", addr); in ath10k_pci_read_eeprom()
3028 reg = ath10k_pci_read32(ar, SI_BASE_ADDRESS + SI_RX_DATA0_OFFSET); in ath10k_pci_read_eeprom()
3034 static int ath10k_pci_hif_fetch_cal_eeprom(struct ath10k *ar, void **data, in ath10k_pci_hif_fetch_cal_eeprom() argument
3041 if (!QCA_REV_9887(ar)) in ath10k_pci_hif_fetch_cal_eeprom()
3044 calsize = ar->hw_params.cal_data_len; in ath10k_pci_hif_fetch_cal_eeprom()
3049 ath10k_pci_enable_eeprom(ar); in ath10k_pci_hif_fetch_cal_eeprom()
3052 ret = ath10k_pci_read_eeprom(ar, i, &caldata[i]); in ath10k_pci_hif_fetch_cal_eeprom()
3098 struct ath10k *ar = arg; in ath10k_pci_interrupt_handler() local
3099 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_interrupt_handler()
3102 if (ath10k_pci_has_device_gone(ar)) in ath10k_pci_interrupt_handler()
3105 ret = ath10k_pci_force_wake(ar); in ath10k_pci_interrupt_handler()
3107 ath10k_warn(ar, "failed to wake device up on irq: %d\n", ret); in ath10k_pci_interrupt_handler()
3112 !ath10k_pci_irq_pending(ar)) in ath10k_pci_interrupt_handler()
3115 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_interrupt_handler()
3116 ath10k_pci_irq_msi_fw_mask(ar); in ath10k_pci_interrupt_handler()
3117 napi_schedule(&ar->napi); in ath10k_pci_interrupt_handler()
3124 struct ath10k *ar = container_of(ctx, struct ath10k, napi); in ath10k_pci_napi_poll() local
3127 if (ath10k_pci_has_fw_crashed(ar)) { in ath10k_pci_napi_poll()
3128 ath10k_pci_fw_crashed_clear(ar); in ath10k_pci_napi_poll()
3129 ath10k_pci_fw_crashed_dump(ar); in ath10k_pci_napi_poll()
3134 ath10k_ce_per_engine_service_any(ar); in ath10k_pci_napi_poll()
3136 done = ath10k_htt_txrx_compl_task(ar, budget); in ath10k_pci_napi_poll()
3148 if (ath10k_ce_interrupt_summary(ar)) { in ath10k_pci_napi_poll()
3152 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_napi_poll()
3153 ath10k_pci_irq_msi_fw_unmask(ar); in ath10k_pci_napi_poll()
3160 static int ath10k_pci_request_irq_msi(struct ath10k *ar) in ath10k_pci_request_irq_msi() argument
3162 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq_msi()
3167 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_msi()
3169 ath10k_warn(ar, "failed to request MSI irq %d: %d\n", in ath10k_pci_request_irq_msi()
3177 static int ath10k_pci_request_irq_legacy(struct ath10k *ar) in ath10k_pci_request_irq_legacy() argument
3179 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq_legacy()
3184 IRQF_SHARED, "ath10k_pci", ar); in ath10k_pci_request_irq_legacy()
3186 ath10k_warn(ar, "failed to request legacy irq %d: %d\n", in ath10k_pci_request_irq_legacy()
3194 static int ath10k_pci_request_irq(struct ath10k *ar) in ath10k_pci_request_irq() argument
3196 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_request_irq()
3200 return ath10k_pci_request_irq_legacy(ar); in ath10k_pci_request_irq()
3202 return ath10k_pci_request_irq_msi(ar); in ath10k_pci_request_irq()
3208 static void ath10k_pci_free_irq(struct ath10k *ar) in ath10k_pci_free_irq() argument
3210 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_free_irq()
3212 free_irq(ar_pci->pdev->irq, ar); in ath10k_pci_free_irq()
3215 void ath10k_pci_init_napi(struct ath10k *ar) in ath10k_pci_init_napi() argument
3217 netif_napi_add(&ar->napi_dev, &ar->napi, ath10k_pci_napi_poll, in ath10k_pci_init_napi()
3221 static int ath10k_pci_init_irq(struct ath10k *ar) in ath10k_pci_init_irq() argument
3223 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_init_irq()
3226 ath10k_pci_init_napi(ar); in ath10k_pci_init_irq()
3229 ath10k_info(ar, "limiting irq mode to: %d\n", in ath10k_pci_init_irq()
3253 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_init_irq()
3259 static void ath10k_pci_deinit_irq_legacy(struct ath10k *ar) in ath10k_pci_deinit_irq_legacy() argument
3261 ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, in ath10k_pci_deinit_irq_legacy()
3265 static int ath10k_pci_deinit_irq(struct ath10k *ar) in ath10k_pci_deinit_irq() argument
3267 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_deinit_irq()
3271 ath10k_pci_deinit_irq_legacy(ar); in ath10k_pci_deinit_irq()
3281 int ath10k_pci_wait_for_target_init(struct ath10k *ar) in ath10k_pci_wait_for_target_init() argument
3283 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_wait_for_target_init()
3287 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot waiting target to initialise\n"); in ath10k_pci_wait_for_target_init()
3292 val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS); in ath10k_pci_wait_for_target_init()
3294 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target indicator %x\n", in ath10k_pci_wait_for_target_init()
3310 ath10k_pci_enable_legacy_irq(ar); in ath10k_pci_wait_for_target_init()
3315 ath10k_pci_disable_and_clear_legacy_irq(ar); in ath10k_pci_wait_for_target_init()
3316 ath10k_pci_irq_msi_fw_mask(ar); in ath10k_pci_wait_for_target_init()
3319 ath10k_err(ar, "failed to read device register, device is gone\n"); in ath10k_pci_wait_for_target_init()
3324 ath10k_warn(ar, "device has crashed during init\n"); in ath10k_pci_wait_for_target_init()
3329 ath10k_err(ar, "failed to receive initialized event from target: %08x\n", in ath10k_pci_wait_for_target_init()
3334 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target initialised\n"); in ath10k_pci_wait_for_target_init()
3338 static int ath10k_pci_cold_reset(struct ath10k *ar) in ath10k_pci_cold_reset() argument
3342 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset\n"); in ath10k_pci_cold_reset()
3344 spin_lock_bh(&ar->data_lock); in ath10k_pci_cold_reset()
3346 ar->stats.fw_cold_reset_counter++; in ath10k_pci_cold_reset()
3348 spin_unlock_bh(&ar->data_lock); in ath10k_pci_cold_reset()
3351 val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS); in ath10k_pci_cold_reset()
3353 ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val); in ath10k_pci_cold_reset()
3364 ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val); in ath10k_pci_cold_reset()
3368 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset complete\n"); in ath10k_pci_cold_reset()
3373 static int ath10k_pci_claim(struct ath10k *ar) in ath10k_pci_claim() argument
3375 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_claim()
3379 pci_set_drvdata(pdev, ar); in ath10k_pci_claim()
3383 ath10k_err(ar, "failed to enable pci device: %d\n", ret); in ath10k_pci_claim()
3389 ath10k_err(ar, "failed to request region BAR%d: %d\n", BAR_NUM, in ath10k_pci_claim()
3397 ath10k_err(ar, "failed to set dma mask to 32-bit: %d\n", ret); in ath10k_pci_claim()
3403 ath10k_err(ar, "failed to set consistent dma mask to 32-bit: %d\n", in ath10k_pci_claim()
3414 ath10k_err(ar, "failed to iomap BAR%d\n", BAR_NUM); in ath10k_pci_claim()
3419 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%pK\n", ar_pci->mem); in ath10k_pci_claim()
3434 static void ath10k_pci_release(struct ath10k *ar) in ath10k_pci_release() argument
3436 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_release()
3462 int ath10k_pci_setup_resource(struct ath10k *ar) in ath10k_pci_setup_resource() argument
3464 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_setup_resource()
3465 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_pci_setup_resource()
3498 if (QCA_REV_6174(ar) || QCA_REV_9377(ar)) in ath10k_pci_setup_resource()
3499 ath10k_pci_override_ce_config(ar); in ath10k_pci_setup_resource()
3501 ret = ath10k_pci_alloc_pipes(ar); in ath10k_pci_setup_resource()
3503 ath10k_err(ar, "failed to allocate copy engine pipes: %d\n", in ath10k_pci_setup_resource()
3519 void ath10k_pci_release_resource(struct ath10k *ar) in ath10k_pci_release_resource() argument
3521 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); in ath10k_pci_release_resource()
3523 ath10k_pci_rx_retry_sync(ar); in ath10k_pci_release_resource()
3524 netif_napi_del(&ar->napi); in ath10k_pci_release_resource()
3525 ath10k_pci_ce_deinit(ar); in ath10k_pci_release_resource()
3526 ath10k_pci_free_pipes(ar); in ath10k_pci_release_resource()
3542 struct ath10k *ar; in ath10k_pci_probe() local
3547 int (*pci_soft_reset)(struct ath10k *ar); in ath10k_pci_probe()
3548 int (*pci_hard_reset)(struct ath10k *ar); in ath10k_pci_probe()
3549 u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr); in ath10k_pci_probe()
3609 ar = ath10k_core_create(sizeof(*ar_pci), &pdev->dev, ATH10K_BUS_PCI, in ath10k_pci_probe()
3611 if (!ar) { in ath10k_pci_probe()
3616 ath10k_dbg(ar, ATH10K_DBG_BOOT, "pci probe %04x:%04x %04x:%04x\n", in ath10k_pci_probe()
3620 ar_pci = ath10k_pci_priv(ar); in ath10k_pci_probe()
3623 ar_pci->ar = ar; in ath10k_pci_probe()
3624 ar->dev_id = pci_dev->device; in ath10k_pci_probe()
3630 ar->ce_priv = &ar_pci->ce; in ath10k_pci_probe()
3632 ar->id.vendor = pdev->vendor; in ath10k_pci_probe()
3633 ar->id.device = pdev->device; in ath10k_pci_probe()
3634 ar->id.subsystem_vendor = pdev->subsystem_vendor; in ath10k_pci_probe()
3635 ar->id.subsystem_device = pdev->subsystem_device; in ath10k_pci_probe()
3639 ret = ath10k_pci_setup_resource(ar); in ath10k_pci_probe()
3641 ath10k_err(ar, "failed to setup resource: %d\n", ret); in ath10k_pci_probe()
3645 ret = ath10k_pci_claim(ar); in ath10k_pci_probe()
3647 ath10k_err(ar, "failed to claim device: %d\n", ret); in ath10k_pci_probe()
3651 ret = ath10k_pci_force_wake(ar); in ath10k_pci_probe()
3653 ath10k_warn(ar, "failed to wake up device : %d\n", ret); in ath10k_pci_probe()
3657 ath10k_pci_ce_deinit(ar); in ath10k_pci_probe()
3658 ath10k_pci_irq_disable(ar); in ath10k_pci_probe()
3660 ret = ath10k_pci_init_irq(ar); in ath10k_pci_probe()
3662 ath10k_err(ar, "failed to init irqs: %d\n", ret); in ath10k_pci_probe()
3666 ath10k_info(ar, "pci irq %s oper_irq_mode %d irq_mode %d reset_mode %d\n", in ath10k_pci_probe()
3667 ath10k_pci_get_irq_method(ar), ar_pci->oper_irq_mode, in ath10k_pci_probe()
3670 ret = ath10k_pci_request_irq(ar); in ath10k_pci_probe()
3672 ath10k_warn(ar, "failed to request irqs: %d\n", ret); in ath10k_pci_probe()
3684 ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS); in ath10k_pci_probe()
3694 ret = ath10k_pci_chip_reset(ar); in ath10k_pci_probe()
3696 ath10k_err(ar, "failed to reset chip: %d\n", ret); in ath10k_pci_probe()
3700 bus_params.chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS); in ath10k_pci_probe()
3711 ret = ath10k_core_register(ar, &bus_params); in ath10k_pci_probe()
3713 ath10k_err(ar, "failed to register driver core: %d\n", ret); in ath10k_pci_probe()
3720 ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n", in ath10k_pci_probe()
3724 ath10k_pci_free_irq(ar); in ath10k_pci_probe()
3727 ath10k_pci_release_resource(ar); in ath10k_pci_probe()
3730 ath10k_pci_sleep_sync(ar); in ath10k_pci_probe()
3731 ath10k_pci_release(ar); in ath10k_pci_probe()
3734 ath10k_pci_free_pipes(ar); in ath10k_pci_probe()
3737 ath10k_core_destroy(ar); in ath10k_pci_probe()
3744 struct ath10k *ar = pci_get_drvdata(pdev); in ath10k_pci_remove() local
3746 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n"); in ath10k_pci_remove()
3748 if (!ar) in ath10k_pci_remove()
3751 ath10k_core_unregister(ar); in ath10k_pci_remove()
3752 ath10k_pci_free_irq(ar); in ath10k_pci_remove()
3753 ath10k_pci_deinit_irq(ar); in ath10k_pci_remove()
3754 ath10k_pci_release_resource(ar); in ath10k_pci_remove()
3755 ath10k_pci_sleep_sync(ar); in ath10k_pci_remove()
3756 ath10k_pci_release(ar); in ath10k_pci_remove()
3757 ath10k_core_destroy(ar); in ath10k_pci_remove()
3764 struct ath10k *ar = dev_get_drvdata(dev); in ath10k_pci_pm_suspend() local
3767 ret = ath10k_pci_suspend(ar); in ath10k_pci_pm_suspend()
3769 ath10k_warn(ar, "failed to suspend hif: %d\n", ret); in ath10k_pci_pm_suspend()
3776 struct ath10k *ar = dev_get_drvdata(dev); in ath10k_pci_pm_resume() local
3779 ret = ath10k_pci_resume(ar); in ath10k_pci_pm_resume()
3781 ath10k_warn(ar, "failed to resume hif: %d\n", ret); in ath10k_pci_pm_resume()