1244 	u32 intr_line;  in chv_gpio_irq_ack()  local
1248 	intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);  in chv_gpio_irq_ack()
1249 	intr_line &= CHV_PADCTRL0_INTSEL_MASK;  in chv_gpio_irq_ack()
1250 	intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;  in chv_gpio_irq_ack()
1251 	chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line));  in chv_gpio_irq_ack()
1261 	u32 value, intr_line;  in chv_gpio_irq_mask_unmask()  local
1266 	intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0);  in chv_gpio_irq_mask_unmask()
1267 	intr_line &= CHV_PADCTRL0_INTSEL_MASK;  in chv_gpio_irq_mask_unmask()
1268 	intr_line >>= CHV_PADCTRL0_INTSEL_SHIFT;  in chv_gpio_irq_mask_unmask()
1272 		value &= ~BIT(intr_line);  in chv_gpio_irq_mask_unmask()
1274 		value |= BIT(intr_line);  in chv_gpio_irq_mask_unmask()
1403 	u32 intr_line;  in chv_gpio_irq_handler()  local
1411 	for_each_set_bit(intr_line, &pending, community->nirqs) {  in chv_gpio_irq_handler()
1414 		offset = cctx->intr_lines[intr_line];  in chv_gpio_irq_handler()