4  * pinctrl-bindings.txt for MediaTek SoC.
62 		desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];  in mtk_pinmux_set_mux()
78 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];  in mtk_pinmux_gpio_request_enable()
81 				hw->soc->gpio_m);  in mtk_pinmux_gpio_request_enable()
91 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];  in mtk_pinmux_gpio_set_direction()
105 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];  in mtk_pinconf_get()
109 		if (hw->soc->bias_disable_get) {  in mtk_pinconf_get()
110 			err = hw->soc->bias_disable_get(hw, desc, &ret);  in mtk_pinconf_get()
118 		if (hw->soc->bias_get) {  in mtk_pinconf_get()
119 			err = hw->soc->bias_get(hw, desc, 1, &ret);  in mtk_pinconf_get()
127 		if (hw->soc->bias_get) {  in mtk_pinconf_get()
128 			err = hw->soc->bias_get(hw, desc, 0, &ret);  in mtk_pinconf_get()
170 		if (hw->soc->drive_get) {  in mtk_pinconf_get()
171 			err = hw->soc->drive_get(hw, desc, &ret);  in mtk_pinconf_get()
192 		if (hw->soc->adv_pull_get) {  in mtk_pinconf_get()
196 			err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);  in mtk_pinconf_get()
220 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];  in mtk_pinconf_set()
228 			if (hw->soc->bias_disable_set) {  in mtk_pinconf_set()
229 				err = hw->soc->bias_disable_set(hw, desc);  in mtk_pinconf_set()
237 			if (hw->soc->bias_set) {  in mtk_pinconf_set()
238 				err = hw->soc->bias_set(hw, desc, 1);  in mtk_pinconf_set()
246 			if (hw->soc->bias_set) {  in mtk_pinconf_set()
247 				err = hw->soc->bias_set(hw, desc, 0);  in mtk_pinconf_set()
267 			if (hw->soc->ies_present) {  in mtk_pinconf_set()
311 			if (hw->soc->drive_set) {  in mtk_pinconf_set()
312 				err = hw->soc->drive_set(hw, desc, arg);  in mtk_pinconf_set()
330 			if (hw->soc->adv_pull_set) {  in mtk_pinconf_set()
334 				err = hw->soc->adv_pull_set(hw, desc, pullup,  in mtk_pinconf_set()
437 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];  in mtk_gpio_get()
451 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];  in mtk_gpio_set()
477 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];  in mtk_gpio_to_irq()
492 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];  in mtk_gpio_set_config()
520 	chip->ngpio		= hw->soc->npins;  in mtk_build_gpiochip()
551 	for (i = 0; i < hw->soc->ngrps; i++) {  in mtk_build_groups()
552 		const struct group_desc *group = hw->soc->grps + i;  in mtk_build_groups()
571 	for (i = 0; i < hw->soc->nfuncs ; i++) {  in mtk_build_functions()
572 		const struct function_desc *func = hw->soc->funcs + i;  in mtk_build_functions()
589 			    const struct mtk_pin_soc *soc)  in mtk_moore_pinctrl_probe()  argument
599 	hw->soc = soc;  in mtk_moore_pinctrl_probe()
602 	if (!hw->soc->nbase_names) {  in mtk_moore_pinctrl_probe()
604 			"SoC should be assigned at least one register base\n");  in mtk_moore_pinctrl_probe()
608 	hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,  in mtk_moore_pinctrl_probe()
613 	for (i = 0; i < hw->soc->nbase_names; i++) {  in mtk_moore_pinctrl_probe()
615 						hw->soc->base_names[i]);  in mtk_moore_pinctrl_probe()
620 	hw->nbase = hw->soc->nbase_names;  in mtk_moore_pinctrl_probe()
623 	pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),  in mtk_moore_pinctrl_probe()
628 	for (i = 0; i < hw->soc->npins; i++) {  in mtk_moore_pinctrl_probe()
629 		pins[i].number = hw->soc->pins[i].number;  in mtk_moore_pinctrl_probe()
630 		pins[i].name = hw->soc->pins[i].name;  in mtk_moore_pinctrl_probe()
633 	/* Setup pins descriptions per SoC types */  in mtk_moore_pinctrl_probe()
635 	mtk_desc.npins = hw->soc->npins;  in mtk_moore_pinctrl_probe()
647 	/* Setup groups descriptions per SoC types */  in mtk_moore_pinctrl_probe()
654 	/* Setup functions descriptions per SoC types */  in mtk_moore_pinctrl_probe()