Lines Matching refs:pio
171 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
172 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
173 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
174 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
175 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
176 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
177 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
178 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
179 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
180 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
181 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
182 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
183 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
184 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
185 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
187 unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
188 void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
384 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt() argument
386 writel_relaxed(mask, pio + PIO_IDR); in at91_mux_disable_interrupt()
389 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin) in at91_mux_get_pullup() argument
391 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1); in at91_mux_get_pullup()
394 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_pullup() argument
397 writel_relaxed(mask, pio + PIO_PPDDR); in at91_mux_set_pullup()
399 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR)); in at91_mux_set_pullup()
402 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val) in at91_mux_get_output() argument
404 *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1; in at91_mux_get_output()
405 return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1; in at91_mux_get_output()
408 static void at91_mux_set_output(void __iomem *pio, unsigned int mask, in at91_mux_set_output() argument
411 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_mux_set_output()
412 writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR)); in at91_mux_set_output()
415 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin) in at91_mux_get_multidrive() argument
417 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1; in at91_mux_get_multidrive()
420 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) in at91_mux_set_multidrive() argument
422 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR)); in at91_mux_set_multidrive()
425 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_set_A_periph() argument
427 writel_relaxed(mask, pio + PIO_ASR); in at91_mux_set_A_periph()
430 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_set_B_periph() argument
432 writel_relaxed(mask, pio + PIO_BSR); in at91_mux_set_B_periph()
435 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_A_periph() argument
438 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, in at91_mux_pio3_set_A_periph()
439 pio + PIO_ABCDSR1); in at91_mux_pio3_set_A_periph()
440 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_A_periph()
441 pio + PIO_ABCDSR2); in at91_mux_pio3_set_A_periph()
444 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_B_periph() argument
446 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, in at91_mux_pio3_set_B_periph()
447 pio + PIO_ABCDSR1); in at91_mux_pio3_set_B_periph()
448 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask, in at91_mux_pio3_set_B_periph()
449 pio + PIO_ABCDSR2); in at91_mux_pio3_set_B_periph()
452 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_C_periph() argument
454 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_C_periph()
455 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_C_periph()
458 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_set_D_periph() argument
460 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); in at91_mux_pio3_set_D_periph()
461 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); in at91_mux_pio3_set_D_periph()
464 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask) in at91_mux_pio3_get_periph() argument
468 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_pio3_get_periph()
471 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask); in at91_mux_pio3_get_periph()
472 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1); in at91_mux_pio3_get_periph()
477 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) in at91_mux_get_periph() argument
481 if (readl_relaxed(pio + PIO_PSR) & mask) in at91_mux_get_periph()
484 select = readl_relaxed(pio + PIO_ABSR) & mask; in at91_mux_get_periph()
489 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_get_deglitch() argument
491 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1; in at91_mux_get_deglitch()
494 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_set_deglitch() argument
496 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); in at91_mux_set_deglitch()
499 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_deglitch() argument
501 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) in at91_mux_pio3_get_deglitch()
502 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_deglitch()
507 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_deglitch() argument
510 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_deglitch()
511 at91_mux_set_deglitch(pio, mask, is_on); in at91_mux_pio3_set_deglitch()
514 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) in at91_mux_pio3_get_debounce() argument
516 *div = readl_relaxed(pio + PIO_SCDR); in at91_mux_pio3_get_debounce()
518 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) && in at91_mux_pio3_get_debounce()
519 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1); in at91_mux_pio3_get_debounce()
522 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, in at91_mux_pio3_set_debounce() argument
526 writel_relaxed(mask, pio + PIO_IFSCER); in at91_mux_pio3_set_debounce()
527 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); in at91_mux_pio3_set_debounce()
528 writel_relaxed(mask, pio + PIO_IFER); in at91_mux_pio3_set_debounce()
530 writel_relaxed(mask, pio + PIO_IFSCDR); in at91_mux_pio3_set_debounce()
533 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_pulldown() argument
535 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1); in at91_mux_pio3_get_pulldown()
538 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) in at91_mux_pio3_set_pulldown() argument
541 writel_relaxed(mask, pio + PIO_PUDR); in at91_mux_pio3_set_pulldown()
543 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); in at91_mux_pio3_set_pulldown()
546 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) in at91_mux_pio3_disable_schmitt_trig() argument
548 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); in at91_mux_pio3_disable_schmitt_trig()
551 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) in at91_mux_pio3_get_schmitt_trig() argument
553 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1; in at91_mux_pio3_get_schmitt_trig()
565 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio, in at91_mux_sama5d3_get_drivestrength() argument
568 unsigned tmp = read_drive_strength(pio + in at91_mux_sama5d3_get_drivestrength()
579 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio, in at91_mux_sam9x5_get_drivestrength() argument
582 unsigned tmp = read_drive_strength(pio + in at91_mux_sam9x5_get_drivestrength()
592 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio, in at91_mux_sam9x60_get_drivestrength() argument
595 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_get_drivestrength()
603 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin) in at91_mux_sam9x60_get_slewrate() argument
605 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_get_slewrate()
624 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sama5d3_set_drivestrength() argument
632 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting); in at91_mux_sama5d3_set_drivestrength()
635 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x5_set_drivestrength() argument
646 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin, in at91_mux_sam9x5_set_drivestrength()
650 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_drivestrength() argument
660 tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
668 writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1); in at91_mux_sam9x60_set_drivestrength()
671 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin, in at91_mux_sam9x60_set_slewrate() argument
679 tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
686 writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR); in at91_mux_sam9x60_set_slewrate()
812 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask) in at91_mux_gpio_disable() argument
814 writel_relaxed(mask, pio + PIO_PDR); in at91_mux_gpio_disable()
817 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input) in at91_mux_gpio_enable() argument
819 writel_relaxed(mask, pio + PIO_PER); in at91_mux_gpio_enable()
820 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER)); in at91_mux_gpio_enable()
832 void __iomem *pio; in at91_pmx_set() local
849 pio = pin_to_controller(info, pin->bank); in at91_pmx_set()
851 if (!pio) in at91_pmx_set()
855 at91_mux_disable_interrupt(pio, mask); in at91_pmx_set()
858 at91_mux_gpio_enable(pio, mask, 1); in at91_pmx_set()
861 info->ops->mux_A_periph(pio, mask); in at91_pmx_set()
864 info->ops->mux_B_periph(pio, mask); in at91_pmx_set()
869 info->ops->mux_C_periph(pio, mask); in at91_pmx_set()
874 info->ops->mux_D_periph(pio, mask); in at91_pmx_set()
878 at91_mux_gpio_disable(pio, mask); in at91_pmx_set()
966 void __iomem *pio; in at91_pinconf_get() local
973 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_get()
975 if (!pio) in at91_pinconf_get()
980 if (at91_mux_get_multidrive(pio, pin)) in at91_pinconf_get()
983 if (at91_mux_get_pullup(pio, pin)) in at91_pinconf_get()
986 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin)) in at91_pinconf_get()
988 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div)) in at91_pinconf_get()
990 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin)) in at91_pinconf_get()
992 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin)) in at91_pinconf_get()
995 *config |= (info->ops->get_drivestrength(pio, pin) in at91_pinconf_get()
998 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT); in at91_pinconf_get()
999 if (at91_mux_get_output(pio, pin, &out)) in at91_pinconf_get()
1011 void __iomem *pio; in at91_pinconf_set() local
1022 pio = pin_to_controller(info, pin_to_bank(pin_id)); in at91_pinconf_set()
1024 if (!pio) in at91_pinconf_set()
1033 at91_mux_set_output(pio, mask, config & OUTPUT, in at91_pinconf_set()
1035 at91_mux_set_pullup(pio, mask, config & PULL_UP); in at91_pinconf_set()
1036 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE); in at91_pinconf_set()
1038 info->ops->set_deglitch(pio, mask, config & DEGLITCH); in at91_pinconf_set()
1040 info->ops->set_debounce(pio, mask, config & DEBOUNCE, in at91_pinconf_set()
1043 info->ops->set_pulldown(pio, mask, config & PULL_DOWN); in at91_pinconf_set()
1045 info->ops->disable_schmitt_trig(pio, mask); in at91_pinconf_set()
1047 info->ops->set_drivestrength(pio, pin, in at91_pinconf_set()
1051 info->ops->set_slewrate(pio, pin, in at91_pinconf_set()
1415 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction() local
1419 osr = readl_relaxed(pio + PIO_OSR); in at91_gpio_get_direction()
1429 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input() local
1432 writel_relaxed(mask, pio + PIO_ODR); in at91_gpio_direction_input()
1439 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get() local
1443 pdsr = readl_relaxed(pio + PIO_PDSR); in at91_gpio_get()
1451 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set() local
1454 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_set()
1461 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set_multiple() local
1468 writel_relaxed(set_mask, pio + PIO_SODR); in at91_gpio_set_multiple()
1469 writel_relaxed(clear_mask, pio + PIO_CODR); in at91_gpio_set_multiple()
1476 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output() local
1479 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR)); in at91_gpio_direction_output()
1480 writel_relaxed(mask, pio + PIO_OER); in at91_gpio_direction_output()
1491 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show() local
1497 mode = at91_gpio->ops->get_periph(pio, mask); in at91_gpio_dbg_show()
1503 readl_relaxed(pio + PIO_OSR) & mask ? in at91_gpio_dbg_show()
1506 readl_relaxed(pio + PIO_PDSR) & mask ? in at91_gpio_dbg_show()
1535 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask() local
1538 if (pio) in gpio_irq_mask()
1539 writel_relaxed(mask, pio + PIO_IDR); in gpio_irq_mask()
1545 void __iomem *pio = at91_gpio->regbase; in gpio_irq_unmask() local
1548 if (pio) in gpio_irq_unmask()
1549 writel_relaxed(mask, pio + PIO_IER); in gpio_irq_unmask()
1567 void __iomem *pio = at91_gpio->regbase; in alt_gpio_irq_type() local
1573 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1574 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1578 writel_relaxed(mask, pio + PIO_ESR); in alt_gpio_irq_type()
1579 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1583 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1584 writel_relaxed(mask, pio + PIO_FELLSR); in alt_gpio_irq_type()
1588 writel_relaxed(mask, pio + PIO_LSR); in alt_gpio_irq_type()
1589 writel_relaxed(mask, pio + PIO_REHLSR); in alt_gpio_irq_type()
1597 writel_relaxed(mask, pio + PIO_AIMDR); in alt_gpio_irq_type()
1606 writel_relaxed(mask, pio + PIO_AIMER); in alt_gpio_irq_type()
1645 void __iomem *pio; in at91_pinctrl_gpio_suspend() local
1650 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_suspend()
1652 backups[i] = readl_relaxed(pio + PIO_IMR); in at91_pinctrl_gpio_suspend()
1653 writel_relaxed(backups[i], pio + PIO_IDR); in at91_pinctrl_gpio_suspend()
1654 writel_relaxed(wakeups[i], pio + PIO_IER); in at91_pinctrl_gpio_suspend()
1669 void __iomem *pio; in at91_pinctrl_gpio_resume() local
1674 pio = gpio_chips[i]->regbase; in at91_pinctrl_gpio_resume()
1679 writel_relaxed(wakeups[i], pio + PIO_IDR); in at91_pinctrl_gpio_resume()
1680 writel_relaxed(backups[i], pio + PIO_IER); in at91_pinctrl_gpio_resume()
1693 void __iomem *pio = at91_gpio->regbase; in gpio_irq_handler() local
1703 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR); in gpio_irq_handler()
1708 pio = at91_gpio->regbase; in gpio_irq_handler()