• Home
  • Raw
  • Download

Lines Matching full:lsb

114 #define LSB(x)	((uint8_t)(x))  macro
1428 * LSB BIT 0 = Enable Hard Loop Id
1429 * LSB BIT 1 = Enable Fairness
1430 * LSB BIT 2 = Enable Full-Duplex
1431 * LSB BIT 3 = Enable Fast Posting
1432 * LSB BIT 4 = Enable Target Mode
1433 * LSB BIT 5 = Disable Initiator Mode
1434 * LSB BIT 6 = Enable ADISC
1435 * LSB BIT 7 = Enable Target Inquiry Data
1473 * LSB BIT 0 = Timer Operation mode bit 0
1474 * LSB BIT 1 = Timer Operation mode bit 1
1475 * LSB BIT 2 = Timer Operation mode bit 2
1476 * LSB BIT 3 = Timer Operation mode bit 3
1477 * LSB BIT 4 = Init Config Mode bit 0
1478 * LSB BIT 5 = Init Config Mode bit 1
1479 * LSB BIT 6 = Init Config Mode bit 2
1480 * LSB BIT 7 = Enable Non part on LIHA failure
1497 * LSB BIT 0 = Enable Read xfr_rdy
1498 * LSB BIT 1 = Soft ID only
1499 * LSB BIT 2 =
1500 * LSB BIT 3 =
1501 * LSB BIT 4 = FCP RSP Payload [0]
1502 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1503 * LSB BIT 6 = Enable Out-of-Order frame handling
1504 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
1615 * LSB BIT 0 = Enable Hard Loop Id
1616 * LSB BIT 1 = Enable Fairness
1617 * LSB BIT 2 = Enable Full-Duplex
1618 * LSB BIT 3 = Enable Fast Posting
1619 * LSB BIT 4 = Enable Target Mode
1620 * LSB BIT 5 = Disable Initiator Mode
1621 * LSB BIT 6 = Enable ADISC
1622 * LSB BIT 7 = Enable Target Inquiry Data
1647 * LSB BIT 0 = Timer Operation mode bit 0
1648 * LSB BIT 1 = Timer Operation mode bit 1
1649 * LSB BIT 2 = Timer Operation mode bit 2
1650 * LSB BIT 3 = Timer Operation mode bit 3
1651 * LSB BIT 4 = Init Config Mode bit 0
1652 * LSB BIT 5 = Init Config Mode bit 1
1653 * LSB BIT 6 = Init Config Mode bit 2
1654 * LSB BIT 7 = Enable Non part on LIHA failure
1671 * LSB BIT 0 = Enable Read xfr_rdy
1672 * LSB BIT 1 = Soft ID only
1673 * LSB BIT 2 =
1674 * LSB BIT 3 =
1675 * LSB BIT 4 = FCP RSP Payload [0]
1676 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
1677 * LSB BIT 6 = Enable Out-of-Order frame handling
1678 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
1695 * LSB BIT 0 = Tx Sensitivity 1G bit 0
1696 * LSB BIT 1 = Tx Sensitivity 1G bit 1
1697 * LSB BIT 2 = Tx Sensitivity 1G bit 2
1698 * LSB BIT 3 = Tx Sensitivity 1G bit 3
1699 * LSB BIT 4 = Rx Sensitivity 1G bit 0
1700 * LSB BIT 5 = Rx Sensitivity 1G bit 1
1701 * LSB BIT 6 = Rx Sensitivity 1G bit 2
1702 * LSB BIT 7 = Rx Sensitivity 1G bit 3
1713 * LSB BIT 0 = Output Swing 1G bit 0
1714 * LSB BIT 1 = Output Swing 1G bit 1
1715 * LSB BIT 2 = Output Swing 1G bit 2
1716 * LSB BIT 3 = Output Emphasis 1G bit 0
1717 * LSB BIT 4 = Output Emphasis 1G bit 1
1718 * LSB BIT 5 = Output Swing 2G bit 0
1719 * LSB BIT 6 = Output Swing 2G bit 1
1720 * LSB BIT 7 = Output Swing 2G bit 2
1736 * LSB BIT 0 = Enable spinup delay
1737 * LSB BIT 1 = Disable BIOS
1738 * LSB BIT 2 = Enable Memory Map BIOS
1739 * LSB BIT 3 = Enable Selectable Boot
1740 * LSB BIT 4 = Disable RISC code load
1741 * LSB BIT 5 = Set cache line size 1
1742 * LSB BIT 6 = PCI Parity Disable
1743 * LSB BIT 7 = Enable extended logging
1808 * LSB BIT 0 = External GBIC
1809 * LSB BIT 1 = Risc RAM parity
1810 * LSB BIT 2 = Buffer Plus Module
1811 * LSB BIT 3 = Multi Chip Adapter
1812 * LSB BIT 4 = Internal connector
1813 * LSB BIT 5 =
1814 * LSB BIT 6 =
1815 * LSB BIT 7 =