83 	u32 reg_val;  in mtk_spi_slave_disable_dma()  local
85 	reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_disable_dma()
86 	reg_val &= ~RX_DMA_EN;  in mtk_spi_slave_disable_dma()
87 	reg_val &= ~TX_DMA_EN;  in mtk_spi_slave_disable_dma()
88 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_disable_dma()
93 	u32 reg_val;  in mtk_spi_slave_disable_xfer()  local
95 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_disable_xfer()
96 	reg_val &= ~SPIS_TX_EN;  in mtk_spi_slave_disable_xfer()
97 	reg_val &= ~SPIS_RX_EN;  in mtk_spi_slave_disable_xfer()
98 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_disable_xfer()
118 	u32 reg_val;  in mtk_spi_slave_prepare_message()  local
123 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_prepare_message()
125 		reg_val |= SPIS_CPHA;  in mtk_spi_slave_prepare_message()
127 		reg_val &= ~SPIS_CPHA;  in mtk_spi_slave_prepare_message()
129 		reg_val |= SPIS_CPOL;  in mtk_spi_slave_prepare_message()
131 		reg_val &= ~SPIS_CPOL;  in mtk_spi_slave_prepare_message()
134 		reg_val &= ~(SPIS_TXMSBF | SPIS_RXMSBF);  in mtk_spi_slave_prepare_message()
136 		reg_val |= SPIS_TXMSBF | SPIS_RXMSBF;  in mtk_spi_slave_prepare_message()
138 	reg_val &= ~SPIS_TX_ENDIAN;  in mtk_spi_slave_prepare_message()
139 	reg_val &= ~SPIS_RX_ENDIAN;  in mtk_spi_slave_prepare_message()
140 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_prepare_message()
150 	int reg_val, cnt, remainder, ret;  in mtk_spi_slave_fifo_transfer()  local
154 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_fifo_transfer()
156 		reg_val |= SPIS_RX_EN;  in mtk_spi_slave_fifo_transfer()
158 		reg_val |= SPIS_TX_EN;  in mtk_spi_slave_fifo_transfer()
159 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_fifo_transfer()
168 		reg_val = 0;  in mtk_spi_slave_fifo_transfer()
169 		memcpy(&reg_val, xfer->tx_buf + cnt * 4, remainder);  in mtk_spi_slave_fifo_transfer()
170 		writel(reg_val, mdata->base + SPIS_TX_DATA_REG);  in mtk_spi_slave_fifo_transfer()
188 	int reg_val, ret;  in mtk_spi_slave_dma_transfer()  local
221 	reg_val = readl(mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_dma_transfer()
223 		reg_val |= SPIS_TX_EN;  in mtk_spi_slave_dma_transfer()
225 		reg_val |= SPIS_RX_EN;  in mtk_spi_slave_dma_transfer()
226 	writel(reg_val, mdata->base + SPIS_CFG_REG);  in mtk_spi_slave_dma_transfer()
229 	reg_val = 0;  in mtk_spi_slave_dma_transfer()
230 	reg_val |= (xfer->len - 1) & TX_DMA_LEN;  in mtk_spi_slave_dma_transfer()
231 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
233 	reg_val = readl(mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
235 		reg_val |= TX_DMA_EN;  in mtk_spi_slave_dma_transfer()
237 		reg_val |= RX_DMA_EN;  in mtk_spi_slave_dma_transfer()
238 	reg_val |= TX_DMA_TRIG_EN;  in mtk_spi_slave_dma_transfer()
239 	writel(reg_val, mdata->base + SPIS_DMA_CFG_REG);  in mtk_spi_slave_dma_transfer()
284 	u32 reg_val;  in mtk_spi_slave_setup()  local
286 	reg_val = DMA_DONE_EN | DATA_DONE_EN |  in mtk_spi_slave_setup()
288 	writel(reg_val, mdata->base + SPIS_IRQ_EN_REG);  in mtk_spi_slave_setup()
290 	reg_val = DMA_DONE_MASK | DATA_DONE_MASK |  in mtk_spi_slave_setup()
292 	writel(reg_val, mdata->base + SPIS_IRQ_MASK_REG);  in mtk_spi_slave_setup()
315 	u32 int_status, reg_val, cnt, remainder;  in mtk_spi_slave_interrupt()  local
348 			reg_val = readl(mdata->base + SPIS_RX_DATA_REG);  in mtk_spi_slave_interrupt()
350 			       &reg_val, remainder);  in mtk_spi_slave_interrupt()