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Lines Matching refs:xhci_base

156 	offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_LEGACY);  in xdbc_bios_handoff()
157 val = readl(xdbc.xhci_base + offset); in xdbc_bios_handoff()
160 writel(val | XHCI_HC_OS_OWNED, xdbc.xhci_base + offset); in xdbc_bios_handoff()
161 timeout = handshake(xdbc.xhci_base + offset, XHCI_HC_BIOS_OWNED, 0, 5000, 10); in xdbc_bios_handoff()
165 writel(val & ~XHCI_HC_BIOS_OWNED, xdbc.xhci_base + offset); in xdbc_bios_handoff()
170 val = readl(xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET); in xdbc_bios_handoff()
173 writel(val, xdbc.xhci_base + offset + XHCI_LEGACY_CONTROL_OFFSET); in xdbc_bios_handoff()
355 cap_length = readl(xdbc.xhci_base) & 0xff; in xdbc_do_reset_debug_port()
356 ops_reg = xdbc.xhci_base + cap_length; in xdbc_do_reset_debug_port()
373 offset = xhci_find_next_ext_cap(xdbc.xhci_base, offset, XHCI_EXT_CAPS_PROTOCOL); in xdbc_reset_debug_port()
377 val = readl(xdbc.xhci_base + offset); in xdbc_reset_debug_port()
381 val = readl(xdbc.xhci_base + offset + 8); in xdbc_reset_debug_port()
636 xdbc.xhci_base = xdbc_map_pci_mmio(bus, dev, func); in early_xdbc_parse_parameter()
637 if (!xdbc.xhci_base) in early_xdbc_parse_parameter()
641 offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_DEBUG); in early_xdbc_parse_parameter()
644 early_iounmap(xdbc.xhci_base, xdbc.xhci_length); in early_xdbc_parse_parameter()
645 xdbc.xhci_base = NULL; in early_xdbc_parse_parameter()
650 xdbc.xdbc_reg = (struct xdbc_regs __iomem *)(xdbc.xhci_base + offset); in early_xdbc_parse_parameter()
983 early_iounmap(xdbc.xhci_base, xdbc.xhci_length); in xdbc_init()
984 xdbc.xhci_base = base; in xdbc_init()
985 offset = xhci_find_next_ext_cap(xdbc.xhci_base, 0, XHCI_EXT_CAPS_DEBUG); in xdbc_init()
986 xdbc.xdbc_reg = (struct xdbc_regs __iomem *)(xdbc.xhci_base + offset); in xdbc_init()
1000 early_iounmap(xdbc.xhci_base, xdbc.xhci_length); in xdbc_init()