73 static dma_addr_t read_txq_cur_addr(void __iomem *mbase, u8 epnum)  in read_txq_cur_addr()  argument
78 	txcpr = mtu3_readl(mbase, USB_QMU_TQCPR(epnum));  in read_txq_cur_addr()
79 	txhiar = mtu3_readl(mbase, USB_QMU_TQHIAR(epnum));  in read_txq_cur_addr()
84 static dma_addr_t read_rxq_cur_addr(void __iomem *mbase, u8 epnum)  in read_rxq_cur_addr()  argument
89 	rxcpr = mtu3_readl(mbase, USB_QMU_RQCPR(epnum));  in read_rxq_cur_addr()
90 	rxhiar = mtu3_readl(mbase, USB_QMU_RQHIAR(epnum));  in read_rxq_cur_addr()
95 static void write_txq_start_addr(void __iomem *mbase, u8 epnum, dma_addr_t dma)  in write_txq_start_addr()  argument
99 	mtu3_writel(mbase, USB_QMU_TQSAR(epnum),  in write_txq_start_addr()
101 	tqhiar = mtu3_readl(mbase, USB_QMU_TQHIAR(epnum));  in write_txq_start_addr()
104 	mtu3_writel(mbase, USB_QMU_TQHIAR(epnum), tqhiar);  in write_txq_start_addr()
107 static void write_rxq_start_addr(void __iomem *mbase, u8 epnum, dma_addr_t dma)  in write_rxq_start_addr()  argument
111 	mtu3_writel(mbase, USB_QMU_RQSAR(epnum),  in write_rxq_start_addr()
113 	rqhiar = mtu3_readl(mbase, USB_QMU_RQHIAR(epnum));  in write_rxq_start_addr()
116 	mtu3_writel(mbase, USB_QMU_RQHIAR(epnum), rqhiar);  in write_rxq_start_addr()
192 	void __iomem *mbase = mtu->mac_base;  in mtu3_qmu_resume()  local
198 	mtu3_writel(mbase, offset, QMU_Q_RESUME);  in mtu3_qmu_resume()
199 	if (!(mtu3_readl(mbase, offset) & QMU_Q_ACTIVE))  in mtu3_qmu_resume()
200 		mtu3_writel(mbase, offset, QMU_Q_RESUME);  in mtu3_qmu_resume()
333 	void __iomem *mbase = mtu->mac_base;  in mtu3_qmu_start()  local
339 		write_txq_start_addr(mbase, epnum, ring->dma);  in mtu3_qmu_start()
340 		mtu3_setbits(mbase, MU3D_EP_TXCR0(epnum), TX_DMAREQEN);  in mtu3_qmu_start()
342 		mtu3_setbits(mbase, U3D_QCR1, QMU_TX_ZLP(epnum));  in mtu3_qmu_start()
343 		mtu3_writel(mbase, U3D_TQERRIESR0,  in mtu3_qmu_start()
346 		if (mtu3_readl(mbase, USB_QMU_TQCSR(epnum)) & QMU_Q_ACTIVE) {  in mtu3_qmu_start()
350 		mtu3_writel(mbase, USB_QMU_TQCSR(epnum), QMU_Q_START);  in mtu3_qmu_start()
353 		write_rxq_start_addr(mbase, epnum, ring->dma);  in mtu3_qmu_start()
354 		mtu3_setbits(mbase, MU3D_EP_RXCR0(epnum), RX_DMAREQEN);  in mtu3_qmu_start()
356 		mtu3_clrbits(mbase, U3D_QCR3, QMU_RX_ZLP(epnum));  in mtu3_qmu_start()
358 		mtu3_setbits(mbase, U3D_QCR3, QMU_RX_COZ(epnum));  in mtu3_qmu_start()
359 		mtu3_writel(mbase, U3D_RQERRIESR0,  in mtu3_qmu_start()
361 		mtu3_writel(mbase, U3D_RQERRIESR1, QMU_RX_ZLP_ERR(epnum));  in mtu3_qmu_start()
363 		if (mtu3_readl(mbase, USB_QMU_RQCSR(epnum)) & QMU_Q_ACTIVE) {  in mtu3_qmu_start()
367 		mtu3_writel(mbase, USB_QMU_RQCSR(epnum), QMU_Q_START);  in mtu3_qmu_start()
377 	void __iomem *mbase = mtu->mac_base;  in mtu3_qmu_stop()  local
385 	if (!(mtu3_readl(mbase, qcsr) & QMU_Q_ACTIVE)) {  in mtu3_qmu_stop()
389 	mtu3_writel(mbase, qcsr, QMU_Q_STOP);  in mtu3_qmu_stop()
391 	ret = readl_poll_timeout_atomic(mbase + qcsr, value,  in mtu3_qmu_stop()
421 	void __iomem *mbase = mtu->mac_base;  in qmu_tx_zlp_error_handler()  local
432 	cur_gpd_dma = read_txq_cur_addr(mbase, epnum);  in qmu_tx_zlp_error_handler()
443 	mtu3_clrbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN);  in qmu_tx_zlp_error_handler()
445 	ret = readl_poll_timeout_atomic(mbase + MU3D_EP_TXCR0(mep->epnum),  in qmu_tx_zlp_error_handler()
451 	mtu3_setbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_TXPKTRDY);  in qmu_tx_zlp_error_handler()
458 	mtu3_setbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN);  in qmu_tx_zlp_error_handler()
473 	void __iomem *mbase = mtu->mac_base;  in qmu_done_tx()  local
481 	cur_gpd_dma = read_txq_cur_addr(mbase, epnum);  in qmu_done_tx()
513 	void __iomem *mbase = mtu->mac_base;  in qmu_done_rx()  local
520 	cur_gpd_dma = read_rxq_cur_addr(mbase, epnum);  in qmu_done_rx()
561 	void __iomem *mbase = mtu->mac_base;  in qmu_exception_isr()  local
566 		errval = mtu3_readl(mbase, U3D_RQERRIR0);  in qmu_exception_isr()
574 		mtu3_writel(mbase, U3D_RQERRIR0, errval);  in qmu_exception_isr()
578 		errval = mtu3_readl(mbase, U3D_RQERRIR1);  in qmu_exception_isr()
583 		mtu3_writel(mbase, U3D_RQERRIR1, errval);  in qmu_exception_isr()
587 		errval = mtu3_readl(mbase, U3D_TQERRIR0);  in qmu_exception_isr()
595 		mtu3_writel(mbase, U3D_TQERRIR0, errval);  in qmu_exception_isr()
601 	void __iomem *mbase = mtu->mac_base;  in mtu3_qmu_isr()  local
606 	qmu_status = mtu3_readl(mbase, U3D_QISAR1);  in mtu3_qmu_isr()
607 	qmu_status &= mtu3_readl(mbase, U3D_QIER1);  in mtu3_qmu_isr()
609 	qmu_done_status = mtu3_readl(mbase, U3D_QISAR0);  in mtu3_qmu_isr()
610 	qmu_done_status &= mtu3_readl(mbase, U3D_QIER0);  in mtu3_qmu_isr()
611 	mtu3_writel(mbase, U3D_QISAR0, qmu_done_status); /* W1C */  in mtu3_qmu_isr()