Lines Matching refs:musb_writel
105 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
108 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
115 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
117 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
186 musb_writel(fifo, 0, val); in tusb_fifo_write_unaligned()
195 musb_writel(fifo, 0, val); in tusb_fifo_write_unaligned()
233 musb_writel(ep_conf, TUSB_EP_TX_OFFSET, in tusb_write_fifo()
236 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_DIR_TX | in tusb_write_fifo()
259 musb_writel(fifo, 0, val); in tusb_write_fifo()
281 musb_writel(ep_conf, TUSB_EP_RX_OFFSET, in tusb_read_fifo()
284 musb_writel(ep_conf, 0, TUSB_EP0_CONFIG_XFR_SIZE(len)); in tusb_read_fifo()
352 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_draw_power()
378 musb_writel(tbase, TUSB_PRCM_CONF, reg); in tusb_set_clock_source()
401 musb_writel(tbase, TUSB_PRCM_WAKEUP_MASK, ~wakeup_enables); in tusb_allow_idle()
418 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_allow_idle()
442 musb_writel(tbase, TUSB_PRCM_MNGMT, tmp); in tusb_musb_vbus_status()
444 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm_mngmt); in tusb_musb_vbus_status()
608 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm); in tusb_musb_set_vbus()
609 musb_writel(tbase, TUSB_DEV_OTG_TIMER, timer); in tusb_musb_set_vbus()
610 musb_writel(tbase, TUSB_DEV_CONF, conf); in tusb_musb_set_vbus()
661 musb_writel(tbase, TUSB_PHY_OTG_CTRL, in tusb_musb_set_mode()
663 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, in tusb_musb_set_mode()
665 musb_writel(tbase, TUSB_DEV_CONF, dev_conf); in tusb_musb_set_mode()
829 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_interrupt()
848 musb_writel(tbase, TUSB_SCRATCH_PAD, 0); in tusb_musb_interrupt()
849 musb_writel(tbase, TUSB_SCRATCH_PAD, i); in tusb_musb_interrupt()
860 musb_writel(tbase, TUSB_PRCM_WAKEUP_CLEAR, reg); in tusb_musb_interrupt()
888 musb_writel(tbase, TUSB_DMA_INT_CLEAR, dma_src); in tusb_musb_interrupt()
895 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, musb_src); in tusb_musb_interrupt()
907 musb_writel(tbase, TUSB_INT_SRC_CLEAR, in tusb_musb_interrupt()
912 musb_writel(tbase, TUSB_INT_MASK, int_mask); in tusb_musb_interrupt()
931 musb_writel(tbase, TUSB_INT_MASK, TUSB_INT_SRC_USB_IP_SOF); in tusb_musb_enable()
934 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0); in tusb_musb_enable()
935 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_enable()
936 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_enable()
939 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
940 musb_writel(tbase, TUSB_DMA_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
941 musb_writel(tbase, TUSB_GPIO_INT_CLEAR, 0x1ff); in tusb_musb_enable()
944 musb_writel(tbase, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_enable()
948 musb_writel(tbase, TUSB_INT_CTRL_CONF, in tusb_musb_enable()
956 musb_writel(tbase, TUSB_INT_SRC_SET, in tusb_musb_enable()
976 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_disable()
977 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0x7fffffff); in tusb_musb_disable()
978 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_disable()
979 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_disable()
1002 musb_writel(tbase, TUSB_PULLUP_1_CTRL, 0x0000003F); in tusb_setup_cpu_interface()
1005 musb_writel(tbase, TUSB_PULLUP_2_CTRL, 0x01FFFFFF); in tusb_setup_cpu_interface()
1008 musb_writel(tbase, TUSB_GPIO_CONF, TUSB_GPIO_CONF_DMAREQ(0x3f)); in tusb_setup_cpu_interface()
1012 musb_writel(tbase, TUSB_DMA_REQ_CONF, in tusb_setup_cpu_interface()
1018 musb_writel(tbase, TUSB_WAIT_COUNT, 1); in tusb_setup_cpu_interface()
1053 musb_writel(tbase, TUSB_VLYNQ_CTRL, 8); in tusb_musb_start()
1061 musb_writel(tbase, TUSB_PRCM_MNGMT, in tusb_musb_start()
1072 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, reg); in tusb_musb_start()
1076 musb_writel(tbase, TUSB_PHY_OTG_CTRL, reg); in tusb_musb_start()