1 // SPDX-License-Identifier: GPL-2.0+
5  * Copyright (C) 2007-2017 Cavium, Inc.
11  *	(c) Copyright 1996-1997 Alan Cox <alan@lxorguk.ukuu.org.uk>,
16  *	"AS-IS" and at no charge.
39  * A watchdog is maintained for each CPU in the system, that way if
40  * one CPU suffers a lockup, we also get a register dump and reset.
55 #include <linux/cpu.h>
62 #include <asm/octeon/cvmx-boot-vector.h>
63 #include <asm/octeon/cvmx-ciu2-defs.h>
64 #include <asm/octeon/cvmx-rst-defs.h>
80 /* Set to non-zero when userspace countdown mode active */
112 static int cpu2core(int cpu)  in cpu2core()  argument
115 	return cpu_logical_map(cpu) & 0x3f;  in cpu2core()
131 	int cpu = raw_smp_processor_id();  in octeon_wdt_poke_irq()  local
132 	unsigned int core = cpu2core(cpu);  in octeon_wdt_poke_irq()  local
133 	int node = cpu_to_node(cpu);  in octeon_wdt_poke_irq()
136 		if (per_cpu_countdown[cpu] > 0) {  in octeon_wdt_poke_irq()
138 			cvmx_write_csr_node(node, CVMX_CIU_PP_POKEX(core), 1);  in octeon_wdt_poke_irq()
139 			per_cpu_countdown[cpu]--;  in octeon_wdt_poke_irq()
143 			cpumask_clear_cpu(cpu, &irq_enabled_cpus);  in octeon_wdt_poke_irq()
147 		cvmx_write_csr_node(node, CVMX_CIU_PP_POKEX(core), 1);  in octeon_wdt_poke_irq()
179 		v = (value >> ((digits - d - 1) * 4)) & 0xf;  in octeon_wdt_write_hex()
181 			prom_putchar('a' + v - 10);  in octeon_wdt_write_hex()
224 	octeon_wdt_write_string("\r\n*** NMI Watchdog interrupt on Core 0x");  in octeon_wdt_nmi_stage3()
274 	 * G-30204: We must trigger a soft reset before watchdog  in octeon_wdt_nmi_stage3()
299 static int octeon_wdt_cpu_to_irq(int cpu)  in octeon_wdt_cpu_to_irq()  argument
305 	coreid = cpu2core(cpu);  in octeon_wdt_cpu_to_irq()
306 	node = cpu_to_node(cpu);  in octeon_wdt_cpu_to_irq()
322 static int octeon_wdt_cpu_pre_down(unsigned int cpu)  in octeon_wdt_cpu_pre_down()  argument
324 	unsigned int core;  in octeon_wdt_cpu_pre_down()  local
328 	core = cpu2core(cpu);  in octeon_wdt_cpu_pre_down()
330 	node = cpu_to_node(cpu);  in octeon_wdt_cpu_pre_down()
333 	cvmx_write_csr_node(node, CVMX_CIU_PP_POKEX(core), 1);  in octeon_wdt_cpu_pre_down()
337 	cvmx_write_csr_node(node, CVMX_CIU_WDOGX(core), ciu_wdog.u64);  in octeon_wdt_cpu_pre_down()
339 	free_irq(octeon_wdt_cpu_to_irq(cpu), octeon_wdt_poke_irq);  in octeon_wdt_cpu_pre_down()
343 static int octeon_wdt_cpu_online(unsigned int cpu)  in octeon_wdt_cpu_online()  argument
345 	unsigned int core;  in octeon_wdt_cpu_online()  local
352 	core = cpu2core(cpu);  in octeon_wdt_cpu_online()
353 	node = cpu_to_node(cpu);  in octeon_wdt_cpu_online()
355 	octeon_wdt_bootvector[core].target_ptr = (u64)octeon_wdt_nmi_stage2;  in octeon_wdt_cpu_online()
359 	cvmx_write_csr_node(node, CVMX_CIU_WDOGX(core), ciu_wdog.u64);  in octeon_wdt_cpu_online()
361 	per_cpu_countdown[cpu] = countdown_reset;  in octeon_wdt_cpu_online()
368 		hwirq = WD_BLOCK_NUMBER << 12 | 0x200 | core;  in octeon_wdt_cpu_online()
373 		irq = OCTEON_IRQ_WDOG0 + core;  in octeon_wdt_cpu_online()
384 		cpumask_set_cpu(cpu, &mask);  in octeon_wdt_cpu_online()
388 	cpumask_set_cpu(cpu, &irq_enabled_cpus);  in octeon_wdt_cpu_online()
391 	cvmx_write_csr_node(node, CVMX_CIU_PP_POKEX(core), 1);  in octeon_wdt_cpu_online()
396 	ciu_wdog.s.mode = 3;	/* 3 = Interrupt + NMI + Soft-Reset */  in octeon_wdt_cpu_online()
397 	cvmx_write_csr_node(node, CVMX_CIU_WDOGX(core), ciu_wdog.u64);  in octeon_wdt_cpu_online()
404 	int cpu;  in octeon_wdt_ping()  local
411 	for_each_online_cpu(cpu) {  in octeon_wdt_ping()
412 		coreid = cpu2core(cpu);  in octeon_wdt_ping()
413 		node = cpu_to_node(cpu);  in octeon_wdt_ping()
415 		per_cpu_countdown[cpu] = countdown_reset;  in octeon_wdt_ping()
417 		    !cpumask_test_cpu(cpu, &irq_enabled_cpus)) {  in octeon_wdt_ping()
419 			enable_irq(octeon_wdt_cpu_to_irq(cpu));  in octeon_wdt_ping()
420 			cpumask_set_cpu(cpu, &irq_enabled_cpus);  in octeon_wdt_ping()
438 		timeout_sec--;  in octeon_wdt_calc_parameters()
447 	countdown_reset = periods > 2 ? periods - 2 : 0;  in octeon_wdt_calc_parameters()
455 	int cpu;  in octeon_wdt_set_timeout()  local
461 		return -1;  in octeon_wdt_set_timeout()
468 	for_each_online_cpu(cpu) {  in octeon_wdt_set_timeout()
469 		coreid = cpu2core(cpu);  in octeon_wdt_set_timeout()
470 		node = cpu_to_node(cpu);  in octeon_wdt_set_timeout()
474 		ciu_wdog.s.mode = 3;	/* 3 = Interrupt + NMI + Soft-Reset */  in octeon_wdt_set_timeout()
527 		return -ENOMEM;  in octeon_wdt_init()
547 		max_timeout_sec--;  in octeon_wdt_init()
600 	 * Disable the boot-bus memory, the code it points to is soon  in octeon_wdt_cleanup()