166 	     timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);  in snd_wss_wait()
177 	     timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);  in snd_wss_dout()
180 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);  in snd_wss_dout()
181 	wss_outb(chip, CS4231P(REG), value);  in snd_wss_dout()
189 	if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)  in snd_wss_out()
193 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);  in snd_wss_out()
194 	wss_outb(chip, CS4231P(REG), value);  in snd_wss_out()
206 	if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)  in snd_wss_in()
210 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);  in snd_wss_in()
212 	return wss_inb(chip, CS4231P(REG));  in snd_wss_in()
219 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);  in snd_cs4236_ext_out()
220 	wss_outb(chip, CS4231P(REG),  in snd_cs4236_ext_out()
222 	wss_outb(chip, CS4231P(REG), val);  in snd_cs4236_ext_out()
232 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);  in snd_cs4236_ext_in()
233 	wss_outb(chip, CS4231P(REG),  in snd_cs4236_ext_in()
236 	return wss_inb(chip, CS4231P(REG));  in snd_cs4236_ext_in()
240 		res = wss_inb(chip, CS4231P(REG));  in snd_cs4236_ext_in()
256 					wss_inb(chip, CS4231P(REGSEL)),
257 					wss_inb(chip, CS4231P(STATUS)));
352 		wss_inb(chip, CS4231P(REGSEL));  in snd_wss_busy_wait()
355 	     timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);  in snd_wss_busy_wait()
367 	if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)  in snd_wss_mce_up()
373 	timeout = wss_inb(chip, CS4231P(REGSEL));  in snd_wss_mce_up()
379 		wss_outb(chip, CS4231P(REGSEL),  in snd_wss_mce_up()
395 	if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)  in snd_wss_mce_down()
398 			   (long)CS4231P(REGSEL));  in snd_wss_mce_down()
402 	timeout = wss_inb(chip, CS4231P(REGSEL));  in snd_wss_mce_down()
403 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));  in snd_wss_mce_down()
438 	while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {  in snd_wss_mce_down()
447 	snd_printd("mce_down - exit = 0x%x\n", wss_inb(chip, CS4231P(REGSEL)));  in snd_wss_mce_down()
882 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_open()
883 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_open()
914 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_close()
915 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_close()
938 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_close()
939 	wss_outb(chip, CS4231P(STATUS), 0);	/* clear IRQ */  in snd_wss_close()
1116 		wss_outb(chip, CS4231P(STATUS), 0);  in snd_wss_interrupt()
1159 	while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {  in snd_ad1848_probe()
1189 	wss_inb(chip, CS4231P(STATUS));  in snd_ad1848_probe()
1190 	wss_outb(chip, CS4231P(STATUS), 0);  in snd_ad1848_probe()
1247 			if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)  in snd_wss_probe()
1289 	wss_inb(chip, CS4231P(STATUS));	/* clear any pendings IRQ */  in snd_wss_probe()
1290 	wss_outb(chip, CS4231P(STATUS), 0);  in snd_wss_probe()
1641 	timeout = wss_inb(chip, CS4231P(REGSEL));  in snd_wss_resume()
1642 	wss_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));  in snd_wss_resume()