Lines Matching refs:rsrc1
1691 config_out->rsrc1 = S_00B848_VGPRS((num_vgprs - 1) / (info->wave_size == 32 ? 8 : 4)) | in radv_postprocess_config()
1697 config_out->rsrc1 |= S_00B228_SGPRS((num_sgprs - 1) / 8); in radv_postprocess_config()
1706 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1717 config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1744 config_out->rsrc1 |= in radv_postprocess_config()
1750 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1777 config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1783 config_out->rsrc1 |= S_00B228_MEM_ORDERED(1); in radv_postprocess_config()
1788 config_out->rsrc1 |= S_00B028_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1793 config_out->rsrc1 |= S_00B228_MEM_ORDERED(pdevice->rad_info.gfx_level >= GFX10); in radv_postprocess_config()
1799 config_out->rsrc1 |= in radv_postprocess_config()
1866 config_out->rsrc1 |= in radv_postprocess_config()
1901 config_out->rsrc1 |= in radv_postprocess_config()
1906 config_out->rsrc1 |= S_00B428_LS_VGPR_COMP_CNT(vgpr_comp_cnt); in radv_postprocess_config()
1908 config_out->rsrc1 |= S_00B128_VGPR_COMP_CNT(vgpr_comp_cnt); in radv_postprocess_config()
2387 shader_part->rsrc1 = S_00B848_VGPRS((bin->num_vgprs - 1) / (wave_size == 32 ? 8 : 4)) |