Lines Matching refs:prog_data
1276 struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); in emit_samplepos_setup()
1427 struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); in emit_samplemaskin_setup()
1523 struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); in emit_gs_thread_end()
1577 prog_data->curb_read_length = uniform_push_length + ubo_push_length; in assign_curb_setup()
1582 if (is_compute && brw_cs_prog_data(prog_data)->uses_inline_data) { in assign_curb_setup()
1723 assert(i < prog_data->curb_read_length); in assign_curb_setup()
1736 this->first_non_payload_grf = payload.num_regs + prog_data->curb_read_length; in assign_curb_setup()
1766 struct brw_wm_prog_data *prog_data, in calculate_urb_setup() argument
1770 memset(prog_data->urb_setup, -1, in calculate_urb_setup()
1771 sizeof(prog_data->urb_setup[0]) * VARYING_SLOT_MAX); in calculate_urb_setup()
1802 prog_data->urb_setup[VARYING_SLOT_PRIMITIVE_SHADING_RATE] = 0; in calculate_urb_setup()
1805 prog_data->urb_setup[VARYING_SLOT_LAYER] = 0; in calculate_urb_setup()
1808 prog_data->urb_setup[VARYING_SLOT_VIEWPORT] = 0; in calculate_urb_setup()
1821 prog_data->urb_setup[i] = urb_next++; in calculate_urb_setup()
1828 prog_data->num_per_primitive_inputs = urb_next; in calculate_urb_setup()
1845 prog_data->urb_setup[VARYING_SLOT_CLIP_DIST0] = urb_next++; in calculate_urb_setup()
1846 prog_data->urb_setup[VARYING_SLOT_CLIP_DIST1] = urb_next++; in calculate_urb_setup()
1854 prog_data->urb_setup[i] = urb_next++; in calculate_urb_setup()
1884 prog_data->urb_setup[VARYING_SLOT_PSIZ] = urb_next; in calculate_urb_setup()
1886 prog_data->urb_setup[VARYING_SLOT_LAYER] = urb_next; in calculate_urb_setup()
1888 prog_data->urb_setup[VARYING_SLOT_VIEWPORT] = urb_next; in calculate_urb_setup()
1896 prog_data->urb_setup[i] = urb_next++; in calculate_urb_setup()
1926 prog_data->urb_setup[varying] = slot - first_slot; in calculate_urb_setup()
1946 prog_data->urb_setup[i] = urb_next; in calculate_urb_setup()
1958 prog_data->urb_setup[VARYING_SLOT_PNTC] = urb_next++; in calculate_urb_setup()
1961 prog_data->num_varying_inputs = urb_next - prog_data->num_per_primitive_inputs; in calculate_urb_setup()
1962 prog_data->inputs = inputs_read; in calculate_urb_setup()
1964 brw_compute_urb_setup_index(prog_data); in calculate_urb_setup()
1971 struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); in assign_urb_setup() local
1973 int urb_start = payload.num_regs + prog_data->base.curb_read_length; in assign_urb_setup()
2003 this->first_non_payload_grf += prog_data->num_varying_inputs * 2; in assign_urb_setup()
2008 assert(prog_data->num_per_primitive_inputs % 2 == 0); in assign_urb_setup()
2009 this->first_non_payload_grf += prog_data->num_per_primitive_inputs / 2; in assign_urb_setup()
2018 prog_data->curb_read_length + in convert_attr_sources_to_hw_regs()
2056 struct brw_vs_prog_data *vs_prog_data = brw_vs_prog_data(prog_data); in assign_vs_urb_setup()
2087 struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); in assign_tes_urb_setup()
2102 struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); in assign_gs_urb_setup()
2390 const brw_stage_prog_data *prog_data) in get_subgroup_id_param_index() argument
2392 if (prog_data->nr_params == 0) in get_subgroup_id_param_index()
2399 uint32_t last_param = prog_data->param[prog_data->nr_params - 1]; in get_subgroup_id_param_index()
2401 return prog_data->nr_params - 1; in get_subgroup_id_param_index()
2438 struct brw_ubo_range *range = &prog_data->ubo_ranges[i]; in assign_constant_locations()
2459 &prog_data->ubo_ranges[src.nr - UBO_START]; in get_pull_locs()
2468 prog_data->has_ubo_pull = true; in get_pull_locs()
4394 const struct brw_wm_prog_data *prog_data) in brw_fb_write_msg_control() argument
4401 } else if (prog_data->dual_src_blend) { in brw_fb_write_msg_control()
5873 struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); in setup_fs_payload_gfx6() local
5895 if (prog_data->barycentric_interp_modes & (1 << i)) { in setup_fs_payload_gfx6()
5902 if (prog_data->uses_src_depth) { in setup_fs_payload_gfx6()
5908 if (prog_data->uses_src_w) { in setup_fs_payload_gfx6()
5914 if (prog_data->uses_pos_offset) { in setup_fs_payload_gfx6()
5920 if (prog_data->uses_sample_mask) { in setup_fs_payload_gfx6()
5927 if (prog_data->uses_depth_w_coefficients) { in setup_fs_payload_gfx6()
5950 struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); in setup_gs_payload()
5951 struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); in setup_gs_payload()
5993 payload.num_regs = 1 + brw_cs_prog_data(prog_data)->uses_btd_stack_ids; in setup_cs_payload()
6589 prog_data->total_scratch = MAX2(brw_get_scratch_size(last_scratch), in allocate_registers()
6590 prog_data->total_scratch); in allocate_registers()
6599 prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048); in allocate_registers()
6605 prog_data->total_scratch = ALIGN(last_scratch, 1024); in allocate_registers()
6620 assert(prog_data->total_scratch < max_scratch_size); in allocate_registers()
6657 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in set_tcs_invocation_id()
6706 struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); in run_tcs()
6707 struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); in run_tcs()
6876 struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); in run_fs()
6956 if (devinfo->platform == INTEL_PLATFORM_HSW && prog_data->total_shared > 0) { in run_cs()
7179 brw_compute_flat_inputs(struct brw_wm_prog_data *prog_data, in brw_compute_flat_inputs() argument
7182 prog_data->flat_inputs = 0; in brw_compute_flat_inputs()
7194 int input_index = prog_data->urb_setup[var->data.location + s]; in brw_compute_flat_inputs()
7197 prog_data->flat_inputs |= 1 << input_index; in brw_compute_flat_inputs()
7300 struct brw_wm_prog_data *prog_data, in brw_nir_populate_wm_prog_data() argument
7306 prog_data->uses_kill = shader->info.fs.uses_discard || in brw_nir_populate_wm_prog_data()
7309 prog_data->uses_omask = !key->ignore_sample_mask_out && in brw_nir_populate_wm_prog_data()
7311 prog_data->color_outputs_written = key->color_outputs_valid; in brw_nir_populate_wm_prog_data()
7312 prog_data->computed_depth_mode = computed_depth_mode(shader); in brw_nir_populate_wm_prog_data()
7313 prog_data->computed_stencil = in brw_nir_populate_wm_prog_data()
7316 prog_data->persample_dispatch = in brw_nir_populate_wm_prog_data()
7322 prog_data->uses_sample_mask = in brw_nir_populate_wm_prog_data()
7334 prog_data->uses_pos_offset = prog_data->persample_dispatch && in brw_nir_populate_wm_prog_data()
7341 prog_data->has_render_target_reads = shader->info.outputs_read != 0ull; in brw_nir_populate_wm_prog_data()
7343 prog_data->early_fragment_tests = shader->info.fs.early_fragment_tests; in brw_nir_populate_wm_prog_data()
7344 prog_data->post_depth_coverage = shader->info.fs.post_depth_coverage; in brw_nir_populate_wm_prog_data()
7345 prog_data->inner_coverage = shader->info.fs.inner_coverage; in brw_nir_populate_wm_prog_data()
7347 prog_data->barycentric_interp_modes = in brw_nir_populate_wm_prog_data()
7349 prog_data->uses_nonperspective_interp_modes |= in brw_nir_populate_wm_prog_data()
7350 (prog_data->barycentric_interp_modes & in brw_nir_populate_wm_prog_data()
7355 prog_data->per_coarse_pixel_dispatch = in brw_nir_populate_wm_prog_data()
7358 !prog_data->uses_omask && in brw_nir_populate_wm_prog_data()
7359 !prog_data->uses_sample_mask && in brw_nir_populate_wm_prog_data()
7360 (prog_data->computed_depth_mode == BRW_PSCDEPTH_OFF) && in brw_nir_populate_wm_prog_data()
7361 !prog_data->computed_stencil; in brw_nir_populate_wm_prog_data()
7366 prog_data->uses_vmask = devinfo->verx10 < 125 || in brw_nir_populate_wm_prog_data()
7369 prog_data->per_coarse_pixel_dispatch; in brw_nir_populate_wm_prog_data()
7371 prog_data->uses_src_w = in brw_nir_populate_wm_prog_data()
7373 prog_data->uses_src_depth = in brw_nir_populate_wm_prog_data()
7375 !prog_data->per_coarse_pixel_dispatch; in brw_nir_populate_wm_prog_data()
7376 prog_data->uses_depth_w_coefficients = in brw_nir_populate_wm_prog_data()
7378 prog_data->per_coarse_pixel_dispatch; in brw_nir_populate_wm_prog_data()
7380 calculate_urb_setup(devinfo, key, prog_data, shader, mue_map); in brw_nir_populate_wm_prog_data()
7381 brw_compute_flat_inputs(prog_data, shader); in brw_nir_populate_wm_prog_data()
7402 struct brw_wm_prog_data *prog_data = params->prog_data; in brw_compile_fs() local
7407 prog_data->base.stage = MESA_SHADER_FRAGMENT; in brw_compile_fs()
7408 prog_data->base.ray_queries = nir->info.ray_queries; in brw_compile_fs()
7409 prog_data->base.total_scratch = 0; in brw_compile_fs()
7419 brw_setup_vue_interpolation(params->vue_map, nir, prog_data); in brw_compile_fs()
7438 brw_nir_populate_wm_prog_data(nir, compiler->devinfo, key, prog_data, in brw_compile_fs()
7447 &prog_data->base, nir, 8, in brw_compile_fs()
7455 prog_data->base.dispatch_grf_start_reg = v8->payload.num_regs; in brw_compile_fs()
7456 prog_data->reg_blocks_8 = brw_register_blocks(v8->grf_used); in brw_compile_fs()
7466 if (devinfo->ver == 8 && prog_data->dual_src_blend && in brw_compile_fs()
7474 if (prog_data->dual_src_blend) { in brw_compile_fs()
7490 &prog_data->base, nir, 16, in brw_compile_fs()
7499 prog_data->dispatch_grf_start_reg_16 = v16->payload.num_regs; in brw_compile_fs()
7500 prog_data->reg_blocks_16 = brw_register_blocks(v16->grf_used); in brw_compile_fs()
7517 &prog_data->base, nir, 32, in brw_compile_fs()
7532 prog_data->dispatch_grf_start_reg_32 = v32->payload.num_regs; in brw_compile_fs()
7533 prog_data->reg_blocks_32 = brw_register_blocks(v32->grf_used); in brw_compile_fs()
7557 prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF) in brw_compile_fs()
7565 prog_data->base.dispatch_grf_start_reg = in brw_compile_fs()
7566 prog_data->dispatch_grf_start_reg_16; in brw_compile_fs()
7568 prog_data->base.dispatch_grf_start_reg = in brw_compile_fs()
7569 prog_data->dispatch_grf_start_reg_32; in brw_compile_fs()
7573 if (prog_data->persample_dispatch) { in brw_compile_fs()
7593 fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, in brw_compile_fs()
7606 prog_data->dispatch_8 = true; in brw_compile_fs()
7613 prog_data->dispatch_16 = true; in brw_compile_fs()
7614 prog_data->prog_offset_16 = g.generate_code( in brw_compile_fs()
7621 prog_data->dispatch_32 = true; in brw_compile_fs()
7622 prog_data->prog_offset_32 = g.generate_code( in brw_compile_fs()
7683 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; in cs_fill_push_const_info() local
7684 int subgroup_id_index = get_subgroup_id_param_index(devinfo, prog_data); in cs_fill_push_const_info()
7689 subgroup_id_index == (int)prog_data->nr_params - 1); in cs_fill_push_const_info()
7694 per_thread_dwords = prog_data->nr_params; in cs_fill_push_const_info()
7698 per_thread_dwords = prog_data->nr_params - cross_thread_dwords; in cs_fill_push_const_info()
7702 cross_thread_dwords = prog_data->nr_params; in cs_fill_push_const_info()
7713 prog_data->nr_params); in cs_fill_push_const_info()
7773 struct brw_cs_prog_data *prog_data = params->prog_data; in brw_compile_cs() local
7778 prog_data->base.stage = MESA_SHADER_COMPUTE; in brw_compile_cs()
7779 prog_data->base.total_shared = nir->info.shared_size; in brw_compile_cs()
7780 prog_data->base.ray_queries = nir->info.ray_queries; in brw_compile_cs()
7781 prog_data->base.total_scratch = 0; in brw_compile_cs()
7784 prog_data->local_size[0] = nir->info.workgroup_size[0]; in brw_compile_cs()
7785 prog_data->local_size[1] = nir->info.workgroup_size[1]; in brw_compile_cs()
7786 prog_data->local_size[2] = nir->info.workgroup_size[2]; in brw_compile_cs()
7796 if (!brw_simd_should_compile(mem_ctx, simd, compiler->devinfo, prog_data, in brw_compile_cs()
7816 &prog_data->base, shader, dispatch_width, in brw_compile_cs()
7819 if (prog_data->prog_mask) { in brw_compile_cs()
7820 unsigned first = ffs(prog_data->prog_mask) - 1; in brw_compile_cs()
7824 const bool allow_spilling = !prog_data->prog_mask || in brw_compile_cs()
7831 cs_fill_push_const_info(compiler->devinfo, prog_data); in brw_compile_cs()
7833 brw_simd_mark_compiled(simd, prog_data, v[simd]->spilled_any_registers); in brw_compile_cs()
7844 const int selected_simd = brw_simd_select(prog_data); in brw_compile_cs()
7855 prog_data->prog_mask = 1 << selected_simd; in brw_compile_cs()
7859 fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, in brw_compile_cs()
7871 if (prog_data->prog_mask & (1u << simd)) { in brw_compile_cs()
7873 prog_data->prog_offset[simd] = in brw_compile_cs()
7893 const struct brw_cs_prog_data *prog_data, in brw_cs_get_dispatch_info() argument
7900 prog_data->local_size; in brw_cs_get_dispatch_info()
7903 override_local_size ? brw_simd_select_for_workgroup_size(devinfo, prog_data, sizes) : in brw_cs_get_dispatch_info()
7904 brw_simd_select(prog_data); in brw_cs_get_dispatch_info()
7924 struct brw_bs_prog_data *prog_data, in compile_single_bs() argument
7933 prog_data->base.stage = shader->info.stage; in compile_single_bs()
7934 prog_data->max_stack_size = MAX2(prog_data->max_stack_size, in compile_single_bs()
7948 &prog_data->base, shader, in compile_single_bs()
7966 &prog_data->base, shader, in compile_single_bs()
8034 struct brw_bs_prog_data *prog_data = params->prog_data; in brw_compile_bs() local
8039 prog_data->base.stage = shader->info.stage; in brw_compile_bs()
8040 prog_data->base.ray_queries = shader->info.ray_queries; in brw_compile_bs()
8041 prog_data->base.total_scratch = 0; in brw_compile_bs()
8043 prog_data->max_stack_size = 0; in brw_compile_bs()
8045 fs_generator g(compiler, params->log_data, mem_ctx, &prog_data->base, in brw_compile_bs()
8056 prog_data->simd_size = in brw_compile_bs()
8058 params->key, prog_data, in brw_compile_bs()
8060 if (prog_data->simd_size == 0) in brw_compile_bs()
8078 prog_data, resume_shaders[i], &g, NULL, &offset, in brw_compile_bs()
8140 const struct brw_cs_prog_data *cs = brw_cs_prog_data(prog_data); in workgroup_size()