1 /* 2 * Copyright 2019-2021 The OpenSSL Project Authors. All Rights Reserved. 3 * 4 * Licensed under the Apache License 2.0 (the "License"). You may not use 5 * this file except in compliance with the License. You can obtain a copy 6 * in the file LICENSE in the source distribution or at 7 * https://www.openssl.org/source/license.html 8 */ 9 10 #ifndef OSSL_AES_PLATFORM_H 11 # define OSSL_AES_PLATFORM_H 12 # pragma once 13 14 # include <openssl/aes.h> 15 16 # ifdef VPAES_ASM 17 int vpaes_set_encrypt_key(const unsigned char *userKey, int bits, 18 AES_KEY *key); 19 int vpaes_set_decrypt_key(const unsigned char *userKey, int bits, 20 AES_KEY *key); 21 void vpaes_encrypt(const unsigned char *in, unsigned char *out, 22 const AES_KEY *key); 23 void vpaes_decrypt(const unsigned char *in, unsigned char *out, 24 const AES_KEY *key); 25 void vpaes_cbc_encrypt(const unsigned char *in, 26 unsigned char *out, 27 size_t length, 28 const AES_KEY *key, unsigned char *ivec, int enc); 29 # endif /* VPAES_ASM */ 30 31 # ifdef BSAES_ASM 32 void ossl_bsaes_cbc_encrypt(const unsigned char *in, unsigned char *out, 33 size_t length, const AES_KEY *key, 34 unsigned char ivec[16], int enc); 35 void ossl_bsaes_ctr32_encrypt_blocks(const unsigned char *in, 36 unsigned char *out, size_t len, 37 const AES_KEY *key, 38 const unsigned char ivec[16]); 39 void ossl_bsaes_xts_encrypt(const unsigned char *inp, unsigned char *out, 40 size_t len, const AES_KEY *key1, 41 const AES_KEY *key2, const unsigned char iv[16]); 42 void ossl_bsaes_xts_decrypt(const unsigned char *inp, unsigned char *out, 43 size_t len, const AES_KEY *key1, 44 const AES_KEY *key2, const unsigned char iv[16]); 45 # endif /* BSAES_ASM */ 46 47 # ifdef AES_CTR_ASM 48 void AES_ctr32_encrypt(const unsigned char *in, unsigned char *out, 49 size_t blocks, const AES_KEY *key, 50 const unsigned char ivec[AES_BLOCK_SIZE]); 51 # endif /* AES_CTR_ASM */ 52 53 # ifdef AES_XTS_ASM 54 void AES_xts_encrypt(const unsigned char *inp, unsigned char *out, size_t len, 55 const AES_KEY *key1, const AES_KEY *key2, 56 const unsigned char iv[16]); 57 void AES_xts_decrypt(const unsigned char *inp, unsigned char *out, size_t len, 58 const AES_KEY *key1, const AES_KEY *key2, 59 const unsigned char iv[16]); 60 # endif /* AES_XTS_ASM */ 61 62 # if defined(OPENSSL_CPUID_OBJ) 63 # if (defined(__powerpc__) || defined(__ppc__) || defined(_ARCH_PPC)) 64 # include "crypto/ppc_arch.h" 65 # ifdef VPAES_ASM 66 # define VPAES_CAPABLE (OPENSSL_ppccap_P & PPC_ALTIVEC) 67 # endif 68 # define HWAES_CAPABLE (OPENSSL_ppccap_P & PPC_CRYPTO207) 69 # define HWAES_set_encrypt_key aes_p8_set_encrypt_key 70 # define HWAES_set_decrypt_key aes_p8_set_decrypt_key 71 # define HWAES_encrypt aes_p8_encrypt 72 # define HWAES_decrypt aes_p8_decrypt 73 # define HWAES_cbc_encrypt aes_p8_cbc_encrypt 74 # define HWAES_ctr32_encrypt_blocks aes_p8_ctr32_encrypt_blocks 75 # define HWAES_xts_encrypt aes_p8_xts_encrypt 76 # define HWAES_xts_decrypt aes_p8_xts_decrypt 77 # endif /* PPC */ 78 79 # if (defined(__arm__) || defined(__arm) || defined(__aarch64__)) 80 # include "arm_arch.h" 81 # if __ARM_MAX_ARCH__>=7 82 # if defined(BSAES_ASM) 83 # define BSAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON) 84 # endif 85 # if defined(VPAES_ASM) 86 # define VPAES_CAPABLE (OPENSSL_armcap_P & ARMV7_NEON) 87 # endif 88 # define HWAES_CAPABLE (OPENSSL_armcap_P & ARMV8_AES) 89 # define HWAES_set_encrypt_key aes_v8_set_encrypt_key 90 # define HWAES_set_decrypt_key aes_v8_set_decrypt_key 91 # define HWAES_encrypt aes_v8_encrypt 92 # define HWAES_decrypt aes_v8_decrypt 93 # define HWAES_cbc_encrypt aes_v8_cbc_encrypt 94 # define HWAES_ecb_encrypt aes_v8_ecb_encrypt 95 # if __ARM_MAX_ARCH__>=8 && defined(__aarch64__) 96 # define HWAES_xts_encrypt aes_v8_xts_encrypt 97 # define HWAES_xts_decrypt aes_v8_xts_decrypt 98 # endif 99 # define HWAES_ctr32_encrypt_blocks aes_v8_ctr32_encrypt_blocks 100 # define AES_PMULL_CAPABLE ((OPENSSL_armcap_P & ARMV8_PMULL) && (OPENSSL_armcap_P & ARMV8_AES)) 101 # define AES_GCM_ENC_BYTES 512 102 # define AES_GCM_DEC_BYTES 512 103 # if __ARM_MAX_ARCH__>=8 && defined(__aarch64__) 104 # define AES_gcm_encrypt armv8_aes_gcm_encrypt 105 # define AES_gcm_decrypt armv8_aes_gcm_decrypt 106 # define AES_GCM_ASM(gctx) ((gctx)->ctr==aes_v8_ctr32_encrypt_blocks && \ 107 (gctx)->gcm.ghash==gcm_ghash_v8) 108 size_t aes_gcm_enc_128_kernel(const uint8_t * plaintext, uint64_t plaintext_length, uint8_t * ciphertext, 109 uint64_t *Xi, unsigned char ivec[16], const void *key); 110 size_t aes_gcm_enc_192_kernel(const uint8_t * plaintext, uint64_t plaintext_length, uint8_t * ciphertext, 111 uint64_t *Xi, unsigned char ivec[16], const void *key); 112 size_t aes_gcm_enc_256_kernel(const uint8_t * plaintext, uint64_t plaintext_length, uint8_t * ciphertext, 113 uint64_t *Xi, unsigned char ivec[16], const void *key); 114 size_t aes_gcm_dec_128_kernel(const uint8_t * ciphertext, uint64_t plaintext_length, uint8_t * plaintext, 115 uint64_t *Xi, unsigned char ivec[16], const void *key); 116 size_t aes_gcm_dec_192_kernel(const uint8_t * ciphertext, uint64_t plaintext_length, uint8_t * plaintext, 117 uint64_t *Xi, unsigned char ivec[16], const void *key); 118 size_t aes_gcm_dec_256_kernel(const uint8_t * ciphertext, uint64_t plaintext_length, uint8_t * plaintext, 119 uint64_t *Xi, unsigned char ivec[16], const void *key); 120 size_t armv8_aes_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len, const void *key, 121 unsigned char ivec[16], u64 *Xi); 122 size_t armv8_aes_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len, const void *key, 123 unsigned char ivec[16], u64 *Xi); 124 void gcm_ghash_v8(u64 Xi[2],const u128 Htable[16],const u8 *inp, size_t len); 125 # endif 126 # endif 127 # endif 128 # endif /* OPENSSL_CPUID_OBJ */ 129 130 # if defined(AES_ASM) && ( \ 131 defined(__x86_64) || defined(__x86_64__) || \ 132 defined(_M_AMD64) || defined(_M_X64) ) 133 # define AES_CBC_HMAC_SHA_CAPABLE 1 134 # define AESNI_CBC_HMAC_SHA_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32))) 135 # endif 136 137 # if defined(AES_ASM) && !defined(I386_ONLY) && ( \ 138 ((defined(__i386) || defined(__i386__) || \ 139 defined(_M_IX86)) && defined(OPENSSL_IA32_SSE2))|| \ 140 defined(__x86_64) || defined(__x86_64__) || \ 141 defined(_M_AMD64) || defined(_M_X64) ) 142 143 /* AES-NI section */ 144 145 # define AESNI_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32))) 146 # ifdef VPAES_ASM 147 # define VPAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32))) 148 # endif 149 # ifdef BSAES_ASM 150 # define BSAES_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(41-32))) 151 # endif 152 153 # define AES_GCM_ENC_BYTES 32 154 # define AES_GCM_DEC_BYTES 16 155 156 int aesni_set_encrypt_key(const unsigned char *userKey, int bits, 157 AES_KEY *key); 158 int aesni_set_decrypt_key(const unsigned char *userKey, int bits, 159 AES_KEY *key); 160 161 void aesni_encrypt(const unsigned char *in, unsigned char *out, 162 const AES_KEY *key); 163 void aesni_decrypt(const unsigned char *in, unsigned char *out, 164 const AES_KEY *key); 165 166 void aesni_ecb_encrypt(const unsigned char *in, 167 unsigned char *out, 168 size_t length, const AES_KEY *key, int enc); 169 void aesni_cbc_encrypt(const unsigned char *in, 170 unsigned char *out, 171 size_t length, 172 const AES_KEY *key, unsigned char *ivec, int enc); 173 # ifndef OPENSSL_NO_OCB 174 void aesni_ocb_encrypt(const unsigned char *in, unsigned char *out, 175 size_t blocks, const void *key, 176 size_t start_block_num, 177 unsigned char offset_i[16], 178 const unsigned char L_[][16], 179 unsigned char checksum[16]); 180 void aesni_ocb_decrypt(const unsigned char *in, unsigned char *out, 181 size_t blocks, const void *key, 182 size_t start_block_num, 183 unsigned char offset_i[16], 184 const unsigned char L_[][16], 185 unsigned char checksum[16]); 186 # endif /* OPENSSL_NO_OCB */ 187 188 void aesni_ctr32_encrypt_blocks(const unsigned char *in, 189 unsigned char *out, 190 size_t blocks, 191 const void *key, const unsigned char *ivec); 192 193 void aesni_xts_encrypt(const unsigned char *in, 194 unsigned char *out, 195 size_t length, 196 const AES_KEY *key1, const AES_KEY *key2, 197 const unsigned char iv[16]); 198 199 void aesni_xts_decrypt(const unsigned char *in, 200 unsigned char *out, 201 size_t length, 202 const AES_KEY *key1, const AES_KEY *key2, 203 const unsigned char iv[16]); 204 205 void aesni_ccm64_encrypt_blocks(const unsigned char *in, 206 unsigned char *out, 207 size_t blocks, 208 const void *key, 209 const unsigned char ivec[16], 210 unsigned char cmac[16]); 211 212 void aesni_ccm64_decrypt_blocks(const unsigned char *in, 213 unsigned char *out, 214 size_t blocks, 215 const void *key, 216 const unsigned char ivec[16], 217 unsigned char cmac[16]); 218 219 # if defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64) 220 size_t aesni_gcm_encrypt(const unsigned char *in, unsigned char *out, size_t len, 221 const void *key, unsigned char ivec[16], u64 *Xi); 222 size_t aesni_gcm_decrypt(const unsigned char *in, unsigned char *out, size_t len, 223 const void *key, unsigned char ivec[16], u64 *Xi); 224 void gcm_ghash_avx(u64 Xi[2], const u128 Htable[16], const u8 *in, size_t len); 225 226 # define AES_gcm_encrypt aesni_gcm_encrypt 227 # define AES_gcm_decrypt aesni_gcm_decrypt 228 # define AES_GCM_ASM(ctx) (ctx->ctr == aesni_ctr32_encrypt_blocks && \ 229 ctx->gcm.ghash == gcm_ghash_avx) 230 # endif 231 232 233 # elif defined(AES_ASM) && (defined(__sparc) || defined(__sparc__)) 234 235 /* Fujitsu SPARC64 X support */ 236 # include "crypto/sparc_arch.h" 237 238 # define SPARC_AES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_AES) 239 # define HWAES_CAPABLE (OPENSSL_sparcv9cap_P[0] & SPARCV9_FJAESX) 240 # define HWAES_set_encrypt_key aes_fx_set_encrypt_key 241 # define HWAES_set_decrypt_key aes_fx_set_decrypt_key 242 # define HWAES_encrypt aes_fx_encrypt 243 # define HWAES_decrypt aes_fx_decrypt 244 # define HWAES_cbc_encrypt aes_fx_cbc_encrypt 245 # define HWAES_ctr32_encrypt_blocks aes_fx_ctr32_encrypt_blocks 246 247 void aes_t4_set_encrypt_key(const unsigned char *key, int bits, AES_KEY *ks); 248 void aes_t4_set_decrypt_key(const unsigned char *key, int bits, AES_KEY *ks); 249 void aes_t4_encrypt(const unsigned char *in, unsigned char *out, 250 const AES_KEY *key); 251 void aes_t4_decrypt(const unsigned char *in, unsigned char *out, 252 const AES_KEY *key); 253 /* 254 * Key-length specific subroutines were chosen for following reason. 255 * Each SPARC T4 core can execute up to 8 threads which share core's 256 * resources. Loading as much key material to registers allows to 257 * minimize references to shared memory interface, as well as amount 258 * of instructions in inner loops [much needed on T4]. But then having 259 * non-key-length specific routines would require conditional branches 260 * either in inner loops or on subroutines' entries. Former is hardly 261 * acceptable, while latter means code size increase to size occupied 262 * by multiple key-length specific subroutines, so why fight? 263 */ 264 void aes128_t4_cbc_encrypt(const unsigned char *in, unsigned char *out, 265 size_t len, const AES_KEY *key, 266 unsigned char *ivec, int /*unused*/); 267 void aes128_t4_cbc_decrypt(const unsigned char *in, unsigned char *out, 268 size_t len, const AES_KEY *key, 269 unsigned char *ivec, int /*unused*/); 270 void aes192_t4_cbc_encrypt(const unsigned char *in, unsigned char *out, 271 size_t len, const AES_KEY *key, 272 unsigned char *ivec, int /*unused*/); 273 void aes192_t4_cbc_decrypt(const unsigned char *in, unsigned char *out, 274 size_t len, const AES_KEY *key, 275 unsigned char *ivec, int /*unused*/); 276 void aes256_t4_cbc_encrypt(const unsigned char *in, unsigned char *out, 277 size_t len, const AES_KEY *key, 278 unsigned char *ivec, int /*unused*/); 279 void aes256_t4_cbc_decrypt(const unsigned char *in, unsigned char *out, 280 size_t len, const AES_KEY *key, 281 unsigned char *ivec, int /*unused*/); 282 void aes128_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out, 283 size_t blocks, const AES_KEY *key, 284 unsigned char *ivec); 285 void aes192_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out, 286 size_t blocks, const AES_KEY *key, 287 unsigned char *ivec); 288 void aes256_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out, 289 size_t blocks, const AES_KEY *key, 290 unsigned char *ivec); 291 void aes128_t4_xts_encrypt(const unsigned char *in, unsigned char *out, 292 size_t blocks, const AES_KEY *key1, 293 const AES_KEY *key2, const unsigned char *ivec); 294 void aes128_t4_xts_decrypt(const unsigned char *in, unsigned char *out, 295 size_t blocks, const AES_KEY *key1, 296 const AES_KEY *key2, const unsigned char *ivec); 297 void aes256_t4_xts_encrypt(const unsigned char *in, unsigned char *out, 298 size_t blocks, const AES_KEY *key1, 299 const AES_KEY *key2, const unsigned char *ivec); 300 void aes256_t4_xts_decrypt(const unsigned char *in, unsigned char *out, 301 size_t blocks, const AES_KEY *key1, 302 const AES_KEY *key2, const unsigned char *ivec); 303 304 # elif defined(OPENSSL_CPUID_OBJ) && defined(__s390__) 305 /* IBM S390X support */ 306 # include "s390x_arch.h" 307 308 309 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */ 310 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6)) 311 312 /* Most modes of operation need km for partial block processing. */ 313 # define S390X_aes_128_CAPABLE (OPENSSL_s390xcap_P.km[0] & \ 314 S390X_CAPBIT(S390X_AES_128)) 315 # define S390X_aes_192_CAPABLE (OPENSSL_s390xcap_P.km[0] & \ 316 S390X_CAPBIT(S390X_AES_192)) 317 # define S390X_aes_256_CAPABLE (OPENSSL_s390xcap_P.km[0] & \ 318 S390X_CAPBIT(S390X_AES_256)) 319 320 # define S390X_aes_128_cbc_CAPABLE 1 /* checked by callee */ 321 # define S390X_aes_192_cbc_CAPABLE 1 322 # define S390X_aes_256_cbc_CAPABLE 1 323 324 # define S390X_aes_128_ecb_CAPABLE S390X_aes_128_CAPABLE 325 # define S390X_aes_192_ecb_CAPABLE S390X_aes_192_CAPABLE 326 # define S390X_aes_256_ecb_CAPABLE S390X_aes_256_CAPABLE 327 328 # define S390X_aes_128_ofb_CAPABLE (S390X_aes_128_CAPABLE && \ 329 (OPENSSL_s390xcap_P.kmo[0] & \ 330 S390X_CAPBIT(S390X_AES_128))) 331 # define S390X_aes_192_ofb_CAPABLE (S390X_aes_192_CAPABLE && \ 332 (OPENSSL_s390xcap_P.kmo[0] & \ 333 S390X_CAPBIT(S390X_AES_192))) 334 # define S390X_aes_256_ofb_CAPABLE (S390X_aes_256_CAPABLE && \ 335 (OPENSSL_s390xcap_P.kmo[0] & \ 336 S390X_CAPBIT(S390X_AES_256))) 337 338 # define S390X_aes_128_cfb_CAPABLE (S390X_aes_128_CAPABLE && \ 339 (OPENSSL_s390xcap_P.kmf[0] & \ 340 S390X_CAPBIT(S390X_AES_128))) 341 # define S390X_aes_192_cfb_CAPABLE (S390X_aes_192_CAPABLE && \ 342 (OPENSSL_s390xcap_P.kmf[0] & \ 343 S390X_CAPBIT(S390X_AES_192))) 344 # define S390X_aes_256_cfb_CAPABLE (S390X_aes_256_CAPABLE && \ 345 (OPENSSL_s390xcap_P.kmf[0] & \ 346 S390X_CAPBIT(S390X_AES_256))) 347 # define S390X_aes_128_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \ 348 S390X_CAPBIT(S390X_AES_128)) 349 # define S390X_aes_192_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \ 350 S390X_CAPBIT(S390X_AES_192)) 351 # define S390X_aes_256_cfb8_CAPABLE (OPENSSL_s390xcap_P.kmf[0] & \ 352 S390X_CAPBIT(S390X_AES_256)) 353 # define S390X_aes_128_cfb1_CAPABLE 0 354 # define S390X_aes_192_cfb1_CAPABLE 0 355 # define S390X_aes_256_cfb1_CAPABLE 0 356 357 # define S390X_aes_128_ctr_CAPABLE 1 /* checked by callee */ 358 # define S390X_aes_192_ctr_CAPABLE 1 359 # define S390X_aes_256_ctr_CAPABLE 1 360 361 # define S390X_aes_128_xts_CAPABLE 1 /* checked by callee */ 362 # define S390X_aes_256_xts_CAPABLE 1 363 364 # define S390X_aes_128_gcm_CAPABLE (S390X_aes_128_CAPABLE && \ 365 (OPENSSL_s390xcap_P.kma[0] & \ 366 S390X_CAPBIT(S390X_AES_128))) 367 # define S390X_aes_192_gcm_CAPABLE (S390X_aes_192_CAPABLE && \ 368 (OPENSSL_s390xcap_P.kma[0] & \ 369 S390X_CAPBIT(S390X_AES_192))) 370 # define S390X_aes_256_gcm_CAPABLE (S390X_aes_256_CAPABLE && \ 371 (OPENSSL_s390xcap_P.kma[0] & \ 372 S390X_CAPBIT(S390X_AES_256))) 373 374 # define S390X_aes_128_ccm_CAPABLE (S390X_aes_128_CAPABLE && \ 375 (OPENSSL_s390xcap_P.kmac[0] & \ 376 S390X_CAPBIT(S390X_AES_128))) 377 # define S390X_aes_192_ccm_CAPABLE (S390X_aes_192_CAPABLE && \ 378 (OPENSSL_s390xcap_P.kmac[0] & \ 379 S390X_CAPBIT(S390X_AES_192))) 380 # define S390X_aes_256_ccm_CAPABLE (S390X_aes_256_CAPABLE && \ 381 (OPENSSL_s390xcap_P.kmac[0] & \ 382 S390X_CAPBIT(S390X_AES_256))) 383 # define S390X_CCM_AAD_FLAG 0x40 384 385 # ifndef OPENSSL_NO_OCB 386 # define S390X_aes_128_ocb_CAPABLE 0 387 # define S390X_aes_192_ocb_CAPABLE 0 388 # define S390X_aes_256_ocb_CAPABLE 0 389 # endif /* OPENSSL_NO_OCB */ 390 391 # ifndef OPENSSL_NO_SIV 392 # define S390X_aes_128_siv_CAPABLE 0 393 # define S390X_aes_192_siv_CAPABLE 0 394 # define S390X_aes_256_siv_CAPABLE 0 395 # endif /* OPENSSL_NO_SIV */ 396 397 /* Convert key size to function code: [16,24,32] -> [18,19,20]. */ 398 # define S390X_AES_FC(keylen) (S390X_AES_128 + ((((keylen) << 3) - 128) >> 6)) 399 # endif 400 401 # if defined(HWAES_CAPABLE) 402 int HWAES_set_encrypt_key(const unsigned char *userKey, const int bits, 403 AES_KEY *key); 404 int HWAES_set_decrypt_key(const unsigned char *userKey, const int bits, 405 AES_KEY *key); 406 void HWAES_encrypt(const unsigned char *in, unsigned char *out, 407 const AES_KEY *key); 408 void HWAES_decrypt(const unsigned char *in, unsigned char *out, 409 const AES_KEY *key); 410 void HWAES_cbc_encrypt(const unsigned char *in, unsigned char *out, 411 size_t length, const AES_KEY *key, 412 unsigned char *ivec, const int enc); 413 void HWAES_ecb_encrypt(const unsigned char *in, unsigned char *out, 414 size_t length, const AES_KEY *key, 415 const int enc); 416 void HWAES_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out, 417 size_t len, const void *key, 418 const unsigned char ivec[16]); 419 void HWAES_xts_encrypt(const unsigned char *inp, unsigned char *out, 420 size_t len, const AES_KEY *key1, 421 const AES_KEY *key2, const unsigned char iv[16]); 422 void HWAES_xts_decrypt(const unsigned char *inp, unsigned char *out, 423 size_t len, const AES_KEY *key1, 424 const AES_KEY *key2, const unsigned char iv[16]); 425 # ifndef OPENSSL_NO_OCB 426 # ifdef HWAES_ocb_encrypt 427 void HWAES_ocb_encrypt(const unsigned char *in, unsigned char *out, 428 size_t blocks, const void *key, 429 size_t start_block_num, 430 unsigned char offset_i[16], 431 const unsigned char L_[][16], 432 unsigned char checksum[16]); 433 # else 434 # define HWAES_ocb_encrypt ((ocb128_f)NULL) 435 # endif 436 # ifdef HWAES_ocb_decrypt 437 void HWAES_ocb_decrypt(const unsigned char *in, unsigned char *out, 438 size_t blocks, const void *key, 439 size_t start_block_num, 440 unsigned char offset_i[16], 441 const unsigned char L_[][16], 442 unsigned char checksum[16]); 443 # else 444 # define HWAES_ocb_decrypt ((ocb128_f)NULL) 445 # endif 446 # endif /* OPENSSL_NO_OCB */ 447 448 # endif /* HWAES_CAPABLE */ 449 450 #endif /* OSSL_AES_PLATFORM_H */ 451