| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 25 #define CASE_SSE_INS_COMMON(Inst, src) \ argument
28 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ argument
31 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ argument
34 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ argument
37 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ argument
42 #define CASE_MOVDUP(Inst, src) \ argument
50 #define CASE_MASK_MOVDUP(Inst, src) \ argument
55 #define CASE_MASKZ_MOVDUP(Inst, src) \ argument
60 #define CASE_PMOVZX(Inst, src) \ argument
68 #define CASE_MASK_PMOVZX(Inst, src) \ argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
92 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass()
98 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass()
104 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass()
110 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR128BitRegisterClass()
116 static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeADDR64BitRegisterClass()
122 static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP32BitRegisterClass()
128 static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP64BitRegisterClass()
134 static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFP128BitRegisterClass()
140 static DecodeStatus DecodeVR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVR32BitRegisterClass()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 63 static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm, in DecodePCRel24BranchTarget()
75 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
82 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass()
88 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass()
94 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass()
100 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass()
106 static DecodeStatus DecodeVFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVFRCRegisterClass()
112 static DecodeStatus DecodeVRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVRRCRegisterClass()
118 static DecodeStatus DecodeVSRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSRCRegisterClass()
124 static DecodeStatus DecodeVSFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVSFRCRegisterClass()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 314 static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128RegisterClass()
325 static DecodeStatus DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR128_loRegisterClass()
343 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR64RegisterClass()
364 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR32RegisterClass()
385 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR16RegisterClass()
406 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFPR8RegisterClass()
427 static DecodeStatus DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64commonRegisterClass()
438 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64RegisterClass()
449 static DecodeStatus DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR64spRegisterClass()
471 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
| D | RISCVMatInt.h | 20 struct Inst { struct
24 Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {} in Inst() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 59 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass()
76 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass()
87 static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32CRegisterClass()
98 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass()
109 static DecodeStatus DecodeFPR64CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64CRegisterClass()
120 static DecodeStatus DecodeGPRNoX0RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRNoX0RegisterClass()
130 static DecodeStatus DecodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRNoX0X2RegisterClass()
140 static DecodeStatus DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRCRegisterClass()
153 static void addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) { in addImplySP()
170 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, in decodeUImmOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | CFLGraph.h | 263 void visitReturnInst(ReturnInst &Inst) { in visitReturnInst()
272 void visitPtrToIntInst(PtrToIntInst &Inst) { in visitPtrToIntInst()
277 void visitIntToPtrInst(IntToPtrInst &Inst) { in visitIntToPtrInst()
282 void visitCastInst(CastInst &Inst) { in visitCastInst()
287 void visitBinaryOperator(BinaryOperator &Inst) { in visitBinaryOperator()
294 void visitUnaryOperator(UnaryOperator &Inst) { in visitUnaryOperator()
299 void visitAtomicCmpXchgInst(AtomicCmpXchgInst &Inst) { in visitAtomicCmpXchgInst()
305 void visitAtomicRMWInst(AtomicRMWInst &Inst) { in visitAtomicRMWInst()
311 void visitPHINode(PHINode &Inst) { in visitPHINode()
327 void visitGetElementPtrInst(GetElementPtrInst &Inst) { in visitGetElementPtrInst()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 411 static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, in DecodeUImmWithOffset()
1395 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, in DecodeCPU16RegsRegisterClass()
1402 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, in DecodeGPR64RegisterClass()
1414 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, in DecodeGPRMM16RegisterClass()
1425 static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, in DecodeGPRMM16ZeroRegisterClass()
1436 static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, in DecodeGPRMM16MovePRegisterClass()
1447 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, in DecodeGPR32RegisterClass()
1458 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, in DecodePtrRegisterClass()
1468 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, in DecodeDSPRRegisterClass()
1475 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, in DecodeFGR64RegisterClass()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1127 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
1137 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeCLRMGPRRegisterClass()
1152 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRnopcRegisterClass()
1165 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithAPSRRegisterClass()
1180 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithZRRegisterClass()
1198 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRwithZRnospRegisterClass()
1207 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetGPRRegisterClass()
1219 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRPairRegisterClass()
1234 static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRspRegisterClass()
1245 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodetcGPRRegisterClass()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 37 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
41 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
45 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
49 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
53 virtual bool isCall(const MCInst &Inst) const { in isCall()
57 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
61 virtual bool isTerminator(const MCInst &Inst) const { in isTerminator()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 198 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, in DecodeGRRegsRegisterClass()
210 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, in DecodeRRegsRegisterClass()
222 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, in DecodeBitpOperand()
233 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, in DecodeNegImmOperand()
274 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2OpInstructionFail()
344 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RInstruction()
357 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RImmInstruction()
370 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeR2RInstruction()
383 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in Decode2RSrcDstInstruction()
397 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeRUSInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 145 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, in DecodeIntRegsRegisterClass()
156 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, in DecodeI64RegsRegisterClass()
168 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, in DecodeFPRegsRegisterClass()
180 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst, in DecodeDFPRegsRegisterClass()
192 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, in DecodeQFPRegsRegisterClass()
206 static DecodeStatus DecodeCPRegsRegisterClass(MCInst &Inst, in DecodeCPRegsRegisterClass()
217 static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeFCCRegsRegisterClass()
226 static DecodeStatus DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeASRRegsRegisterClass()
235 static DecodeStatus DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodePRRegsRegisterClass()
244 static DecodeStatus DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntPairRegisterClass()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 110 const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
135 static unsigned adjustPqBits(const MCInst &Inst, unsigned Value, in adjustPqBits()
161 LanaiMCCodeEmitter::adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value, in adjustPqBitsRmAndRrm()
167 LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value, in adjustPqBitsSpls()
173 const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
186 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRiMemoryOpValue()
218 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRrMemoryOpValue()
256 LanaiMCCodeEmitter::getSplsOpValue(const MCInst &Inst, unsigned OpNo, in getSplsOpValue()
289 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 178 MCInst *Inst = new (getContext()) MCInst; in getInstruction() local
486 auto const &Inst = *i->getInst(); in getSingleInstruction() local
511 MCInst const &Inst = HexagonMCInstrInfo::isDuplex(*MCII, MI) in getSingleInstruction() local
521 static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeRegisterClass()
531 static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntRegsLow8RegisterClass()
537 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeIntRegsRegisterClass()
552 static DecodeStatus DecodeGeneralSubRegsRegisterClass(MCInst &Inst, in DecodeGeneralSubRegsRegisterClass()
566 static DecodeStatus DecodeHvxVRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeHvxVRRegisterClass()
581 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeDoubleRegsRegisterClass()
594 MCInst &Inst, unsigned RegNo, uint64_t /*Address*/, const void *Decoder) { in DecodeGeneralDoubleLow8RegsRegisterClass()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 120 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass()
133 static DecodeStatus DecodeGBR32ShortRegister(MCInst &Inst, unsigned RegNo, in DecodeGBR32ShortRegister()
158 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9()
168 static bool DecodeSymbolicOperand(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperand()
178 static void DecodeSymbolicOperandOff(MCInst &Inst, uint64_t Address, in DecodeSymbolicOperandOff()
187 static DecodeStatus DecodeBranchTargetS(MCInst &Inst, unsigned InsnS, in DecodeBranchTargetS()
196 static DecodeStatus DecodeSignedOperand(MCInst &Inst, unsigned InsnS, in DecodeSignedOperand()
207 static DecodeStatus DecodeFromCyclicRange(MCInst &Inst, unsigned InsnS, in DecodeFromCyclicRange()
218 static DecodeStatus DecodeStLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeStLImmInstruction()
235 static DecodeStatus DecodeLdLImmInstruction(MCInst &Inst, uint64_t Insn, in DecodeLdLImmInstruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsAnalyzeImmediate.h | 19 struct Inst { struct
22 Inst(unsigned Opc, unsigned ImmOpnd); argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCInstrAnalysis.cpp | 20 const MCInst &Inst, in clearsSuperRegisters()
26 bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, in evaluateBranch()
38 MCInstrAnalysis::evaluateMemoryOperandAddress(const MCInst &Inst, uint64_t Addr, in evaluateMemoryOperandAddress()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 252 for (const MCInst &Inst : PendingConditionalInsts) { in flushPendingInstructions() local
2322 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
2332 void addARMBranchTargetOperands(MCInst &Inst, unsigned N) const { in addARMBranchTargetOperands()
2337 void addThumbBranchTargetOperands(MCInst &Inst, unsigned N) const { in addThumbBranchTargetOperands()
2342 void addCondCodeOperands(MCInst &Inst, unsigned N) const { in addCondCodeOperands()
2349 void addVPTPredNOperands(MCInst &Inst, unsigned N) const { in addVPTPredNOperands()
2356 void addVPTPredROperands(MCInst &Inst, unsigned N) const { in addVPTPredROperands()
2373 void addCoprocNumOperands(MCInst &Inst, unsigned N) const { in addCoprocNumOperands()
2378 void addCoprocRegOperands(MCInst &Inst, unsigned N) const { in addCoprocRegOperands()
2383 void addCoprocOptionOperands(MCInst &Inst, unsigned N) const { in addCoprocOptionOperands()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | XmmArith.cpp | 17 #define TestArithSSXmmXmm(FloatSize, Src, Value0, Dst, Value1, Inst, Op) \ in TEST_F() argument
50 #define TestArithSSXmmAddr(FloatSize, Value0, Dst, Value1, Inst, Op) \ in TEST_F() argument
124 #define TestPArithXmmXmm(Dst, Value0, Src, Value1, Inst, Op, Type, Size) \ in TEST_F() argument
149 #define TestPArithXmmAddr(Dst, Value0, Value1, Inst, Op, Type, Size) \ in TEST_F() argument
173 #define TestPArithXmmImm(Dst, Value0, Imm, Inst, Op, Type, Size) \ in TEST_F() argument
414 #define TestArithPSXmmXmm(FloatSize, Dst, Value0, Src, Value1, Inst, Op, Type) \ in TEST_F() argument
438 #define TestArithPSXmmXmmUntyped(Dst, Value0, Src, Value1, Inst, Op, Type) \ in TEST_F() argument
462 #define TestArithPSXmmAddrUntyped(Dst, Value0, Value1, Inst, Op, Type) \ in TEST_F() argument
485 #define TestMinMaxPS(FloatSize, Dst, Value0, Src, Value1, Inst, Type) \ in TEST_F() argument
509 #define TestArithPSXmmAddr(FloatSize, Dst, Value0, Value1, Inst, Op, Type) \ in TEST_F() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | XmmArith.cpp | 17 #define TestArithSSXmmXmm(FloatSize, Src, Value0, Dst, Value1, Inst, Op) \ in TEST_F() argument
53 #define TestArithSSXmmAddr(FloatSize, Value0, Dst, Value1, Inst, Op) \ in TEST_F() argument
123 #define TestPArithXmmXmm(Dst, Value0, Src, Value1, Inst, Op, Type, Size) \ in TEST_F() argument
149 #define TestPArithXmmAddr(Dst, Value0, Value1, Inst, Op, Type, Size) \ in TEST_F() argument
174 #define TestPArithXmmImm(Dst, Value0, Imm, Inst, Op, Type, Size) \ in TEST_F() argument
409 #define TestArithPSXmmXmm(FloatSize, Dst, Value0, Src, Value1, Inst, Op, Type) \ in TEST_F() argument
434 #define TestArithPSXmmXmmUntyped(Dst, Value0, Src, Value1, Inst, Op, Type) \ in TEST_F() argument
458 #define TestArithPSXmmAddrUntyped(Dst, Value0, Value1, Inst, Op, Type) \ in TEST_F() argument
481 #define TestMinMaxPS(FloatSize, Dst, Value0, Src, Value1, Inst, Type) \ in TEST_F() argument
506 #define TestArithPSXmmAddr(FloatSize, Dst, Value0, Value1, Inst, Op, Type) \ in TEST_F() argument
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| D | LowLevel.cpp | 110 #define TestRegReg(Inst, Dst, Src, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
124 #define TestRegImm(Inst, Dst, Imm, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
137 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
151 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
166 #define TestRegAddrScaledIndex(Inst, Dst, Index, Scale, Disp, OpType, \ in TEST_F() argument
182 #define TestRegAddrBaseScaledIndex(Inst, Dst, Base, Index, Scale, Disp, \ in TEST_F() argument
199 #define TestAddrBaseScaledIndexImm(Inst, Base, Index, Scale, Disp, Imm, \ in TEST_F() argument
217 #define TestAddrBaseScaledIndexReg(Inst, Base, Index, Scale, Disp, Src, \ in TEST_F() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/ObjCARC/ |
| D | DependencyAnalysis.cpp | 34 bool llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, in CanAlterRefCount()
67 bool llvm::objcarc::CanDecrementRefCount(const Instruction *Inst, in CanDecrementRefCount()
81 bool llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, in CanUse()
131 llvm::objcarc::Depends(DependenceKind Flavor, Instruction *Inst, in Depends()
251 Instruction *Inst = &*--LocalStartPos; in FindDependencies() local
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 163 DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPRRegisterClass()
174 static DecodeStatus decodeRiMemoryValue(MCInst &Inst, unsigned Insn, in decodeRiMemoryValue()
186 static DecodeStatus decodeRrMemoryValue(MCInst &Inst, unsigned Insn, in decodeRrMemoryValue()
198 static DecodeStatus decodeSplsValue(MCInst &Inst, unsigned Insn, in decodeSplsValue()
227 static DecodeStatus decodeShiftImm(MCInst &Inst, unsigned Insn, in decodeShiftImm()
235 static DecodeStatus decodePredicateOperand(MCInst &Inst, unsigned Val, in decodePredicateOperand()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 93 auto buildOp = [Op](ArrayRef<Value *> Srcs, Instruction *Inst) { in binOpDescriptor()
126 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) { in cmpOpDescriptor()
141 auto buildSplitBlock = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in splitBlockDescriptor()
171 auto buildGEP = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in gepDescriptor()
212 auto buildExtract = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in extractValueDescriptor()
267 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertValueDescriptor()
279 auto buildExtract = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in extractElementDescriptor()
287 auto buildInsert = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in insertElementDescriptor()
312 auto buildShuffle = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in shuffleVectorDescriptor()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1032 void addExpr(MCInst &Inst, const MCExpr *Expr) const { in addExpr()
1042 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands()
1049 void addGPR32ZeroAsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR32ZeroAsmRegOperands()
1054 void addGPR32NonZeroAsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR32NonZeroAsmRegOperands()
1059 void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPR32AsmRegOperands()
1064 void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegOperands()
1069 void addGPRMM16AsmRegZeroOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegZeroOperands()
1074 void addGPRMM16AsmRegMovePOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegMovePOperands()
1079 void addGPRMM16AsmRegMovePPairFirstOperands(MCInst &Inst, unsigned N) const { in addGPRMM16AsmRegMovePPairFirstOperands()
1084 void addGPRMM16AsmRegMovePPairSecondOperands(MCInst &Inst, in addGPRMM16AsmRegMovePPairSecondOperands()
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