1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 17 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 */ 55 #define EC_HOST_CMD_REGION0 0x800 56 #define EC_HOST_CMD_REGION1 0x880 57 #define EC_HOST_CMD_REGION_SIZE 0x80 58 59 /* EC command register bit functions */ 60 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 61 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 62 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 63 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 64 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 65 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 66 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 67 68 #define EC_LPC_ADDR_MEMMAP 0x900 69 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 70 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 71 72 /* The offset address of each type of data in mapped memory. */ 73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 74 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 75 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 76 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 77 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 78 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 79 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 80 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 81 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 82 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 83 /* Unused 0x28 - 0x2f */ 84 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 85 /* Unused 0x31 - 0x33 */ 86 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 87 /* Battery values are all 32 bits, unless otherwise noted. */ 88 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 89 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 90 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 91 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 92 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 93 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 94 /* Unused 0x4f */ 95 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 96 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 97 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 98 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 99 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 100 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 101 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 102 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 103 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 104 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 105 /* Unused 0x84 - 0x8f */ 106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 107 /* Unused 0x91 */ 108 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 109 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 110 /* 0x94 - 0x99: 1st Accelerometer */ 111 /* 0x9a - 0x9f: 2nd Accelerometer */ 112 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 113 /* Unused 0xa6 - 0xdf */ 114 115 /* 116 * ACPI is unable to access memory mapped data at or above this offset due to 117 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 118 * which might be needed by ACPI. 119 */ 120 #define EC_MEMMAP_NO_ACPI 0xe0 121 122 /* Define the format of the accelerometer mapped memory status byte. */ 123 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 124 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 125 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 126 127 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 128 #define EC_TEMP_SENSOR_ENTRIES 16 129 /* 130 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 131 * 132 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 133 */ 134 #define EC_TEMP_SENSOR_B_ENTRIES 8 135 136 /* Special values for mapped temperature sensors */ 137 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 138 #define EC_TEMP_SENSOR_ERROR 0xfe 139 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 140 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 141 /* 142 * The offset of temperature value stored in mapped memory. This allows 143 * reporting a temperature range of 200K to 454K = -73C to 181C. 144 */ 145 #define EC_TEMP_SENSOR_OFFSET 200 146 147 /* 148 * Number of ALS readings at EC_MEMMAP_ALS 149 */ 150 #define EC_ALS_ENTRIES 2 151 152 /* 153 * The default value a temperature sensor will return when it is present but 154 * has not been read this boot. This is a reasonable number to avoid 155 * triggering alarms on the host. 156 */ 157 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 158 159 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 160 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 161 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 162 163 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 164 #define EC_BATT_FLAG_AC_PRESENT 0x01 165 #define EC_BATT_FLAG_BATT_PRESENT 0x02 166 #define EC_BATT_FLAG_DISCHARGING 0x04 167 #define EC_BATT_FLAG_CHARGING 0x08 168 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 169 /* Set if some of the static/dynamic data is invalid (or outdated). */ 170 #define EC_BATT_FLAG_INVALID_DATA 0x20 171 172 /* Switch flags at EC_MEMMAP_SWITCHES */ 173 #define EC_SWITCH_LID_OPEN 0x01 174 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 175 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 176 /* Was recovery requested via keyboard; now unused. */ 177 #define EC_SWITCH_IGNORE1 0x08 178 /* Recovery requested via dedicated signal (from servo board) */ 179 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 180 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 181 #define EC_SWITCH_IGNORE0 0x20 182 183 /* Host command interface flags */ 184 /* Host command interface supports LPC args (LPC interface only) */ 185 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 186 /* Host command interface supports version 3 protocol */ 187 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 188 189 /* Wireless switch flags */ 190 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 191 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 192 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 193 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 194 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 195 196 /*****************************************************************************/ 197 /* 198 * ACPI commands 199 * 200 * These are valid ONLY on the ACPI command/data port. 201 */ 202 203 /* 204 * ACPI Read Embedded Controller 205 * 206 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 207 * 208 * Use the following sequence: 209 * 210 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 211 * - Wait for EC_LPC_CMDR_PENDING bit to clear 212 * - Write address to EC_LPC_ADDR_ACPI_DATA 213 * - Wait for EC_LPC_CMDR_DATA bit to set 214 * - Read value from EC_LPC_ADDR_ACPI_DATA 215 */ 216 #define EC_CMD_ACPI_READ 0x0080 217 218 /* 219 * ACPI Write Embedded Controller 220 * 221 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 222 * 223 * Use the following sequence: 224 * 225 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 226 * - Wait for EC_LPC_CMDR_PENDING bit to clear 227 * - Write address to EC_LPC_ADDR_ACPI_DATA 228 * - Wait for EC_LPC_CMDR_PENDING bit to clear 229 * - Write value to EC_LPC_ADDR_ACPI_DATA 230 */ 231 #define EC_CMD_ACPI_WRITE 0x0081 232 233 /* 234 * ACPI Burst Enable Embedded Controller 235 * 236 * This enables burst mode on the EC to allow the host to issue several 237 * commands back-to-back. While in this mode, writes to mapped multi-byte 238 * data are locked out to ensure data consistency. 239 */ 240 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 241 242 /* 243 * ACPI Burst Disable Embedded Controller 244 * 245 * This disables burst mode on the EC and stops preventing EC writes to mapped 246 * multi-byte data. 247 */ 248 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 249 250 /* 251 * ACPI Query Embedded Controller 252 * 253 * This clears the lowest-order bit in the currently pending host events, and 254 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 255 * event 0x80000000 = 32), or 0 if no event was pending. 256 */ 257 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 258 259 /* Valid addresses in ACPI memory space, for read/write commands */ 260 261 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 262 #define EC_ACPI_MEM_VERSION 0x00 263 /* 264 * Test location; writing value here updates test compliment byte to (0xff - 265 * value). 266 */ 267 #define EC_ACPI_MEM_TEST 0x01 268 /* Test compliment; writes here are ignored. */ 269 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 270 271 /* Keyboard backlight brightness percent (0 - 100) */ 272 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 273 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 274 #define EC_ACPI_MEM_FAN_DUTY 0x04 275 276 /* 277 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 278 * independent thresholds attached to them. The current value of the ID 279 * register determines which sensor is affected by the THRESHOLD and COMMIT 280 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 281 * as the memory-mapped sensors. The COMMIT register applies those settings. 282 * 283 * The spec does not mandate any way to read back the threshold settings 284 * themselves, but when a threshold is crossed the AP needs a way to determine 285 * which sensor(s) are responsible. Each reading of the ID register clears and 286 * returns one sensor ID that has crossed one of its threshold (in either 287 * direction) since the last read. A value of 0xFF means "no new thresholds 288 * have tripped". Setting or enabling the thresholds for a sensor will clear 289 * the unread event count for that sensor. 290 */ 291 #define EC_ACPI_MEM_TEMP_ID 0x05 292 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 293 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 294 /* 295 * Here are the bits for the COMMIT register: 296 * bit 0 selects the threshold index for the chosen sensor (0/1) 297 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 298 * Each write to the commit register affects one threshold. 299 */ 300 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 301 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 302 /* 303 * Example: 304 * 305 * Set the thresholds for sensor 2 to 50 C and 60 C: 306 * write 2 to [0x05] -- select temp sensor 2 307 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 308 * write 0x2 to [0x07] -- enable threshold 0 with this value 309 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 310 * write 0x3 to [0x07] -- enable threshold 1 with this value 311 * 312 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 313 * write 2 to [0x05] -- select temp sensor 2 314 * write 0x1 to [0x07] -- disable threshold 1 315 */ 316 317 /* DPTF battery charging current limit */ 318 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 319 320 /* Charging limit is specified in 64 mA steps */ 321 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 322 /* Value to disable DPTF battery charging limit */ 323 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 324 325 /* 326 * Report device orientation 327 * Bits Definition 328 * 3:1 Device DPTF Profile Number (DDPN) 329 * 0 = Reserved for backward compatibility (indicates no valid 330 * profile number. Host should fall back to using TBMD). 331 * 1..7 = DPTF Profile number to indicate to host which table needs 332 * to be loaded. 333 * 0 Tablet Mode Device Indicator (TBMD) 334 */ 335 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 336 #define EC_ACPI_MEM_TBMD_SHIFT 0 337 #define EC_ACPI_MEM_TBMD_MASK 0x1 338 #define EC_ACPI_MEM_DDPN_SHIFT 1 339 #define EC_ACPI_MEM_DDPN_MASK 0x7 340 341 /* 342 * Report device features. Uses the same format as the host command, except: 343 * 344 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 345 * of features", which is of limited interest when the system is already 346 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 347 * these are supported, it defaults to 0. 348 * This allows detecting the presence of this field since older versions of 349 * the EC codebase would simply return 0xff to that unknown address. Check 350 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 351 * are valid. 352 */ 353 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 354 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 355 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 356 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 357 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 358 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 359 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 360 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 361 362 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 363 364 /* 365 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 366 * is enabled (1) or disabled (0). 367 * bit 0 USB port ID 0 368 * ... 369 * bit 7 USB port ID 7 370 */ 371 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 372 373 /* 374 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 375 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 376 */ 377 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 378 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 379 380 /* Current version of ACPI memory address space */ 381 #define EC_ACPI_MEM_VERSION_CURRENT 2 382 383 384 /* 385 * This header file is used in coreboot both in C and ACPI code. The ACPI code 386 * is pre-processed to handle constants but the ASL compiler is unable to 387 * handle actual C code so keep it separate. 388 */ 389 390 391 /* 392 * Attributes for EC request and response packets. Just defining __packed 393 * results in inefficient assembly code on ARM, if the structure is actually 394 * 32-bit aligned, as it should be for all buffers. 395 * 396 * Be very careful when adding these to existing structures. They will round 397 * up the structure size to the specified boundary. 398 * 399 * Also be very careful to make that if a structure is included in some other 400 * parent structure that the alignment will still be true given the packing of 401 * the parent structure. This is particularly important if the sub-structure 402 * will be passed as a pointer to another function, since that function will 403 * not know about the misaligment caused by the parent structure's packing. 404 * 405 * Also be very careful using __packed - particularly when nesting non-packed 406 * structures inside packed ones. In fact, DO NOT use __packed directly; 407 * always use one of these attributes. 408 * 409 * Once everything is annotated properly, the following search strings should 410 * not return ANY matches in this file other than right here: 411 * 412 * "__packed" - generates inefficient code; all sub-structs must also be packed 413 * 414 * "struct [^_]" - all structs should be annotated, except for structs that are 415 * members of other structs/unions (and their original declarations should be 416 * annotated). 417 */ 418 419 /* 420 * Packed structures make no assumption about alignment, so they do inefficient 421 * byte-wise reads. 422 */ 423 #define __ec_align1 __packed 424 #define __ec_align2 __packed 425 #define __ec_align4 __packed 426 #define __ec_align_size1 __packed 427 #define __ec_align_offset1 __packed 428 #define __ec_align_offset2 __packed 429 #define __ec_todo_packed __packed 430 #define __ec_todo_unpacked 431 432 433 /* LPC command status byte masks */ 434 /* EC has written a byte in the data register and host hasn't read it yet */ 435 #define EC_LPC_STATUS_TO_HOST 0x01 436 /* Host has written a command/data byte and the EC hasn't read it yet */ 437 #define EC_LPC_STATUS_FROM_HOST 0x02 438 /* EC is processing a command */ 439 #define EC_LPC_STATUS_PROCESSING 0x04 440 /* Last write to EC was a command, not data */ 441 #define EC_LPC_STATUS_LAST_CMD 0x08 442 /* EC is in burst mode */ 443 #define EC_LPC_STATUS_BURST_MODE 0x10 444 /* SCI event is pending (requesting SCI query) */ 445 #define EC_LPC_STATUS_SCI_PENDING 0x20 446 /* SMI event is pending (requesting SMI query) */ 447 #define EC_LPC_STATUS_SMI_PENDING 0x40 448 /* (reserved) */ 449 #define EC_LPC_STATUS_RESERVED 0x80 450 451 /* 452 * EC is busy. This covers both the EC processing a command, and the host has 453 * written a new command but the EC hasn't picked it up yet. 454 */ 455 #define EC_LPC_STATUS_BUSY_MASK \ 456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 457 458 /* 459 * Host command response codes (16-bit). Note that response codes should be 460 * stored in a uint16_t rather than directly in a value of this type. 461 */ 462 enum ec_status { 463 EC_RES_SUCCESS = 0, 464 EC_RES_INVALID_COMMAND = 1, 465 EC_RES_ERROR = 2, 466 EC_RES_INVALID_PARAM = 3, 467 EC_RES_ACCESS_DENIED = 4, 468 EC_RES_INVALID_RESPONSE = 5, 469 EC_RES_INVALID_VERSION = 6, 470 EC_RES_INVALID_CHECKSUM = 7, 471 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 472 EC_RES_UNAVAILABLE = 9, /* No response available */ 473 EC_RES_TIMEOUT = 10, /* We got a timeout */ 474 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 475 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 476 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 477 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 478 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 479 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 480 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 481 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 482 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 483 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 484 }; 485 486 /* 487 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 488 * EC command uses code 0 to mean "no event pending". We explicitly specify 489 * each value in the enum listing so they won't change if we delete/insert an 490 * item or rearrange the list (it needs to be stable across platforms, not 491 * just within a single compiled instance). 492 */ 493 enum host_event_code { 494 EC_HOST_EVENT_LID_CLOSED = 1, 495 EC_HOST_EVENT_LID_OPEN = 2, 496 EC_HOST_EVENT_POWER_BUTTON = 3, 497 EC_HOST_EVENT_AC_CONNECTED = 4, 498 EC_HOST_EVENT_AC_DISCONNECTED = 5, 499 EC_HOST_EVENT_BATTERY_LOW = 6, 500 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 501 EC_HOST_EVENT_BATTERY = 8, 502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 503 /* Event generated by a device attached to the EC */ 504 EC_HOST_EVENT_DEVICE = 10, 505 EC_HOST_EVENT_THERMAL = 11, 506 EC_HOST_EVENT_USB_CHARGER = 12, 507 EC_HOST_EVENT_KEY_PRESSED = 13, 508 /* 509 * EC has finished initializing the host interface. The host can check 510 * for this event following sending a EC_CMD_REBOOT_EC command to 511 * determine when the EC is ready to accept subsequent commands. 512 */ 513 EC_HOST_EVENT_INTERFACE_READY = 14, 514 /* Keyboard recovery combo has been pressed */ 515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 516 517 /* Shutdown due to thermal overload */ 518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 519 /* Shutdown due to battery level too low */ 520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 521 522 /* Suggest that the AP throttle itself */ 523 EC_HOST_EVENT_THROTTLE_START = 18, 524 /* Suggest that the AP resume normal speed */ 525 EC_HOST_EVENT_THROTTLE_STOP = 19, 526 527 /* Hang detect logic detected a hang and host event timeout expired */ 528 EC_HOST_EVENT_HANG_DETECT = 20, 529 /* Hang detect logic detected a hang and warm rebooted the AP */ 530 EC_HOST_EVENT_HANG_REBOOT = 21, 531 532 /* PD MCU triggering host event */ 533 EC_HOST_EVENT_PD_MCU = 22, 534 535 /* Battery Status flags have changed */ 536 EC_HOST_EVENT_BATTERY_STATUS = 23, 537 538 /* EC encountered a panic, triggering a reset */ 539 EC_HOST_EVENT_PANIC = 24, 540 541 /* Keyboard fastboot combo has been pressed */ 542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 543 544 /* EC RTC event occurred */ 545 EC_HOST_EVENT_RTC = 26, 546 547 /* Emulate MKBP event */ 548 EC_HOST_EVENT_MKBP = 27, 549 550 /* EC desires to change state of host-controlled USB mux */ 551 EC_HOST_EVENT_USB_MUX = 28, 552 553 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 554 EC_HOST_EVENT_MODE_CHANGE = 29, 555 556 /* Keyboard recovery combo with hardware reinitialization */ 557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 558 559 /* WoV */ 560 EC_HOST_EVENT_WOV = 31, 561 562 /* 563 * The high bit of the event mask is not used as a host event code. If 564 * it reads back as set, then the entire event mask should be 565 * considered invalid by the host. This can happen when reading the 566 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 567 * not initialized on the EC, or improperly configured on the host. 568 */ 569 EC_HOST_EVENT_INVALID = 32 570 }; 571 /* Host event mask */ 572 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 573 574 /** 575 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 576 * @flags: The host argument flags. 577 * @command_version: Command version. 578 * @data_size: The length of data. 579 * @checksum: Checksum; sum of command + flags + command_version + data_size + 580 * all params/response data bytes. 581 */ 582 struct ec_lpc_host_args { 583 uint8_t flags; 584 uint8_t command_version; 585 uint8_t data_size; 586 uint8_t checksum; 587 } __ec_align4; 588 589 /* Flags for ec_lpc_host_args.flags */ 590 /* 591 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 592 * params. 593 * 594 * If EC gets a command and this flag is not set, this is an old-style command. 595 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 596 * unknown length. EC must respond with an old-style response (that is, 597 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 598 */ 599 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 600 /* 601 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 602 * 603 * If EC responds to a command and this flag is not set, this is an old-style 604 * response. Command version is 0 and response data from EC is at 605 * EC_LPC_ADDR_OLD_PARAM with unknown length. 606 */ 607 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 608 609 /*****************************************************************************/ 610 /* 611 * Byte codes returned by EC over SPI interface. 612 * 613 * These can be used by the AP to debug the EC interface, and to determine 614 * when the EC is not in a state where it will ever get around to responding 615 * to the AP. 616 * 617 * Example of sequence of bytes read from EC for a current good transfer: 618 * 1. - - AP asserts chip select (CS#) 619 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 620 * 3. - - EC starts handling CS# interrupt 621 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 622 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 623 * bytes looking for EC_SPI_FRAME_START 624 * 6. - - EC finishes processing and sets up response 625 * 7. EC_SPI_FRAME_START - AP reads frame byte 626 * 8. (response packet) - AP reads response packet 627 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 628 * 10 - - AP deasserts chip select 629 * 11 - - EC processes CS# interrupt and sets up DMA for 630 * next request 631 * 632 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 633 * the following byte values: 634 * EC_SPI_OLD_READY 635 * EC_SPI_RX_READY 636 * EC_SPI_RECEIVING 637 * EC_SPI_PROCESSING 638 * 639 * Then the EC found an error in the request, or was not ready for the request 640 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 641 * because the EC is unable to tell when the AP is done sending its request. 642 */ 643 644 /* 645 * Framing byte which precedes a response packet from the EC. After sending a 646 * request, the AP will clock in bytes until it sees the framing byte, then 647 * clock in the response packet. 648 */ 649 #define EC_SPI_FRAME_START 0xec 650 651 /* 652 * Padding bytes which are clocked out after the end of a response packet. 653 */ 654 #define EC_SPI_PAST_END 0xed 655 656 /* 657 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 658 * that the AP will send a valid packet header (starting with 659 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 660 */ 661 #define EC_SPI_RX_READY 0xf8 662 663 /* 664 * EC has started receiving the request from the AP, but hasn't started 665 * processing it yet. 666 */ 667 #define EC_SPI_RECEIVING 0xf9 668 669 /* EC has received the entire request from the AP and is processing it. */ 670 #define EC_SPI_PROCESSING 0xfa 671 672 /* 673 * EC received bad data from the AP, such as a packet header with an invalid 674 * length. EC will ignore all data until chip select deasserts. 675 */ 676 #define EC_SPI_RX_BAD_DATA 0xfb 677 678 /* 679 * EC received data from the AP before it was ready. That is, the AP asserted 680 * chip select and started clocking data before the EC was ready to receive it. 681 * EC will ignore all data until chip select deasserts. 682 */ 683 #define EC_SPI_NOT_READY 0xfc 684 685 /* 686 * EC was ready to receive a request from the AP. EC has treated the byte sent 687 * by the AP as part of a request packet, or (for old-style ECs) is processing 688 * a fully received packet but is not ready to respond yet. 689 */ 690 #define EC_SPI_OLD_READY 0xfd 691 692 /*****************************************************************************/ 693 694 /* 695 * Protocol version 2 for I2C and SPI send a request this way: 696 * 697 * 0 EC_CMD_VERSION0 + (command version) 698 * 1 Command number 699 * 2 Length of params = N 700 * 3..N+2 Params, if any 701 * N+3 8-bit checksum of bytes 0..N+2 702 * 703 * The corresponding response is: 704 * 705 * 0 Result code (EC_RES_*) 706 * 1 Length of params = M 707 * 2..M+1 Params, if any 708 * M+2 8-bit checksum of bytes 0..M+1 709 */ 710 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 711 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 712 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 713 EC_PROTO2_REQUEST_TRAILER_BYTES) 714 715 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 716 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 717 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 718 EC_PROTO2_RESPONSE_TRAILER_BYTES) 719 720 /* Parameter length was limited by the LPC interface */ 721 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 722 723 /* Maximum request and response packet sizes for protocol version 2 */ 724 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 725 EC_PROTO2_MAX_PARAM_SIZE) 726 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 727 EC_PROTO2_MAX_PARAM_SIZE) 728 729 /*****************************************************************************/ 730 731 /* 732 * Value written to legacy command port / prefix byte to indicate protocol 733 * 3+ structs are being used. Usage is bus-dependent. 734 */ 735 #define EC_COMMAND_PROTOCOL_3 0xda 736 737 #define EC_HOST_REQUEST_VERSION 3 738 739 /** 740 * struct ec_host_request - Version 3 request from host. 741 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 742 * receives a header with a version it doesn't know how to 743 * parse. 744 * @checksum: Checksum of request and data; sum of all bytes including checksum 745 * should total to 0. 746 * @command: Command to send (EC_CMD_...) 747 * @command_version: Command version. 748 * @reserved: Unused byte in current protocol version; set to 0. 749 * @data_len: Length of data which follows this header. 750 */ 751 struct ec_host_request { 752 uint8_t struct_version; 753 uint8_t checksum; 754 uint16_t command; 755 uint8_t command_version; 756 uint8_t reserved; 757 uint16_t data_len; 758 } __ec_align4; 759 760 #define EC_HOST_RESPONSE_VERSION 3 761 762 /** 763 * struct ec_host_response - Version 3 response from EC. 764 * @struct_version: Struct version (=3). 765 * @checksum: Checksum of response and data; sum of all bytes including 766 * checksum should total to 0. 767 * @result: EC's response to the command (separate from communication failure) 768 * @data_len: Length of data which follows this header. 769 * @reserved: Unused bytes in current protocol version; set to 0. 770 */ 771 struct ec_host_response { 772 uint8_t struct_version; 773 uint8_t checksum; 774 uint16_t result; 775 uint16_t data_len; 776 uint16_t reserved; 777 } __ec_align4; 778 779 /*****************************************************************************/ 780 781 /* 782 * Host command protocol V4. 783 * 784 * Packets always start with a request or response header. They are followed 785 * by data_len bytes of data. If the data_crc_present flag is set, the data 786 * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 787 * polynomial. 788 * 789 * Host algorithm when sending a request q: 790 * 791 * 101) tries_left=(some value, e.g. 3); 792 * 102) q.seq_num++ 793 * 103) q.seq_dup=0 794 * 104) Calculate q.header_crc. 795 * 105) Send request q to EC. 796 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 797 * 798 * 201) If r.struct_version != 4, go to 301. 799 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 800 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 801 * 204) If r.seq_num != q.seq_num, go to 301. 802 * 205) If r.seq_dup == q.seq_dup, return success. 803 * 207) If r.seq_dup == 1, go to 301. 804 * 208) Return error. 805 * 806 * 301) If --tries_left <= 0, return error. 807 * 302) If q.seq_dup == 1, go to 105. 808 * 303) q.seq_dup = 1 809 * 304) Go to 104. 810 * 811 * EC algorithm when receiving a request q. 812 * EC has response buffer r, error buffer e. 813 * 814 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 815 * and go to 301 816 * 102) If q.header_crc mismatches calculated CRC, set e.result = 817 * EC_RES_INVALID_HEADER_CRC and go to 301 818 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 819 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 820 * and go to 301. 821 * 104) If q.seq_dup == 0, go to 201. 822 * 105) If q.seq_num != r.seq_num, go to 201. 823 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 824 * 825 * 201) Process request q into response r. 826 * 202) r.seq_num = q.seq_num 827 * 203) r.seq_dup = q.seq_dup 828 * 204) Calculate r.header_crc 829 * 205) If r.data_len > 0 and data is no longer available, set e.result = 830 * EC_RES_DUP_UNAVAILABLE and go to 301. 831 * 206) Send response r. 832 * 833 * 301) e.seq_num = q.seq_num 834 * 302) e.seq_dup = q.seq_dup 835 * 303) Calculate e.header_crc. 836 * 304) Send error response e. 837 */ 838 839 /* Version 4 request from host */ 840 struct ec_host_request4 { 841 /* 842 * bits 0-3: struct_version: Structure version (=4) 843 * bit 4: is_response: Is response (=0) 844 * bits 5-6: seq_num: Sequence number 845 * bit 7: seq_dup: Sequence duplicate flag 846 */ 847 uint8_t fields0; 848 849 /* 850 * bits 0-4: command_version: Command version 851 * bits 5-6: Reserved (set 0, ignore on read) 852 * bit 7: data_crc_present: Is data CRC present after data 853 */ 854 uint8_t fields1; 855 856 /* Command code (EC_CMD_*) */ 857 uint16_t command; 858 859 /* Length of data which follows this header (not including data CRC) */ 860 uint16_t data_len; 861 862 /* Reserved (set 0, ignore on read) */ 863 uint8_t reserved; 864 865 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 866 uint8_t header_crc; 867 } __ec_align4; 868 869 /* Version 4 response from EC */ 870 struct ec_host_response4 { 871 /* 872 * bits 0-3: struct_version: Structure version (=4) 873 * bit 4: is_response: Is response (=1) 874 * bits 5-6: seq_num: Sequence number 875 * bit 7: seq_dup: Sequence duplicate flag 876 */ 877 uint8_t fields0; 878 879 /* 880 * bits 0-6: Reserved (set 0, ignore on read) 881 * bit 7: data_crc_present: Is data CRC present after data 882 */ 883 uint8_t fields1; 884 885 /* Result code (EC_RES_*) */ 886 uint16_t result; 887 888 /* Length of data which follows this header (not including data CRC) */ 889 uint16_t data_len; 890 891 /* Reserved (set 0, ignore on read) */ 892 uint8_t reserved; 893 894 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 895 uint8_t header_crc; 896 } __ec_align4; 897 898 /* Fields in fields0 byte */ 899 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 900 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 901 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 902 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 903 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 904 905 /* Fields in fields1 byte */ 906 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 907 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 908 909 /*****************************************************************************/ 910 /* 911 * Notes on commands: 912 * 913 * Each command is an 16-bit command value. Commands which take params or 914 * return response data specify structures for that data. If no structure is 915 * specified, the command does not input or output data, respectively. 916 * Parameter/response length is implicit in the structs. Some underlying 917 * communication protocols (I2C, SPI) may add length or checksum headers, but 918 * those are implementation-dependent and not defined here. 919 * 920 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 921 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 922 */ 923 924 /*****************************************************************************/ 925 /* General / test commands */ 926 927 /* 928 * Get protocol version, used to deal with non-backward compatible protocol 929 * changes. 930 */ 931 #define EC_CMD_PROTO_VERSION 0x0000 932 933 /** 934 * struct ec_response_proto_version - Response to the proto version command. 935 * @version: The protocol version. 936 */ 937 struct ec_response_proto_version { 938 uint32_t version; 939 } __ec_align4; 940 941 /* 942 * Hello. This is a simple command to test the EC is responsive to 943 * commands. 944 */ 945 #define EC_CMD_HELLO 0x0001 946 947 /** 948 * struct ec_params_hello - Parameters to the hello command. 949 * @in_data: Pass anything here. 950 */ 951 struct ec_params_hello { 952 uint32_t in_data; 953 } __ec_align4; 954 955 /** 956 * struct ec_response_hello - Response to the hello command. 957 * @out_data: Output will be in_data + 0x01020304. 958 */ 959 struct ec_response_hello { 960 uint32_t out_data; 961 } __ec_align4; 962 963 /* Get version number */ 964 #define EC_CMD_GET_VERSION 0x0002 965 966 enum ec_current_image { 967 EC_IMAGE_UNKNOWN = 0, 968 EC_IMAGE_RO, 969 EC_IMAGE_RW 970 }; 971 972 /** 973 * struct ec_response_get_version - Response to the get version command. 974 * @version_string_ro: Null-terminated RO firmware version string. 975 * @version_string_rw: Null-terminated RW firmware version string. 976 * @reserved: Unused bytes; was previously RW-B firmware version string. 977 * @current_image: One of ec_current_image. 978 */ 979 struct ec_response_get_version { 980 char version_string_ro[32]; 981 char version_string_rw[32]; 982 char reserved[32]; 983 uint32_t current_image; 984 } __ec_align4; 985 986 /* Read test */ 987 #define EC_CMD_READ_TEST 0x0003 988 989 /** 990 * struct ec_params_read_test - Parameters for the read test command. 991 * @offset: Starting value for read buffer. 992 * @size: Size to read in bytes. 993 */ 994 struct ec_params_read_test { 995 uint32_t offset; 996 uint32_t size; 997 } __ec_align4; 998 999 /** 1000 * struct ec_response_read_test - Response to the read test command. 1001 * @data: Data returned by the read test command. 1002 */ 1003 struct ec_response_read_test { 1004 uint32_t data[32]; 1005 } __ec_align4; 1006 1007 /* 1008 * Get build information 1009 * 1010 * Response is null-terminated string. 1011 */ 1012 #define EC_CMD_GET_BUILD_INFO 0x0004 1013 1014 /* Get chip info */ 1015 #define EC_CMD_GET_CHIP_INFO 0x0005 1016 1017 /** 1018 * struct ec_response_get_chip_info - Response to the get chip info command. 1019 * @vendor: Null-terminated string for chip vendor. 1020 * @name: Null-terminated string for chip name. 1021 * @revision: Null-terminated string for chip mask version. 1022 */ 1023 struct ec_response_get_chip_info { 1024 char vendor[32]; 1025 char name[32]; 1026 char revision[32]; 1027 } __ec_align4; 1028 1029 /* Get board HW version */ 1030 #define EC_CMD_GET_BOARD_VERSION 0x0006 1031 1032 /** 1033 * struct ec_response_board_version - Response to the board version command. 1034 * @board_version: A monotonously incrementing number. 1035 */ 1036 struct ec_response_board_version { 1037 uint16_t board_version; 1038 } __ec_align2; 1039 1040 /* 1041 * Read memory-mapped data. 1042 * 1043 * This is an alternate interface to memory-mapped data for bus protocols 1044 * which don't support direct-mapped memory - I2C, SPI, etc. 1045 * 1046 * Response is params.size bytes of data. 1047 */ 1048 #define EC_CMD_READ_MEMMAP 0x0007 1049 1050 /** 1051 * struct ec_params_read_memmap - Parameters for the read memory map command. 1052 * @offset: Offset in memmap (EC_MEMMAP_*). 1053 * @size: Size to read in bytes. 1054 */ 1055 struct ec_params_read_memmap { 1056 uint8_t offset; 1057 uint8_t size; 1058 } __ec_align1; 1059 1060 /* Read versions supported for a command */ 1061 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1062 1063 /** 1064 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1065 * @cmd: Command to check. 1066 */ 1067 struct ec_params_get_cmd_versions { 1068 uint8_t cmd; 1069 } __ec_align1; 1070 1071 /** 1072 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1073 * versions (v1) 1074 * @cmd: Command to check. 1075 */ 1076 struct ec_params_get_cmd_versions_v1 { 1077 uint16_t cmd; 1078 } __ec_align2; 1079 1080 /** 1081 * struct ec_response_get_cmd_version - Response to the get command versions. 1082 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1083 * a desired version. 1084 */ 1085 struct ec_response_get_cmd_versions { 1086 uint32_t version_mask; 1087 } __ec_align4; 1088 1089 /* 1090 * Check EC communications status (busy). This is needed on i2c/spi but not 1091 * on lpc since it has its own out-of-band busy indicator. 1092 * 1093 * lpc must read the status from the command register. Attempting this on 1094 * lpc will overwrite the args/parameter space and corrupt its data. 1095 */ 1096 #define EC_CMD_GET_COMMS_STATUS 0x0009 1097 1098 /* Avoid using ec_status which is for return values */ 1099 enum ec_comms_status { 1100 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1101 }; 1102 1103 /** 1104 * struct ec_response_get_comms_status - Response to the get comms status 1105 * command. 1106 * @flags: Mask of enum ec_comms_status. 1107 */ 1108 struct ec_response_get_comms_status { 1109 uint32_t flags; /* Mask of enum ec_comms_status */ 1110 } __ec_align4; 1111 1112 /* Fake a variety of responses, purely for testing purposes. */ 1113 #define EC_CMD_TEST_PROTOCOL 0x000A 1114 1115 /* Tell the EC what to send back to us. */ 1116 struct ec_params_test_protocol { 1117 uint32_t ec_result; 1118 uint32_t ret_len; 1119 uint8_t buf[32]; 1120 } __ec_align4; 1121 1122 /* Here it comes... */ 1123 struct ec_response_test_protocol { 1124 uint8_t buf[32]; 1125 } __ec_align4; 1126 1127 /* Get protocol information */ 1128 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1129 1130 /* Flags for ec_response_get_protocol_info.flags */ 1131 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1132 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1133 1134 /** 1135 * struct ec_response_get_protocol_info - Response to the get protocol info. 1136 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1137 * version n). 1138 * @max_request_packet_size: Maximum request packet size in bytes. 1139 * @max_response_packet_size: Maximum response packet size in bytes. 1140 * @flags: see EC_PROTOCOL_INFO_* 1141 */ 1142 struct ec_response_get_protocol_info { 1143 /* Fields which exist if at least protocol version 3 supported */ 1144 uint32_t protocol_versions; 1145 uint16_t max_request_packet_size; 1146 uint16_t max_response_packet_size; 1147 uint32_t flags; 1148 } __ec_align4; 1149 1150 1151 /*****************************************************************************/ 1152 /* Get/Set miscellaneous values */ 1153 1154 /* The upper byte of .flags tells what to do (nothing means "get") */ 1155 #define EC_GSV_SET 0x80000000 1156 1157 /* 1158 * The lower three bytes of .flags identifies the parameter, if that has 1159 * meaning for an individual command. 1160 */ 1161 #define EC_GSV_PARAM_MASK 0x00ffffff 1162 1163 struct ec_params_get_set_value { 1164 uint32_t flags; 1165 uint32_t value; 1166 } __ec_align4; 1167 1168 struct ec_response_get_set_value { 1169 uint32_t flags; 1170 uint32_t value; 1171 } __ec_align4; 1172 1173 /* More than one command can use these structs to get/set parameters. */ 1174 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1175 1176 /*****************************************************************************/ 1177 /* List the features supported by the firmware */ 1178 #define EC_CMD_GET_FEATURES 0x000D 1179 1180 /* Supported features */ 1181 enum ec_feature_code { 1182 /* 1183 * This image contains a limited set of features. Another image 1184 * in RW partition may support more features. 1185 */ 1186 EC_FEATURE_LIMITED = 0, 1187 /* 1188 * Commands for probing/reading/writing/erasing the flash in the 1189 * EC are present. 1190 */ 1191 EC_FEATURE_FLASH = 1, 1192 /* 1193 * Can control the fan speed directly. 1194 */ 1195 EC_FEATURE_PWM_FAN = 2, 1196 /* 1197 * Can control the intensity of the keyboard backlight. 1198 */ 1199 EC_FEATURE_PWM_KEYB = 3, 1200 /* 1201 * Support Google lightbar, introduced on Pixel. 1202 */ 1203 EC_FEATURE_LIGHTBAR = 4, 1204 /* Control of LEDs */ 1205 EC_FEATURE_LED = 5, 1206 /* Exposes an interface to control gyro and sensors. 1207 * The host goes through the EC to access these sensors. 1208 * In addition, the EC may provide composite sensors, like lid angle. 1209 */ 1210 EC_FEATURE_MOTION_SENSE = 6, 1211 /* The keyboard is controlled by the EC */ 1212 EC_FEATURE_KEYB = 7, 1213 /* The AP can use part of the EC flash as persistent storage. */ 1214 EC_FEATURE_PSTORE = 8, 1215 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1216 EC_FEATURE_PORT80 = 9, 1217 /* 1218 * Thermal management: include TMP specific commands. 1219 * Higher level than direct fan control. 1220 */ 1221 EC_FEATURE_THERMAL = 10, 1222 /* Can switch the screen backlight on/off */ 1223 EC_FEATURE_BKLIGHT_SWITCH = 11, 1224 /* Can switch the wifi module on/off */ 1225 EC_FEATURE_WIFI_SWITCH = 12, 1226 /* Monitor host events, through for example SMI or SCI */ 1227 EC_FEATURE_HOST_EVENTS = 13, 1228 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1229 EC_FEATURE_GPIO = 14, 1230 /* The EC can send i2c messages to downstream devices. */ 1231 EC_FEATURE_I2C = 15, 1232 /* Command to control charger are included */ 1233 EC_FEATURE_CHARGER = 16, 1234 /* Simple battery support. */ 1235 EC_FEATURE_BATTERY = 17, 1236 /* 1237 * Support Smart battery protocol 1238 * (Common Smart Battery System Interface Specification) 1239 */ 1240 EC_FEATURE_SMART_BATTERY = 18, 1241 /* EC can detect when the host hangs. */ 1242 EC_FEATURE_HANG_DETECT = 19, 1243 /* Report power information, for pit only */ 1244 EC_FEATURE_PMU = 20, 1245 /* Another Cros EC device is present downstream of this one */ 1246 EC_FEATURE_SUB_MCU = 21, 1247 /* Support USB Power delivery (PD) commands */ 1248 EC_FEATURE_USB_PD = 22, 1249 /* Control USB multiplexer, for audio through USB port for instance. */ 1250 EC_FEATURE_USB_MUX = 23, 1251 /* Motion Sensor code has an internal software FIFO */ 1252 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1253 /* Support temporary secure vstore */ 1254 EC_FEATURE_VSTORE = 25, 1255 /* EC decides on USB-C SS mux state, muxes configured by host */ 1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1257 /* EC has RTC feature that can be controlled by host commands */ 1258 EC_FEATURE_RTC = 27, 1259 /* The MCU exposes a Fingerprint sensor */ 1260 EC_FEATURE_FINGERPRINT = 28, 1261 /* The MCU exposes a Touchpad */ 1262 EC_FEATURE_TOUCHPAD = 29, 1263 /* The MCU has RWSIG task enabled */ 1264 EC_FEATURE_RWSIG = 30, 1265 /* EC has device events support */ 1266 EC_FEATURE_DEVICE_EVENT = 31, 1267 /* EC supports the unified wake masks for LPC/eSPI systems */ 1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1269 /* EC supports 64-bit host events */ 1270 EC_FEATURE_HOST_EVENT64 = 33, 1271 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1272 EC_FEATURE_EXEC_IN_RAM = 34, 1273 /* EC supports CEC commands */ 1274 EC_FEATURE_CEC = 35, 1275 /* EC supports tight sensor timestamping. */ 1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1277 /* 1278 * EC supports tablet mode detection aligned to Chrome and allows 1279 * setting of threshold by host command using 1280 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1281 */ 1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1283 /* The MCU is a System Companion Processor (SCP). */ 1284 EC_FEATURE_SCP = 39, 1285 /* The MCU is an Integrated Sensor Hub */ 1286 EC_FEATURE_ISH = 40, 1287 }; 1288 1289 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1290 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1291 1292 struct ec_response_get_features { 1293 uint32_t flags[2]; 1294 } __ec_align4; 1295 1296 /*****************************************************************************/ 1297 /* Get the board's SKU ID from EC */ 1298 #define EC_CMD_GET_SKU_ID 0x000E 1299 1300 /* Set SKU ID from AP */ 1301 #define EC_CMD_SET_SKU_ID 0x000F 1302 1303 struct ec_sku_id_info { 1304 uint32_t sku_id; 1305 } __ec_align4; 1306 1307 /*****************************************************************************/ 1308 /* Flash commands */ 1309 1310 /* Get flash info */ 1311 #define EC_CMD_FLASH_INFO 0x0010 1312 #define EC_VER_FLASH_INFO 2 1313 1314 /** 1315 * struct ec_response_flash_info - Response to the flash info command. 1316 * @flash_size: Usable flash size in bytes. 1317 * @write_block_size: Write block size. Write offset and size must be a 1318 * multiple of this. 1319 * @erase_block_size: Erase block size. Erase offset and size must be a 1320 * multiple of this. 1321 * @protect_block_size: Protection block size. Protection offset and size 1322 * must be a multiple of this. 1323 * 1324 * Version 0 returns these fields. 1325 */ 1326 struct ec_response_flash_info { 1327 uint32_t flash_size; 1328 uint32_t write_block_size; 1329 uint32_t erase_block_size; 1330 uint32_t protect_block_size; 1331 } __ec_align4; 1332 1333 /* 1334 * Flags for version 1+ flash info command 1335 * EC flash erases bits to 0 instead of 1. 1336 */ 1337 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1338 1339 /* 1340 * Flash must be selected for read/write/erase operations to succeed. This may 1341 * be necessary on a chip where write/erase can be corrupted by other board 1342 * activity, or where the chip needs to enable some sort of programming voltage, 1343 * or where the read/write/erase operations require cleanly suspending other 1344 * chip functionality. 1345 */ 1346 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1347 1348 /** 1349 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1350 * @flash_size: Usable flash size in bytes. 1351 * @write_block_size: Write block size. Write offset and size must be a 1352 * multiple of this. 1353 * @erase_block_size: Erase block size. Erase offset and size must be a 1354 * multiple of this. 1355 * @protect_block_size: Protection block size. Protection offset and size 1356 * must be a multiple of this. 1357 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1358 * size is exactly this and offset is a multiple of this. 1359 * For example, an EC may have a write buffer which can do 1360 * half-page operations if data is aligned, and a slower 1361 * word-at-a-time write mode. 1362 * @flags: Flags; see EC_FLASH_INFO_* 1363 * 1364 * Version 1 returns the same initial fields as version 0, with additional 1365 * fields following. 1366 * 1367 * gcc anonymous structs don't seem to get along with the __packed directive; 1368 * if they did we'd define the version 0 structure as a sub-structure of this 1369 * one. 1370 * 1371 * Version 2 supports flash banks of different sizes: 1372 * The caller specified the number of banks it has preallocated 1373 * (num_banks_desc) 1374 * The EC returns the number of banks describing the flash memory. 1375 * It adds banks descriptions up to num_banks_desc. 1376 */ 1377 struct ec_response_flash_info_1 { 1378 /* Version 0 fields; see above for description */ 1379 uint32_t flash_size; 1380 uint32_t write_block_size; 1381 uint32_t erase_block_size; 1382 uint32_t protect_block_size; 1383 1384 /* Version 1 adds these fields: */ 1385 uint32_t write_ideal_size; 1386 uint32_t flags; 1387 } __ec_align4; 1388 1389 struct ec_params_flash_info_2 { 1390 /* Number of banks to describe */ 1391 uint16_t num_banks_desc; 1392 /* Reserved; set 0; ignore on read */ 1393 uint8_t reserved[2]; 1394 } __ec_align4; 1395 1396 struct ec_flash_bank { 1397 /* Number of sector is in this bank. */ 1398 uint16_t count; 1399 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1400 uint8_t size_exp; 1401 /* Minimal write size for the sectors in this bank */ 1402 uint8_t write_size_exp; 1403 /* Erase size for the sectors in this bank */ 1404 uint8_t erase_size_exp; 1405 /* Size for write protection, usually identical to erase size. */ 1406 uint8_t protect_size_exp; 1407 /* Reserved; set 0; ignore on read */ 1408 uint8_t reserved[2]; 1409 }; 1410 1411 struct ec_response_flash_info_2 { 1412 /* Total flash in the EC. */ 1413 uint32_t flash_size; 1414 /* Flags; see EC_FLASH_INFO_* */ 1415 uint32_t flags; 1416 /* Maximum size to use to send data to write to the EC. */ 1417 uint32_t write_ideal_size; 1418 /* Number of banks present in the EC. */ 1419 uint16_t num_banks_total; 1420 /* Number of banks described in banks array. */ 1421 uint16_t num_banks_desc; 1422 struct ec_flash_bank banks[]; 1423 } __ec_align4; 1424 1425 /* 1426 * Read flash 1427 * 1428 * Response is params.size bytes of data. 1429 */ 1430 #define EC_CMD_FLASH_READ 0x0011 1431 1432 /** 1433 * struct ec_params_flash_read - Parameters for the flash read command. 1434 * @offset: Byte offset to read. 1435 * @size: Size to read in bytes. 1436 */ 1437 struct ec_params_flash_read { 1438 uint32_t offset; 1439 uint32_t size; 1440 } __ec_align4; 1441 1442 /* Write flash */ 1443 #define EC_CMD_FLASH_WRITE 0x0012 1444 #define EC_VER_FLASH_WRITE 1 1445 1446 /* Version 0 of the flash command supported only 64 bytes of data */ 1447 #define EC_FLASH_WRITE_VER0_SIZE 64 1448 1449 /** 1450 * struct ec_params_flash_write - Parameters for the flash write command. 1451 * @offset: Byte offset to write. 1452 * @size: Size to write in bytes. 1453 */ 1454 struct ec_params_flash_write { 1455 uint32_t offset; 1456 uint32_t size; 1457 /* Followed by data to write */ 1458 } __ec_align4; 1459 1460 /* Erase flash */ 1461 #define EC_CMD_FLASH_ERASE 0x0013 1462 1463 /** 1464 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1465 * @offset: Byte offset to erase. 1466 * @size: Size to erase in bytes. 1467 */ 1468 struct ec_params_flash_erase { 1469 uint32_t offset; 1470 uint32_t size; 1471 } __ec_align4; 1472 1473 /* 1474 * v1 add async erase: 1475 * subcommands can returns: 1476 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1477 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1478 * EC_RES_ERROR : other errors. 1479 * EC_RES_BUSY : an existing erase operation is in progress. 1480 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1481 * 1482 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1483 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1484 * the proper result. 1485 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1486 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1487 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1488 * permitted while erasing. (For instance, STM32F4). 1489 */ 1490 enum ec_flash_erase_cmd { 1491 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1492 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1493 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1494 }; 1495 1496 /** 1497 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1498 * @cmd: One of ec_flash_erase_cmd. 1499 * @reserved: Pad byte; currently always contains 0. 1500 * @flag: No flags defined yet; set to 0. 1501 * @params: Same as v0 parameters. 1502 */ 1503 struct ec_params_flash_erase_v1 { 1504 uint8_t cmd; 1505 uint8_t reserved; 1506 uint16_t flag; 1507 struct ec_params_flash_erase params; 1508 } __ec_align4; 1509 1510 /* 1511 * Get/set flash protection. 1512 * 1513 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1514 * firmware write protect GPIO, not all flags will take effect immediately; 1515 * some flags require a subsequent hard reset to take effect. Check the 1516 * returned flags bits to see what actually happened. 1517 * 1518 * If mask=0, simply returns the current flags state. 1519 */ 1520 #define EC_CMD_FLASH_PROTECT 0x0015 1521 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1522 1523 /* Flags for flash protection */ 1524 /* RO flash code protected when the EC boots */ 1525 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1526 /* 1527 * RO flash code protected now. If this bit is set, at-boot status cannot 1528 * be changed. 1529 */ 1530 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1531 /* Entire flash code protected now, until reboot. */ 1532 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1533 /* Flash write protect GPIO is asserted now */ 1534 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1535 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1536 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1537 /* 1538 * Error - flash protection is in inconsistent state. At least one bank of 1539 * flash which should be protected is not protected. Usually fixed by 1540 * re-requesting the desired flags, or by a hard reset if that fails. 1541 */ 1542 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1543 /* Entire flash code protected when the EC boots */ 1544 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1545 /* RW flash code protected when the EC boots */ 1546 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1547 /* RW flash code protected now. */ 1548 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1549 /* Rollback information flash region protected when the EC boots */ 1550 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1551 /* Rollback information flash region protected now */ 1552 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1553 1554 1555 /** 1556 * struct ec_params_flash_protect - Parameters for the flash protect command. 1557 * @mask: Bits in flags to apply. 1558 * @flags: New flags to apply. 1559 */ 1560 struct ec_params_flash_protect { 1561 uint32_t mask; 1562 uint32_t flags; 1563 } __ec_align4; 1564 1565 /** 1566 * struct ec_response_flash_protect - Response to the flash protect command. 1567 * @flags: Current value of flash protect flags. 1568 * @valid_flags: Flags which are valid on this platform. This allows the 1569 * caller to distinguish between flags which aren't set vs. flags 1570 * which can't be set on this platform. 1571 * @writable_flags: Flags which can be changed given the current protection 1572 * state. 1573 */ 1574 struct ec_response_flash_protect { 1575 uint32_t flags; 1576 uint32_t valid_flags; 1577 uint32_t writable_flags; 1578 } __ec_align4; 1579 1580 /* 1581 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1582 * write protect. These commands may be reused with version > 0. 1583 */ 1584 1585 /* Get the region offset/size */ 1586 #define EC_CMD_FLASH_REGION_INFO 0x0016 1587 #define EC_VER_FLASH_REGION_INFO 1 1588 1589 enum ec_flash_region { 1590 /* Region which holds read-only EC image */ 1591 EC_FLASH_REGION_RO = 0, 1592 /* 1593 * Region which holds active RW image. 'Active' is different from 1594 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1595 * scheduled to run, active/non-active applies only to RW images (for 1596 * the same reason 'update' applies only to RW images. It's a state of 1597 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1598 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1599 * doesn't enter 'running' state but it's still active on a flash. 1600 */ 1601 EC_FLASH_REGION_ACTIVE, 1602 /* 1603 * Region which should be write-protected in the factory (a superset of 1604 * EC_FLASH_REGION_RO) 1605 */ 1606 EC_FLASH_REGION_WP_RO, 1607 /* Region which holds updatable (non-active) RW image */ 1608 EC_FLASH_REGION_UPDATE, 1609 /* Number of regions */ 1610 EC_FLASH_REGION_COUNT, 1611 }; 1612 /* 1613 * 'RW' is vague if there are multiple RW images; we mean the active one, 1614 * so the old constant is deprecated. 1615 */ 1616 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1617 1618 /** 1619 * struct ec_params_flash_region_info - Parameters for the flash region info 1620 * command. 1621 * @region: Flash region; see EC_FLASH_REGION_* 1622 */ 1623 struct ec_params_flash_region_info { 1624 uint32_t region; 1625 } __ec_align4; 1626 1627 struct ec_response_flash_region_info { 1628 uint32_t offset; 1629 uint32_t size; 1630 } __ec_align4; 1631 1632 /* Read/write VbNvContext */ 1633 #define EC_CMD_VBNV_CONTEXT 0x0017 1634 #define EC_VER_VBNV_CONTEXT 1 1635 #define EC_VBNV_BLOCK_SIZE 16 1636 1637 enum ec_vbnvcontext_op { 1638 EC_VBNV_CONTEXT_OP_READ, 1639 EC_VBNV_CONTEXT_OP_WRITE, 1640 }; 1641 1642 struct ec_params_vbnvcontext { 1643 uint32_t op; 1644 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1645 } __ec_align4; 1646 1647 struct ec_response_vbnvcontext { 1648 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1649 } __ec_align4; 1650 1651 1652 /* Get SPI flash information */ 1653 #define EC_CMD_FLASH_SPI_INFO 0x0018 1654 1655 struct ec_response_flash_spi_info { 1656 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1657 uint8_t jedec[3]; 1658 1659 /* Pad byte; currently always contains 0 */ 1660 uint8_t reserved0; 1661 1662 /* Manufacturer / device ID from command 0x90 */ 1663 uint8_t mfr_dev_id[2]; 1664 1665 /* Status registers from command 0x05 and 0x35 */ 1666 uint8_t sr1, sr2; 1667 } __ec_align1; 1668 1669 1670 /* Select flash during flash operations */ 1671 #define EC_CMD_FLASH_SELECT 0x0019 1672 1673 /** 1674 * struct ec_params_flash_select - Parameters for the flash select command. 1675 * @select: 1 to select flash, 0 to deselect flash 1676 */ 1677 struct ec_params_flash_select { 1678 uint8_t select; 1679 } __ec_align4; 1680 1681 1682 /*****************************************************************************/ 1683 /* PWM commands */ 1684 1685 /* Get fan target RPM */ 1686 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1687 1688 struct ec_response_pwm_get_fan_rpm { 1689 uint32_t rpm; 1690 } __ec_align4; 1691 1692 /* Set target fan RPM */ 1693 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1694 1695 /* Version 0 of input params */ 1696 struct ec_params_pwm_set_fan_target_rpm_v0 { 1697 uint32_t rpm; 1698 } __ec_align4; 1699 1700 /* Version 1 of input params */ 1701 struct ec_params_pwm_set_fan_target_rpm_v1 { 1702 uint32_t rpm; 1703 uint8_t fan_idx; 1704 } __ec_align_size1; 1705 1706 /* Get keyboard backlight */ 1707 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1708 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1709 1710 struct ec_response_pwm_get_keyboard_backlight { 1711 uint8_t percent; 1712 uint8_t enabled; 1713 } __ec_align1; 1714 1715 /* Set keyboard backlight */ 1716 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1717 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1718 1719 struct ec_params_pwm_set_keyboard_backlight { 1720 uint8_t percent; 1721 } __ec_align1; 1722 1723 /* Set target fan PWM duty cycle */ 1724 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1725 1726 /* Version 0 of input params */ 1727 struct ec_params_pwm_set_fan_duty_v0 { 1728 uint32_t percent; 1729 } __ec_align4; 1730 1731 /* Version 1 of input params */ 1732 struct ec_params_pwm_set_fan_duty_v1 { 1733 uint32_t percent; 1734 uint8_t fan_idx; 1735 } __ec_align_size1; 1736 1737 #define EC_CMD_PWM_SET_DUTY 0x0025 1738 /* 16 bit duty cycle, 0xffff = 100% */ 1739 #define EC_PWM_MAX_DUTY 0xffff 1740 1741 enum ec_pwm_type { 1742 /* All types, indexed by board-specific enum pwm_channel */ 1743 EC_PWM_TYPE_GENERIC = 0, 1744 /* Keyboard backlight */ 1745 EC_PWM_TYPE_KB_LIGHT, 1746 /* Display backlight */ 1747 EC_PWM_TYPE_DISPLAY_LIGHT, 1748 EC_PWM_TYPE_COUNT, 1749 }; 1750 1751 struct ec_params_pwm_set_duty { 1752 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1753 uint8_t pwm_type; /* ec_pwm_type */ 1754 uint8_t index; /* Type-specific index, or 0 if unique */ 1755 } __ec_align4; 1756 1757 #define EC_CMD_PWM_GET_DUTY 0x0026 1758 1759 struct ec_params_pwm_get_duty { 1760 uint8_t pwm_type; /* ec_pwm_type */ 1761 uint8_t index; /* Type-specific index, or 0 if unique */ 1762 } __ec_align1; 1763 1764 struct ec_response_pwm_get_duty { 1765 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1766 } __ec_align2; 1767 1768 /*****************************************************************************/ 1769 /* 1770 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1771 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1772 * into a subcommand. We'll make separate structs for subcommands with 1773 * different input args, so that we know how much to expect. 1774 */ 1775 #define EC_CMD_LIGHTBAR_CMD 0x0028 1776 1777 struct rgb_s { 1778 uint8_t r, g, b; 1779 } __ec_todo_unpacked; 1780 1781 #define LB_BATTERY_LEVELS 4 1782 1783 /* 1784 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1785 * host command, but the alignment is the same regardless. Keep it that way. 1786 */ 1787 struct lightbar_params_v0 { 1788 /* Timing */ 1789 int32_t google_ramp_up; 1790 int32_t google_ramp_down; 1791 int32_t s3s0_ramp_up; 1792 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1793 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1794 int32_t s0s3_ramp_down; 1795 int32_t s3_sleep_for; 1796 int32_t s3_ramp_up; 1797 int32_t s3_ramp_down; 1798 1799 /* Oscillation */ 1800 uint8_t new_s0; 1801 uint8_t osc_min[2]; /* AC=0/1 */ 1802 uint8_t osc_max[2]; /* AC=0/1 */ 1803 uint8_t w_ofs[2]; /* AC=0/1 */ 1804 1805 /* Brightness limits based on the backlight and AC. */ 1806 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1807 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1808 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1809 1810 /* Battery level thresholds */ 1811 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1812 1813 /* Map [AC][battery_level] to color index */ 1814 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1815 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1816 1817 /* Color palette */ 1818 struct rgb_s color[8]; /* 0-3 are Google colors */ 1819 } __ec_todo_packed; 1820 1821 struct lightbar_params_v1 { 1822 /* Timing */ 1823 int32_t google_ramp_up; 1824 int32_t google_ramp_down; 1825 int32_t s3s0_ramp_up; 1826 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1827 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1828 int32_t s0s3_ramp_down; 1829 int32_t s3_sleep_for; 1830 int32_t s3_ramp_up; 1831 int32_t s3_ramp_down; 1832 int32_t s5_ramp_up; 1833 int32_t s5_ramp_down; 1834 int32_t tap_tick_delay; 1835 int32_t tap_gate_delay; 1836 int32_t tap_display_time; 1837 1838 /* Tap-for-battery params */ 1839 uint8_t tap_pct_red; 1840 uint8_t tap_pct_green; 1841 uint8_t tap_seg_min_on; 1842 uint8_t tap_seg_max_on; 1843 uint8_t tap_seg_osc; 1844 uint8_t tap_idx[3]; 1845 1846 /* Oscillation */ 1847 uint8_t osc_min[2]; /* AC=0/1 */ 1848 uint8_t osc_max[2]; /* AC=0/1 */ 1849 uint8_t w_ofs[2]; /* AC=0/1 */ 1850 1851 /* Brightness limits based on the backlight and AC. */ 1852 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1853 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1854 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1855 1856 /* Battery level thresholds */ 1857 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1858 1859 /* Map [AC][battery_level] to color index */ 1860 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1861 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1862 1863 /* s5: single color pulse on inhibited power-up */ 1864 uint8_t s5_idx; 1865 1866 /* Color palette */ 1867 struct rgb_s color[8]; /* 0-3 are Google colors */ 1868 } __ec_todo_packed; 1869 1870 /* Lightbar command params v2 1871 * crbug.com/467716 1872 * 1873 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1874 * logical groups to make it more manageable ( < 120 bytes). 1875 * 1876 * NOTE: Each of these groups must be less than 120 bytes. 1877 */ 1878 1879 struct lightbar_params_v2_timing { 1880 /* Timing */ 1881 int32_t google_ramp_up; 1882 int32_t google_ramp_down; 1883 int32_t s3s0_ramp_up; 1884 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1885 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1886 int32_t s0s3_ramp_down; 1887 int32_t s3_sleep_for; 1888 int32_t s3_ramp_up; 1889 int32_t s3_ramp_down; 1890 int32_t s5_ramp_up; 1891 int32_t s5_ramp_down; 1892 int32_t tap_tick_delay; 1893 int32_t tap_gate_delay; 1894 int32_t tap_display_time; 1895 } __ec_todo_packed; 1896 1897 struct lightbar_params_v2_tap { 1898 /* Tap-for-battery params */ 1899 uint8_t tap_pct_red; 1900 uint8_t tap_pct_green; 1901 uint8_t tap_seg_min_on; 1902 uint8_t tap_seg_max_on; 1903 uint8_t tap_seg_osc; 1904 uint8_t tap_idx[3]; 1905 } __ec_todo_packed; 1906 1907 struct lightbar_params_v2_oscillation { 1908 /* Oscillation */ 1909 uint8_t osc_min[2]; /* AC=0/1 */ 1910 uint8_t osc_max[2]; /* AC=0/1 */ 1911 uint8_t w_ofs[2]; /* AC=0/1 */ 1912 } __ec_todo_packed; 1913 1914 struct lightbar_params_v2_brightness { 1915 /* Brightness limits based on the backlight and AC. */ 1916 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1917 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1918 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1919 } __ec_todo_packed; 1920 1921 struct lightbar_params_v2_thresholds { 1922 /* Battery level thresholds */ 1923 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1924 } __ec_todo_packed; 1925 1926 struct lightbar_params_v2_colors { 1927 /* Map [AC][battery_level] to color index */ 1928 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1929 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1930 1931 /* s5: single color pulse on inhibited power-up */ 1932 uint8_t s5_idx; 1933 1934 /* Color palette */ 1935 struct rgb_s color[8]; /* 0-3 are Google colors */ 1936 } __ec_todo_packed; 1937 1938 /* Lightbar program. */ 1939 #define EC_LB_PROG_LEN 192 1940 struct lightbar_program { 1941 uint8_t size; 1942 uint8_t data[EC_LB_PROG_LEN]; 1943 } __ec_todo_unpacked; 1944 1945 struct ec_params_lightbar { 1946 uint8_t cmd; /* Command (see enum lightbar_command) */ 1947 union { 1948 /* 1949 * The following commands have no args: 1950 * 1951 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1952 * version, get_brightness, get_demo, suspend, resume, 1953 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 1954 * get_params_v2_bright, get_params_v2_thlds, 1955 * get_params_v2_colors 1956 * 1957 * Don't use an empty struct, because C++ hates that. 1958 */ 1959 1960 struct __ec_todo_unpacked { 1961 uint8_t num; 1962 } set_brightness, seq, demo; 1963 1964 struct __ec_todo_unpacked { 1965 uint8_t ctrl, reg, value; 1966 } reg; 1967 1968 struct __ec_todo_unpacked { 1969 uint8_t led, red, green, blue; 1970 } set_rgb; 1971 1972 struct __ec_todo_unpacked { 1973 uint8_t led; 1974 } get_rgb; 1975 1976 struct __ec_todo_unpacked { 1977 uint8_t enable; 1978 } manual_suspend_ctrl; 1979 1980 struct lightbar_params_v0 set_params_v0; 1981 struct lightbar_params_v1 set_params_v1; 1982 1983 struct lightbar_params_v2_timing set_v2par_timing; 1984 struct lightbar_params_v2_tap set_v2par_tap; 1985 struct lightbar_params_v2_oscillation set_v2par_osc; 1986 struct lightbar_params_v2_brightness set_v2par_bright; 1987 struct lightbar_params_v2_thresholds set_v2par_thlds; 1988 struct lightbar_params_v2_colors set_v2par_colors; 1989 1990 struct lightbar_program set_program; 1991 }; 1992 } __ec_todo_packed; 1993 1994 struct ec_response_lightbar { 1995 union { 1996 struct __ec_todo_unpacked { 1997 struct __ec_todo_unpacked { 1998 uint8_t reg; 1999 uint8_t ic0; 2000 uint8_t ic1; 2001 } vals[23]; 2002 } dump; 2003 2004 struct __ec_todo_unpacked { 2005 uint8_t num; 2006 } get_seq, get_brightness, get_demo; 2007 2008 struct lightbar_params_v0 get_params_v0; 2009 struct lightbar_params_v1 get_params_v1; 2010 2011 2012 struct lightbar_params_v2_timing get_params_v2_timing; 2013 struct lightbar_params_v2_tap get_params_v2_tap; 2014 struct lightbar_params_v2_oscillation get_params_v2_osc; 2015 struct lightbar_params_v2_brightness get_params_v2_bright; 2016 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2017 struct lightbar_params_v2_colors get_params_v2_colors; 2018 2019 struct __ec_todo_unpacked { 2020 uint32_t num; 2021 uint32_t flags; 2022 } version; 2023 2024 struct __ec_todo_unpacked { 2025 uint8_t red, green, blue; 2026 } get_rgb; 2027 2028 /* 2029 * The following commands have no response: 2030 * 2031 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2032 * set_params_v0, set_params_v1, set_program, 2033 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2034 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2035 * set_v2par_thlds, set_v2par_colors 2036 */ 2037 }; 2038 } __ec_todo_packed; 2039 2040 /* Lightbar commands */ 2041 enum lightbar_command { 2042 LIGHTBAR_CMD_DUMP = 0, 2043 LIGHTBAR_CMD_OFF = 1, 2044 LIGHTBAR_CMD_ON = 2, 2045 LIGHTBAR_CMD_INIT = 3, 2046 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2047 LIGHTBAR_CMD_SEQ = 5, 2048 LIGHTBAR_CMD_REG = 6, 2049 LIGHTBAR_CMD_SET_RGB = 7, 2050 LIGHTBAR_CMD_GET_SEQ = 8, 2051 LIGHTBAR_CMD_DEMO = 9, 2052 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2053 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2054 LIGHTBAR_CMD_VERSION = 12, 2055 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2056 LIGHTBAR_CMD_GET_RGB = 14, 2057 LIGHTBAR_CMD_GET_DEMO = 15, 2058 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2059 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2060 LIGHTBAR_CMD_SET_PROGRAM = 18, 2061 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2062 LIGHTBAR_CMD_SUSPEND = 20, 2063 LIGHTBAR_CMD_RESUME = 21, 2064 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2065 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2066 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2067 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2068 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2069 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2070 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2071 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2072 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2073 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2074 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2075 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2076 LIGHTBAR_NUM_CMDS 2077 }; 2078 2079 /*****************************************************************************/ 2080 /* LED control commands */ 2081 2082 #define EC_CMD_LED_CONTROL 0x0029 2083 2084 enum ec_led_id { 2085 /* LED to indicate battery state of charge */ 2086 EC_LED_ID_BATTERY_LED = 0, 2087 /* 2088 * LED to indicate system power state (on or in suspend). 2089 * May be on power button or on C-panel. 2090 */ 2091 EC_LED_ID_POWER_LED, 2092 /* LED on power adapter or its plug */ 2093 EC_LED_ID_ADAPTER_LED, 2094 /* LED to indicate left side */ 2095 EC_LED_ID_LEFT_LED, 2096 /* LED to indicate right side */ 2097 EC_LED_ID_RIGHT_LED, 2098 /* LED to indicate recovery mode with HW_REINIT */ 2099 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2100 /* LED to indicate sysrq debug mode. */ 2101 EC_LED_ID_SYSRQ_DEBUG_LED, 2102 2103 EC_LED_ID_COUNT 2104 }; 2105 2106 /* LED control flags */ 2107 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2108 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2109 2110 enum ec_led_colors { 2111 EC_LED_COLOR_RED = 0, 2112 EC_LED_COLOR_GREEN, 2113 EC_LED_COLOR_BLUE, 2114 EC_LED_COLOR_YELLOW, 2115 EC_LED_COLOR_WHITE, 2116 EC_LED_COLOR_AMBER, 2117 2118 EC_LED_COLOR_COUNT 2119 }; 2120 2121 struct ec_params_led_control { 2122 uint8_t led_id; /* Which LED to control */ 2123 uint8_t flags; /* Control flags */ 2124 2125 uint8_t brightness[EC_LED_COLOR_COUNT]; 2126 } __ec_align1; 2127 2128 struct ec_response_led_control { 2129 /* 2130 * Available brightness value range. 2131 * 2132 * Range 0 means color channel not present. 2133 * Range 1 means on/off control. 2134 * Other values means the LED is control by PWM. 2135 */ 2136 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2137 } __ec_align1; 2138 2139 /*****************************************************************************/ 2140 /* Verified boot commands */ 2141 2142 /* 2143 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2144 * reused for other purposes with version > 0. 2145 */ 2146 2147 /* Verified boot hash command */ 2148 #define EC_CMD_VBOOT_HASH 0x002A 2149 2150 struct ec_params_vboot_hash { 2151 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2152 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2153 uint8_t nonce_size; /* Nonce size; may be 0 */ 2154 uint8_t reserved0; /* Reserved; set 0 */ 2155 uint32_t offset; /* Offset in flash to hash */ 2156 uint32_t size; /* Number of bytes to hash */ 2157 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2158 } __ec_align4; 2159 2160 struct ec_response_vboot_hash { 2161 uint8_t status; /* enum ec_vboot_hash_status */ 2162 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2163 uint8_t digest_size; /* Size of hash digest in bytes */ 2164 uint8_t reserved0; /* Ignore; will be 0 */ 2165 uint32_t offset; /* Offset in flash which was hashed */ 2166 uint32_t size; /* Number of bytes hashed */ 2167 uint8_t hash_digest[64]; /* Hash digest data */ 2168 } __ec_align4; 2169 2170 enum ec_vboot_hash_cmd { 2171 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2172 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2173 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2174 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2175 }; 2176 2177 enum ec_vboot_hash_type { 2178 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2179 }; 2180 2181 enum ec_vboot_hash_status { 2182 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2183 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2184 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2185 }; 2186 2187 /* 2188 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2189 * If one of these is specified, the EC will automatically update offset and 2190 * size to the correct values for the specified image (RO or RW). 2191 */ 2192 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2193 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2194 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2195 2196 /* 2197 * 'RW' is vague if there are multiple RW images; we mean the active one, 2198 * so the old constant is deprecated. 2199 */ 2200 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2201 2202 /*****************************************************************************/ 2203 /* 2204 * Motion sense commands. We'll make separate structs for sub-commands with 2205 * different input args, so that we know how much to expect. 2206 */ 2207 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2208 2209 /* Motion sense commands */ 2210 enum motionsense_command { 2211 /* 2212 * Dump command returns all motion sensor data including motion sense 2213 * module flags and individual sensor flags. 2214 */ 2215 MOTIONSENSE_CMD_DUMP = 0, 2216 2217 /* 2218 * Info command returns data describing the details of a given sensor, 2219 * including enum motionsensor_type, enum motionsensor_location, and 2220 * enum motionsensor_chip. 2221 */ 2222 MOTIONSENSE_CMD_INFO = 1, 2223 2224 /* 2225 * EC Rate command is a setter/getter command for the EC sampling rate 2226 * in milliseconds. 2227 * It is per sensor, the EC run sample task at the minimum of all 2228 * sensors EC_RATE. 2229 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2230 * to collect all the sensor samples. 2231 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2232 * to process of all motion sensors in milliseconds. 2233 */ 2234 MOTIONSENSE_CMD_EC_RATE = 2, 2235 2236 /* 2237 * Sensor ODR command is a setter/getter command for the output data 2238 * rate of a specific motion sensor in millihertz. 2239 */ 2240 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2241 2242 /* 2243 * Sensor range command is a setter/getter command for the range of 2244 * a specified motion sensor in +/-G's or +/- deg/s. 2245 */ 2246 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2247 2248 /* 2249 * Setter/getter command for the keyboard wake angle. When the lid 2250 * angle is greater than this value, keyboard wake is disabled in S3, 2251 * and when the lid angle goes less than this value, keyboard wake is 2252 * enabled. Note, the lid angle measurement is an approximate, 2253 * un-calibrated value, hence the wake angle isn't exact. 2254 */ 2255 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2256 2257 /* 2258 * Returns a single sensor data. 2259 */ 2260 MOTIONSENSE_CMD_DATA = 6, 2261 2262 /* 2263 * Return sensor fifo info. 2264 */ 2265 MOTIONSENSE_CMD_FIFO_INFO = 7, 2266 2267 /* 2268 * Insert a flush element in the fifo and return sensor fifo info. 2269 * The host can use that element to synchronize its operation. 2270 */ 2271 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2272 2273 /* 2274 * Return a portion of the fifo. 2275 */ 2276 MOTIONSENSE_CMD_FIFO_READ = 9, 2277 2278 /* 2279 * Perform low level calibration. 2280 * On sensors that support it, ask to do offset calibration. 2281 */ 2282 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2283 2284 /* 2285 * Sensor Offset command is a setter/getter command for the offset 2286 * used for calibration. 2287 * The offsets can be calculated by the host, or via 2288 * PERFORM_CALIB command. 2289 */ 2290 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2291 2292 /* 2293 * List available activities for a MOTION sensor. 2294 * Indicates if they are enabled or disabled. 2295 */ 2296 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2297 2298 /* 2299 * Activity management 2300 * Enable/Disable activity recognition. 2301 */ 2302 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2303 2304 /* 2305 * Lid Angle 2306 */ 2307 MOTIONSENSE_CMD_LID_ANGLE = 14, 2308 2309 /* 2310 * Allow the FIFO to trigger interrupt via MKBP events. 2311 * By default the FIFO does not send interrupt to process the FIFO 2312 * until the AP is ready or it is coming from a wakeup sensor. 2313 */ 2314 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2315 2316 /* 2317 * Spoof the readings of the sensors. The spoofed readings can be set 2318 * to arbitrary values, or will lock to the last read actual values. 2319 */ 2320 MOTIONSENSE_CMD_SPOOF = 16, 2321 2322 /* Set lid angle for tablet mode detection. */ 2323 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2324 2325 /* 2326 * Sensor Scale command is a setter/getter command for the calibration 2327 * scale. 2328 */ 2329 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2330 2331 /* Number of motionsense sub-commands. */ 2332 MOTIONSENSE_NUM_CMDS 2333 }; 2334 2335 /* List of motion sensor types. */ 2336 enum motionsensor_type { 2337 MOTIONSENSE_TYPE_ACCEL = 0, 2338 MOTIONSENSE_TYPE_GYRO = 1, 2339 MOTIONSENSE_TYPE_MAG = 2, 2340 MOTIONSENSE_TYPE_PROX = 3, 2341 MOTIONSENSE_TYPE_LIGHT = 4, 2342 MOTIONSENSE_TYPE_ACTIVITY = 5, 2343 MOTIONSENSE_TYPE_BARO = 6, 2344 MOTIONSENSE_TYPE_SYNC = 7, 2345 MOTIONSENSE_TYPE_MAX, 2346 }; 2347 2348 /* List of motion sensor locations. */ 2349 enum motionsensor_location { 2350 MOTIONSENSE_LOC_BASE = 0, 2351 MOTIONSENSE_LOC_LID = 1, 2352 MOTIONSENSE_LOC_CAMERA = 2, 2353 MOTIONSENSE_LOC_MAX, 2354 }; 2355 2356 /* List of motion sensor chips. */ 2357 enum motionsensor_chip { 2358 MOTIONSENSE_CHIP_KXCJ9 = 0, 2359 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2360 MOTIONSENSE_CHIP_BMI160 = 2, 2361 MOTIONSENSE_CHIP_SI1141 = 3, 2362 MOTIONSENSE_CHIP_SI1142 = 4, 2363 MOTIONSENSE_CHIP_SI1143 = 5, 2364 MOTIONSENSE_CHIP_KX022 = 6, 2365 MOTIONSENSE_CHIP_L3GD20H = 7, 2366 MOTIONSENSE_CHIP_BMA255 = 8, 2367 MOTIONSENSE_CHIP_BMP280 = 9, 2368 MOTIONSENSE_CHIP_OPT3001 = 10, 2369 MOTIONSENSE_CHIP_BH1730 = 11, 2370 MOTIONSENSE_CHIP_GPIO = 12, 2371 MOTIONSENSE_CHIP_LIS2DH = 13, 2372 MOTIONSENSE_CHIP_LSM6DSM = 14, 2373 MOTIONSENSE_CHIP_LIS2DE = 15, 2374 MOTIONSENSE_CHIP_LIS2MDL = 16, 2375 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2376 MOTIONSENSE_CHIP_LSM6DSO = 18, 2377 MOTIONSENSE_CHIP_LNG2DM = 19, 2378 MOTIONSENSE_CHIP_MAX, 2379 }; 2380 2381 /* List of orientation positions */ 2382 enum motionsensor_orientation { 2383 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2384 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2385 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2386 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2387 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2388 }; 2389 2390 struct ec_response_motion_sensor_data { 2391 /* Flags for each sensor. */ 2392 uint8_t flags; 2393 /* Sensor number the data comes from. */ 2394 uint8_t sensor_num; 2395 /* Each sensor is up to 3-axis. */ 2396 union { 2397 int16_t data[3]; 2398 struct __ec_todo_packed { 2399 uint16_t reserved; 2400 uint32_t timestamp; 2401 }; 2402 struct __ec_todo_unpacked { 2403 uint8_t activity; /* motionsensor_activity */ 2404 uint8_t state; 2405 int16_t add_info[2]; 2406 }; 2407 }; 2408 } __ec_todo_packed; 2409 2410 /* Note: used in ec_response_get_next_data */ 2411 struct ec_response_motion_sense_fifo_info { 2412 /* Size of the fifo */ 2413 uint16_t size; 2414 /* Amount of space used in the fifo */ 2415 uint16_t count; 2416 /* Timestamp recorded in us. 2417 * aka accurate timestamp when host event was triggered. 2418 */ 2419 uint32_t timestamp; 2420 /* Total amount of vector lost */ 2421 uint16_t total_lost; 2422 /* Lost events since the last fifo_info, per sensors */ 2423 uint16_t lost[]; 2424 } __ec_todo_packed; 2425 2426 struct ec_response_motion_sense_fifo_data { 2427 uint32_t number_data; 2428 struct ec_response_motion_sensor_data data[]; 2429 } __ec_todo_packed; 2430 2431 /* List supported activity recognition */ 2432 enum motionsensor_activity { 2433 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2434 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2435 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2436 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2437 }; 2438 2439 struct ec_motion_sense_activity { 2440 uint8_t sensor_num; 2441 uint8_t activity; /* one of enum motionsensor_activity */ 2442 uint8_t enable; /* 1: enable, 0: disable */ 2443 uint8_t reserved; 2444 uint16_t parameters[3]; /* activity dependent parameters */ 2445 } __ec_todo_unpacked; 2446 2447 /* Module flag masks used for the dump sub-command. */ 2448 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2449 2450 /* Sensor flag masks used for the dump sub-command. */ 2451 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2452 2453 /* 2454 * Flush entry for synchronization. 2455 * data contains time stamp 2456 */ 2457 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2458 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2459 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2460 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2461 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2462 2463 /* 2464 * Send this value for the data element to only perform a read. If you 2465 * send any other value, the EC will interpret it as data to set and will 2466 * return the actual value set. 2467 */ 2468 #define EC_MOTION_SENSE_NO_VALUE -1 2469 2470 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2471 2472 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2473 /* Set Calibration information */ 2474 #define MOTION_SENSE_SET_OFFSET BIT(0) 2475 2476 /* Default Scale value, factor 1. */ 2477 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2478 2479 #define LID_ANGLE_UNRELIABLE 500 2480 2481 enum motionsense_spoof_mode { 2482 /* Disable spoof mode. */ 2483 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2484 2485 /* Enable spoof mode, but use provided component values. */ 2486 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2487 2488 /* Enable spoof mode, but use the current sensor values. */ 2489 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2490 2491 /* Query the current spoof mode status for the sensor. */ 2492 MOTIONSENSE_SPOOF_MODE_QUERY, 2493 }; 2494 2495 struct ec_params_motion_sense { 2496 uint8_t cmd; 2497 union { 2498 /* Used for MOTIONSENSE_CMD_DUMP. */ 2499 struct __ec_todo_unpacked { 2500 /* 2501 * Maximal number of sensor the host is expecting. 2502 * 0 means the host is only interested in the number 2503 * of sensors controlled by the EC. 2504 */ 2505 uint8_t max_sensor_count; 2506 } dump; 2507 2508 /* 2509 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2510 */ 2511 struct __ec_todo_unpacked { 2512 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2513 * kb_wake_angle: angle to wakup AP. 2514 */ 2515 int16_t data; 2516 } kb_wake_angle; 2517 2518 /* 2519 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2520 * and MOTIONSENSE_CMD_PERFORM_CALIB. 2521 */ 2522 struct __ec_todo_unpacked { 2523 uint8_t sensor_num; 2524 } info, info_3, data, fifo_flush, perform_calib, 2525 list_activities; 2526 2527 /* 2528 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2529 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2530 */ 2531 struct __ec_todo_unpacked { 2532 uint8_t sensor_num; 2533 2534 /* Rounding flag, true for round-up, false for down. */ 2535 uint8_t roundup; 2536 2537 uint16_t reserved; 2538 2539 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2540 int32_t data; 2541 } ec_rate, sensor_odr, sensor_range; 2542 2543 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2544 struct __ec_todo_packed { 2545 uint8_t sensor_num; 2546 2547 /* 2548 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2549 * the calibration information in the EC. 2550 * If unset, just retrieve calibration information. 2551 */ 2552 uint16_t flags; 2553 2554 /* 2555 * Temperature at calibration, in units of 0.01 C 2556 * 0x8000: invalid / unknown. 2557 * 0x0: 0C 2558 * 0x7fff: +327.67C 2559 */ 2560 int16_t temp; 2561 2562 /* 2563 * Offset for calibration. 2564 * Unit: 2565 * Accelerometer: 1/1024 g 2566 * Gyro: 1/1024 deg/s 2567 * Compass: 1/16 uT 2568 */ 2569 int16_t offset[3]; 2570 } sensor_offset; 2571 2572 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2573 struct __ec_todo_packed { 2574 uint8_t sensor_num; 2575 2576 /* 2577 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2578 * the calibration information in the EC. 2579 * If unset, just retrieve calibration information. 2580 */ 2581 uint16_t flags; 2582 2583 /* 2584 * Temperature at calibration, in units of 0.01 C 2585 * 0x8000: invalid / unknown. 2586 * 0x0: 0C 2587 * 0x7fff: +327.67C 2588 */ 2589 int16_t temp; 2590 2591 /* 2592 * Scale for calibration: 2593 * By default scale is 1, it is encoded on 16bits: 2594 * 1 = BIT(15) 2595 * ~2 = 0xFFFF 2596 * ~0 = 0. 2597 */ 2598 uint16_t scale[3]; 2599 } sensor_scale; 2600 2601 2602 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2603 /* (no params) */ 2604 2605 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2606 struct __ec_todo_unpacked { 2607 /* 2608 * Number of expected vector to return. 2609 * EC may return less or 0 if none available. 2610 */ 2611 uint32_t max_data_vector; 2612 } fifo_read; 2613 2614 struct ec_motion_sense_activity set_activity; 2615 2616 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2617 /* (no params) */ 2618 2619 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2620 struct __ec_todo_unpacked { 2621 /* 2622 * 1: enable, 0 disable fifo, 2623 * EC_MOTION_SENSE_NO_VALUE return value. 2624 */ 2625 int8_t enable; 2626 } fifo_int_enable; 2627 2628 /* Used for MOTIONSENSE_CMD_SPOOF */ 2629 struct __ec_todo_packed { 2630 uint8_t sensor_id; 2631 2632 /* See enum motionsense_spoof_mode. */ 2633 uint8_t spoof_enable; 2634 2635 /* Ignored, used for alignment. */ 2636 uint8_t reserved; 2637 2638 /* Individual component values to spoof. */ 2639 int16_t components[3]; 2640 } spoof; 2641 2642 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2643 struct __ec_todo_unpacked { 2644 /* 2645 * Lid angle threshold for switching between tablet and 2646 * clamshell mode. 2647 */ 2648 int16_t lid_angle; 2649 2650 /* 2651 * Hysteresis degree to prevent fluctuations between 2652 * clamshell and tablet mode if lid angle keeps 2653 * changing around the threshold. Lid motion driver will 2654 * use lid_angle + hys_degree to trigger tablet mode and 2655 * lid_angle - hys_degree to trigger clamshell mode. 2656 */ 2657 int16_t hys_degree; 2658 } tablet_mode_threshold; 2659 }; 2660 } __ec_todo_packed; 2661 2662 struct ec_response_motion_sense { 2663 union { 2664 /* Used for MOTIONSENSE_CMD_DUMP */ 2665 struct __ec_todo_unpacked { 2666 /* Flags representing the motion sensor module. */ 2667 uint8_t module_flags; 2668 2669 /* Number of sensors managed directly by the EC. */ 2670 uint8_t sensor_count; 2671 2672 /* 2673 * Sensor data is truncated if response_max is too small 2674 * for holding all the data. 2675 */ 2676 struct ec_response_motion_sensor_data sensor[0]; 2677 } dump; 2678 2679 /* Used for MOTIONSENSE_CMD_INFO. */ 2680 struct __ec_todo_unpacked { 2681 /* Should be element of enum motionsensor_type. */ 2682 uint8_t type; 2683 2684 /* Should be element of enum motionsensor_location. */ 2685 uint8_t location; 2686 2687 /* Should be element of enum motionsensor_chip. */ 2688 uint8_t chip; 2689 } info; 2690 2691 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2692 struct __ec_todo_unpacked { 2693 /* Should be element of enum motionsensor_type. */ 2694 uint8_t type; 2695 2696 /* Should be element of enum motionsensor_location. */ 2697 uint8_t location; 2698 2699 /* Should be element of enum motionsensor_chip. */ 2700 uint8_t chip; 2701 2702 /* Minimum sensor sampling frequency */ 2703 uint32_t min_frequency; 2704 2705 /* Maximum sensor sampling frequency */ 2706 uint32_t max_frequency; 2707 2708 /* Max number of sensor events that could be in fifo */ 2709 uint32_t fifo_max_event_count; 2710 } info_3; 2711 2712 /* Used for MOTIONSENSE_CMD_DATA */ 2713 struct ec_response_motion_sensor_data data; 2714 2715 /* 2716 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2717 * MOTIONSENSE_CMD_SENSOR_RANGE, 2718 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2719 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2720 * MOTIONSENSE_CMD_SPOOF. 2721 */ 2722 struct __ec_todo_unpacked { 2723 /* Current value of the parameter queried. */ 2724 int32_t ret; 2725 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2726 fifo_int_enable, spoof; 2727 2728 /* 2729 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2730 * PERFORM_CALIB. 2731 */ 2732 struct __ec_todo_unpacked { 2733 int16_t temp; 2734 int16_t offset[3]; 2735 } sensor_offset, perform_calib; 2736 2737 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2738 struct __ec_todo_unpacked { 2739 int16_t temp; 2740 uint16_t scale[3]; 2741 } sensor_scale; 2742 2743 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2744 2745 struct ec_response_motion_sense_fifo_data fifo_read; 2746 2747 struct __ec_todo_packed { 2748 uint16_t reserved; 2749 uint32_t enabled; 2750 uint32_t disabled; 2751 } list_activities; 2752 2753 /* No params for set activity */ 2754 2755 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2756 struct __ec_todo_unpacked { 2757 /* 2758 * Angle between 0 and 360 degree if available, 2759 * LID_ANGLE_UNRELIABLE otherwise. 2760 */ 2761 uint16_t value; 2762 } lid_angle; 2763 2764 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2765 struct __ec_todo_unpacked { 2766 /* 2767 * Lid angle threshold for switching between tablet and 2768 * clamshell mode. 2769 */ 2770 uint16_t lid_angle; 2771 2772 /* Hysteresis degree. */ 2773 uint16_t hys_degree; 2774 } tablet_mode_threshold; 2775 2776 }; 2777 } __ec_todo_packed; 2778 2779 /*****************************************************************************/ 2780 /* Force lid open command */ 2781 2782 /* Make lid event always open */ 2783 #define EC_CMD_FORCE_LID_OPEN 0x002C 2784 2785 struct ec_params_force_lid_open { 2786 uint8_t enabled; 2787 } __ec_align1; 2788 2789 /*****************************************************************************/ 2790 /* Configure the behavior of the power button */ 2791 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2792 2793 enum ec_config_power_button_flags { 2794 /* Enable/Disable power button pulses for x86 devices */ 2795 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2796 }; 2797 2798 struct ec_params_config_power_button { 2799 /* See enum ec_config_power_button_flags */ 2800 uint8_t flags; 2801 } __ec_align1; 2802 2803 /*****************************************************************************/ 2804 /* USB charging control commands */ 2805 2806 /* Set USB port charging mode */ 2807 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2808 2809 struct ec_params_usb_charge_set_mode { 2810 uint8_t usb_port_id; 2811 uint8_t mode:7; 2812 uint8_t inhibit_charge:1; 2813 } __ec_align1; 2814 2815 /*****************************************************************************/ 2816 /* Persistent storage for host */ 2817 2818 /* Maximum bytes that can be read/written in a single command */ 2819 #define EC_PSTORE_SIZE_MAX 64 2820 2821 /* Get persistent storage info */ 2822 #define EC_CMD_PSTORE_INFO 0x0040 2823 2824 struct ec_response_pstore_info { 2825 /* Persistent storage size, in bytes */ 2826 uint32_t pstore_size; 2827 /* Access size; read/write offset and size must be a multiple of this */ 2828 uint32_t access_size; 2829 } __ec_align4; 2830 2831 /* 2832 * Read persistent storage 2833 * 2834 * Response is params.size bytes of data. 2835 */ 2836 #define EC_CMD_PSTORE_READ 0x0041 2837 2838 struct ec_params_pstore_read { 2839 uint32_t offset; /* Byte offset to read */ 2840 uint32_t size; /* Size to read in bytes */ 2841 } __ec_align4; 2842 2843 /* Write persistent storage */ 2844 #define EC_CMD_PSTORE_WRITE 0x0042 2845 2846 struct ec_params_pstore_write { 2847 uint32_t offset; /* Byte offset to write */ 2848 uint32_t size; /* Size to write in bytes */ 2849 uint8_t data[EC_PSTORE_SIZE_MAX]; 2850 } __ec_align4; 2851 2852 /*****************************************************************************/ 2853 /* Real-time clock */ 2854 2855 /* RTC params and response structures */ 2856 struct ec_params_rtc { 2857 uint32_t time; 2858 } __ec_align4; 2859 2860 struct ec_response_rtc { 2861 uint32_t time; 2862 } __ec_align4; 2863 2864 /* These use ec_response_rtc */ 2865 #define EC_CMD_RTC_GET_VALUE 0x0044 2866 #define EC_CMD_RTC_GET_ALARM 0x0045 2867 2868 /* These all use ec_params_rtc */ 2869 #define EC_CMD_RTC_SET_VALUE 0x0046 2870 #define EC_CMD_RTC_SET_ALARM 0x0047 2871 2872 /* Pass as time param to SET_ALARM to clear the current alarm */ 2873 #define EC_RTC_ALARM_CLEAR 0 2874 2875 /*****************************************************************************/ 2876 /* Port80 log access */ 2877 2878 /* Maximum entries that can be read/written in a single command */ 2879 #define EC_PORT80_SIZE_MAX 32 2880 2881 /* Get last port80 code from previous boot */ 2882 #define EC_CMD_PORT80_LAST_BOOT 0x0048 2883 #define EC_CMD_PORT80_READ 0x0048 2884 2885 enum ec_port80_subcmd { 2886 EC_PORT80_GET_INFO = 0, 2887 EC_PORT80_READ_BUFFER, 2888 }; 2889 2890 struct ec_params_port80_read { 2891 uint16_t subcmd; 2892 union { 2893 struct __ec_todo_unpacked { 2894 uint32_t offset; 2895 uint32_t num_entries; 2896 } read_buffer; 2897 }; 2898 } __ec_todo_packed; 2899 2900 struct ec_response_port80_read { 2901 union { 2902 struct __ec_todo_unpacked { 2903 uint32_t writes; 2904 uint32_t history_size; 2905 uint32_t last_boot; 2906 } get_info; 2907 struct __ec_todo_unpacked { 2908 uint16_t codes[EC_PORT80_SIZE_MAX]; 2909 } data; 2910 }; 2911 } __ec_todo_packed; 2912 2913 struct ec_response_port80_last_boot { 2914 uint16_t code; 2915 } __ec_align2; 2916 2917 /*****************************************************************************/ 2918 /* Temporary secure storage for host verified boot use */ 2919 2920 /* Number of bytes in a vstore slot */ 2921 #define EC_VSTORE_SLOT_SIZE 64 2922 2923 /* Maximum number of vstore slots */ 2924 #define EC_VSTORE_SLOT_MAX 32 2925 2926 /* Get persistent storage info */ 2927 #define EC_CMD_VSTORE_INFO 0x0049 2928 struct ec_response_vstore_info { 2929 /* Indicates which slots are locked */ 2930 uint32_t slot_locked; 2931 /* Total number of slots available */ 2932 uint8_t slot_count; 2933 } __ec_align_size1; 2934 2935 /* 2936 * Read temporary secure storage 2937 * 2938 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 2939 */ 2940 #define EC_CMD_VSTORE_READ 0x004A 2941 2942 struct ec_params_vstore_read { 2943 uint8_t slot; /* Slot to read from */ 2944 } __ec_align1; 2945 2946 struct ec_response_vstore_read { 2947 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2948 } __ec_align1; 2949 2950 /* 2951 * Write temporary secure storage and lock it. 2952 */ 2953 #define EC_CMD_VSTORE_WRITE 0x004B 2954 2955 struct ec_params_vstore_write { 2956 uint8_t slot; /* Slot to write to */ 2957 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2958 } __ec_align1; 2959 2960 /*****************************************************************************/ 2961 /* Thermal engine commands. Note that there are two implementations. We'll 2962 * reuse the command number, but the data and behavior is incompatible. 2963 * Version 0 is what originally shipped on Link. 2964 * Version 1 separates the CPU thermal limits from the fan control. 2965 */ 2966 2967 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 2968 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2969 2970 /* The version 0 structs are opaque. You have to know what they are for 2971 * the get/set commands to make any sense. 2972 */ 2973 2974 /* Version 0 - set */ 2975 struct ec_params_thermal_set_threshold { 2976 uint8_t sensor_type; 2977 uint8_t threshold_id; 2978 uint16_t value; 2979 } __ec_align2; 2980 2981 /* Version 0 - get */ 2982 struct ec_params_thermal_get_threshold { 2983 uint8_t sensor_type; 2984 uint8_t threshold_id; 2985 } __ec_align1; 2986 2987 struct ec_response_thermal_get_threshold { 2988 uint16_t value; 2989 } __ec_align2; 2990 2991 2992 /* The version 1 structs are visible. */ 2993 enum ec_temp_thresholds { 2994 EC_TEMP_THRESH_WARN = 0, 2995 EC_TEMP_THRESH_HIGH, 2996 EC_TEMP_THRESH_HALT, 2997 2998 EC_TEMP_THRESH_COUNT 2999 }; 3000 3001 /* 3002 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3003 * Zero values will be silently ignored by the thermal task. 3004 * 3005 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3006 * hysteresis. 3007 * For example, 3008 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3009 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3010 * EC will throttle ap when temperature >= 301 K, and release throttling when 3011 * temperature <= 299 K. 3012 * 3013 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3014 * For example, 3015 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3016 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3017 * EC will throttle ap when temperature >= 301 K, and release throttling when 3018 * temperature <= 294 K. 3019 * 3020 * Note that this structure is a sub-structure of 3021 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3022 */ 3023 struct ec_thermal_config { 3024 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3025 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3026 uint32_t temp_fan_off; /* no active cooling needed */ 3027 uint32_t temp_fan_max; /* max active cooling needed */ 3028 } __ec_align4; 3029 3030 /* Version 1 - get config for one sensor. */ 3031 struct ec_params_thermal_get_threshold_v1 { 3032 uint32_t sensor_num; 3033 } __ec_align4; 3034 /* This returns a struct ec_thermal_config */ 3035 3036 /* 3037 * Version 1 - set config for one sensor. 3038 * Use read-modify-write for best results! 3039 */ 3040 struct ec_params_thermal_set_threshold_v1 { 3041 uint32_t sensor_num; 3042 struct ec_thermal_config cfg; 3043 } __ec_align4; 3044 /* This returns no data */ 3045 3046 /****************************************************************************/ 3047 3048 /* Toggle automatic fan control */ 3049 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3050 3051 /* Version 1 of input params */ 3052 struct ec_params_auto_fan_ctrl_v1 { 3053 uint8_t fan_idx; 3054 } __ec_align1; 3055 3056 /* Get/Set TMP006 calibration data */ 3057 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3058 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3059 3060 /* 3061 * The original TMP006 calibration only needed four params, but now we need 3062 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3063 * the params opaque. The v1 "get" response will include the algorithm number 3064 * and how many params it requires. That way we can change the EC code without 3065 * needing to update this file. We can also use a different algorithm on each 3066 * sensor. 3067 */ 3068 3069 /* This is the same struct for both v0 and v1. */ 3070 struct ec_params_tmp006_get_calibration { 3071 uint8_t index; 3072 } __ec_align1; 3073 3074 /* Version 0 */ 3075 struct ec_response_tmp006_get_calibration_v0 { 3076 float s0; 3077 float b0; 3078 float b1; 3079 float b2; 3080 } __ec_align4; 3081 3082 struct ec_params_tmp006_set_calibration_v0 { 3083 uint8_t index; 3084 uint8_t reserved[3]; 3085 float s0; 3086 float b0; 3087 float b1; 3088 float b2; 3089 } __ec_align4; 3090 3091 /* Version 1 */ 3092 struct ec_response_tmp006_get_calibration_v1 { 3093 uint8_t algorithm; 3094 uint8_t num_params; 3095 uint8_t reserved[2]; 3096 float val[]; 3097 } __ec_align4; 3098 3099 struct ec_params_tmp006_set_calibration_v1 { 3100 uint8_t index; 3101 uint8_t algorithm; 3102 uint8_t num_params; 3103 uint8_t reserved; 3104 float val[]; 3105 } __ec_align4; 3106 3107 3108 /* Read raw TMP006 data */ 3109 #define EC_CMD_TMP006_GET_RAW 0x0055 3110 3111 struct ec_params_tmp006_get_raw { 3112 uint8_t index; 3113 } __ec_align1; 3114 3115 struct ec_response_tmp006_get_raw { 3116 int32_t t; /* In 1/100 K */ 3117 int32_t v; /* In nV */ 3118 } __ec_align4; 3119 3120 /*****************************************************************************/ 3121 /* MKBP - Matrix KeyBoard Protocol */ 3122 3123 /* 3124 * Read key state 3125 * 3126 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3127 * expected response size. 3128 * 3129 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3130 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3131 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3132 */ 3133 #define EC_CMD_MKBP_STATE 0x0060 3134 3135 /* 3136 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3137 */ 3138 #define EC_CMD_MKBP_INFO 0x0061 3139 3140 struct ec_response_mkbp_info { 3141 uint32_t rows; 3142 uint32_t cols; 3143 /* Formerly "switches", which was 0. */ 3144 uint8_t reserved; 3145 } __ec_align_size1; 3146 3147 struct ec_params_mkbp_info { 3148 uint8_t info_type; 3149 uint8_t event_type; 3150 } __ec_align1; 3151 3152 enum ec_mkbp_info_type { 3153 /* 3154 * Info about the keyboard matrix: number of rows and columns. 3155 * 3156 * Returns struct ec_response_mkbp_info. 3157 */ 3158 EC_MKBP_INFO_KBD = 0, 3159 3160 /* 3161 * For buttons and switches, info about which specifically are 3162 * supported. event_type must be set to one of the values in enum 3163 * ec_mkbp_event. 3164 * 3165 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3166 * bitmask indicating which buttons or switches are present. See the 3167 * bit inidices below. 3168 */ 3169 EC_MKBP_INFO_SUPPORTED = 1, 3170 3171 /* 3172 * Instantaneous state of buttons and switches. 3173 * 3174 * event_type must be set to one of the values in enum ec_mkbp_event. 3175 * 3176 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3177 * indicating the current state of the keyboard matrix. 3178 * 3179 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3180 * event state. 3181 * 3182 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3183 * state of supported buttons. 3184 * 3185 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3186 * state of supported switches. 3187 */ 3188 EC_MKBP_INFO_CURRENT = 2, 3189 }; 3190 3191 /* Simulate key press */ 3192 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3193 3194 struct ec_params_mkbp_simulate_key { 3195 uint8_t col; 3196 uint8_t row; 3197 uint8_t pressed; 3198 } __ec_align1; 3199 3200 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3201 3202 struct ec_response_keyboard_id { 3203 uint32_t keyboard_id; 3204 } __ec_align4; 3205 3206 enum keyboard_id { 3207 KEYBOARD_ID_UNSUPPORTED = 0, 3208 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3209 }; 3210 3211 /* Configure keyboard scanning */ 3212 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3213 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3214 3215 /* flags */ 3216 enum mkbp_config_flags { 3217 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3218 }; 3219 3220 enum mkbp_config_valid { 3221 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3222 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3223 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3224 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3225 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3226 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3227 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3228 }; 3229 3230 /* 3231 * Configuration for our key scanning algorithm. 3232 * 3233 * Note that this is used as a sub-structure of 3234 * ec_{params/response}_mkbp_get_config. 3235 */ 3236 struct ec_mkbp_config { 3237 uint32_t valid_mask; /* valid fields */ 3238 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3239 uint8_t valid_flags; /* which flags are valid */ 3240 uint16_t scan_period_us; /* period between start of scans */ 3241 /* revert to interrupt mode after no activity for this long */ 3242 uint32_t poll_timeout_us; 3243 /* 3244 * minimum post-scan relax time. Once we finish a scan we check 3245 * the time until we are due to start the next one. If this time is 3246 * shorter this field, we use this instead. 3247 */ 3248 uint16_t min_post_scan_delay_us; 3249 /* delay between setting up output and waiting for it to settle */ 3250 uint16_t output_settle_us; 3251 uint16_t debounce_down_us; /* time for debounce on key down */ 3252 uint16_t debounce_up_us; /* time for debounce on key up */ 3253 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3254 uint8_t fifo_max_depth; 3255 } __ec_align_size1; 3256 3257 struct ec_params_mkbp_set_config { 3258 struct ec_mkbp_config config; 3259 } __ec_align_size1; 3260 3261 struct ec_response_mkbp_get_config { 3262 struct ec_mkbp_config config; 3263 } __ec_align_size1; 3264 3265 /* Run the key scan emulation */ 3266 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3267 3268 enum ec_keyscan_seq_cmd { 3269 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3270 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3271 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3272 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3273 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3274 }; 3275 3276 enum ec_collect_flags { 3277 /* 3278 * Indicates this scan was processed by the EC. Due to timing, some 3279 * scans may be skipped. 3280 */ 3281 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3282 }; 3283 3284 struct ec_collect_item { 3285 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3286 } __ec_align1; 3287 3288 struct ec_params_keyscan_seq_ctrl { 3289 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3290 union { 3291 struct __ec_align1 { 3292 uint8_t active; /* still active */ 3293 uint8_t num_items; /* number of items */ 3294 /* Current item being presented */ 3295 uint8_t cur_item; 3296 } status; 3297 struct __ec_todo_unpacked { 3298 /* 3299 * Absolute time for this scan, measured from the 3300 * start of the sequence. 3301 */ 3302 uint32_t time_us; 3303 uint8_t scan[0]; /* keyscan data */ 3304 } add; 3305 struct __ec_align1 { 3306 uint8_t start_item; /* First item to return */ 3307 uint8_t num_items; /* Number of items to return */ 3308 } collect; 3309 }; 3310 } __ec_todo_packed; 3311 3312 struct ec_result_keyscan_seq_ctrl { 3313 union { 3314 struct __ec_todo_unpacked { 3315 uint8_t num_items; /* Number of items */ 3316 /* Data for each item */ 3317 struct ec_collect_item item[0]; 3318 } collect; 3319 }; 3320 } __ec_todo_packed; 3321 3322 /* 3323 * Get the next pending MKBP event. 3324 * 3325 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3326 */ 3327 #define EC_CMD_GET_NEXT_EVENT 0x0067 3328 3329 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3330 3331 /* 3332 * We use the most significant bit of the event type to indicate to the host 3333 * that the EC has more MKBP events available to provide. 3334 */ 3335 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3336 3337 /* The mask to apply to get the raw event type */ 3338 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3339 3340 enum ec_mkbp_event { 3341 /* Keyboard matrix changed. The event data is the new matrix state. */ 3342 EC_MKBP_EVENT_KEY_MATRIX = 0, 3343 3344 /* New host event. The event data is 4 bytes of host event flags. */ 3345 EC_MKBP_EVENT_HOST_EVENT = 1, 3346 3347 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3348 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3349 3350 /* The state of the non-matrixed buttons have changed. */ 3351 EC_MKBP_EVENT_BUTTON = 3, 3352 3353 /* The state of the switches have changed. */ 3354 EC_MKBP_EVENT_SWITCH = 4, 3355 3356 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3357 EC_MKBP_EVENT_FINGERPRINT = 5, 3358 3359 /* 3360 * Sysrq event: send emulated sysrq. The event data is sysrq, 3361 * corresponding to the key to be pressed. 3362 */ 3363 EC_MKBP_EVENT_SYSRQ = 6, 3364 3365 /* 3366 * New 64-bit host event. 3367 * The event data is 8 bytes of host event flags. 3368 */ 3369 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3370 3371 /* Notify the AP that something happened on CEC */ 3372 EC_MKBP_EVENT_CEC_EVENT = 8, 3373 3374 /* Send an incoming CEC message to the AP */ 3375 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3376 3377 /* Number of MKBP events */ 3378 EC_MKBP_EVENT_COUNT, 3379 }; 3380 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3381 3382 union __ec_align_offset1 ec_response_get_next_data { 3383 uint8_t key_matrix[13]; 3384 3385 /* Unaligned */ 3386 uint32_t host_event; 3387 uint64_t host_event64; 3388 3389 struct __ec_todo_unpacked { 3390 /* For aligning the fifo_info */ 3391 uint8_t reserved[3]; 3392 struct ec_response_motion_sense_fifo_info info; 3393 } sensor_fifo; 3394 3395 uint32_t buttons; 3396 3397 uint32_t switches; 3398 3399 uint32_t fp_events; 3400 3401 uint32_t sysrq; 3402 3403 /* CEC events from enum mkbp_cec_event */ 3404 uint32_t cec_events; 3405 }; 3406 3407 union __ec_align_offset1 ec_response_get_next_data_v1 { 3408 uint8_t key_matrix[16]; 3409 3410 /* Unaligned */ 3411 uint32_t host_event; 3412 uint64_t host_event64; 3413 3414 struct __ec_todo_unpacked { 3415 /* For aligning the fifo_info */ 3416 uint8_t reserved[3]; 3417 struct ec_response_motion_sense_fifo_info info; 3418 } sensor_fifo; 3419 3420 uint32_t buttons; 3421 3422 uint32_t switches; 3423 3424 uint32_t fp_events; 3425 3426 uint32_t sysrq; 3427 3428 /* CEC events from enum mkbp_cec_event */ 3429 uint32_t cec_events; 3430 3431 uint8_t cec_message[16]; 3432 }; 3433 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3434 3435 struct ec_response_get_next_event { 3436 uint8_t event_type; 3437 /* Followed by event data if any */ 3438 union ec_response_get_next_data data; 3439 } __ec_align1; 3440 3441 struct ec_response_get_next_event_v1 { 3442 uint8_t event_type; 3443 /* Followed by event data if any */ 3444 union ec_response_get_next_data_v1 data; 3445 } __ec_align1; 3446 3447 /* Bit indices for buttons and switches.*/ 3448 /* Buttons */ 3449 #define EC_MKBP_POWER_BUTTON 0 3450 #define EC_MKBP_VOL_UP 1 3451 #define EC_MKBP_VOL_DOWN 2 3452 #define EC_MKBP_RECOVERY 3 3453 3454 /* Switches */ 3455 #define EC_MKBP_LID_OPEN 0 3456 #define EC_MKBP_TABLET_MODE 1 3457 #define EC_MKBP_BASE_ATTACHED 2 3458 3459 /* Run keyboard factory test scanning */ 3460 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3461 3462 struct ec_response_keyboard_factory_test { 3463 uint16_t shorted; /* Keyboard pins are shorted */ 3464 } __ec_align2; 3465 3466 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3467 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3468 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3469 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3470 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3471 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3472 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3473 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3474 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3475 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3476 #define EC_MKBP_FP_ENROLL BIT(27) 3477 #define EC_MKBP_FP_MATCH BIT(28) 3478 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3479 #define EC_MKBP_FP_FINGER_UP BIT(30) 3480 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3481 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3482 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3483 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3484 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3485 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3486 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3487 /* Can be used to detect if image was usable for enrollment or not. */ 3488 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3489 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3490 #define EC_MKBP_FP_ERR_MATCH_NO 0 3491 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3492 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3493 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3494 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3495 #define EC_MKBP_FP_ERR_MATCH_YES 1 3496 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3497 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3498 3499 3500 /*****************************************************************************/ 3501 /* Temperature sensor commands */ 3502 3503 /* Read temperature sensor info */ 3504 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3505 3506 struct ec_params_temp_sensor_get_info { 3507 uint8_t id; 3508 } __ec_align1; 3509 3510 struct ec_response_temp_sensor_get_info { 3511 char sensor_name[32]; 3512 uint8_t sensor_type; 3513 } __ec_align1; 3514 3515 /*****************************************************************************/ 3516 3517 /* 3518 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3519 * commands accidentally sent to the wrong interface. See the ACPI section 3520 * below. 3521 */ 3522 3523 /*****************************************************************************/ 3524 /* Host event commands */ 3525 3526 3527 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3528 /* 3529 * Host event mask params and response structures, shared by all of the host 3530 * event commands below. 3531 */ 3532 struct ec_params_host_event_mask { 3533 uint32_t mask; 3534 } __ec_align4; 3535 3536 struct ec_response_host_event_mask { 3537 uint32_t mask; 3538 } __ec_align4; 3539 3540 /* These all use ec_response_host_event_mask */ 3541 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3542 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3543 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3544 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3545 3546 /* These all use ec_params_host_event_mask */ 3547 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3548 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3549 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3550 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3551 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3552 3553 /* 3554 * Unified host event programming interface - Should be used by newer versions 3555 * of BIOS/OS to program host events and masks 3556 */ 3557 3558 struct ec_params_host_event { 3559 3560 /* Action requested by host - one of enum ec_host_event_action. */ 3561 uint8_t action; 3562 3563 /* 3564 * Mask type that the host requested the action on - one of 3565 * enum ec_host_event_mask_type. 3566 */ 3567 uint8_t mask_type; 3568 3569 /* Set to 0, ignore on read */ 3570 uint16_t reserved; 3571 3572 /* Value to be used in case of set operations. */ 3573 uint64_t value; 3574 } __ec_align4; 3575 3576 /* 3577 * Response structure returned by EC_CMD_HOST_EVENT. 3578 * Update the value on a GET request. Set to 0 on GET/CLEAR 3579 */ 3580 3581 struct ec_response_host_event { 3582 3583 /* Mask value in case of get operation */ 3584 uint64_t value; 3585 } __ec_align4; 3586 3587 enum ec_host_event_action { 3588 /* 3589 * params.value is ignored. Value of mask_type populated 3590 * in response.value 3591 */ 3592 EC_HOST_EVENT_GET, 3593 3594 /* Bits in params.value are set */ 3595 EC_HOST_EVENT_SET, 3596 3597 /* Bits in params.value are cleared */ 3598 EC_HOST_EVENT_CLEAR, 3599 }; 3600 3601 enum ec_host_event_mask_type { 3602 3603 /* Main host event copy */ 3604 EC_HOST_EVENT_MAIN, 3605 3606 /* Copy B of host events */ 3607 EC_HOST_EVENT_B, 3608 3609 /* SCI Mask */ 3610 EC_HOST_EVENT_SCI_MASK, 3611 3612 /* SMI Mask */ 3613 EC_HOST_EVENT_SMI_MASK, 3614 3615 /* Mask of events that should be always reported in hostevents */ 3616 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3617 3618 /* Active wake mask */ 3619 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3620 3621 /* Lazy wake mask for S0ix */ 3622 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3623 3624 /* Lazy wake mask for S3 */ 3625 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3626 3627 /* Lazy wake mask for S5 */ 3628 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3629 }; 3630 3631 #define EC_CMD_HOST_EVENT 0x00A4 3632 3633 /*****************************************************************************/ 3634 /* Switch commands */ 3635 3636 /* Enable/disable LCD backlight */ 3637 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3638 3639 struct ec_params_switch_enable_backlight { 3640 uint8_t enabled; 3641 } __ec_align1; 3642 3643 /* Enable/disable WLAN/Bluetooth */ 3644 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3645 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3646 3647 /* Version 0 params; no response */ 3648 struct ec_params_switch_enable_wireless_v0 { 3649 uint8_t enabled; 3650 } __ec_align1; 3651 3652 /* Version 1 params */ 3653 struct ec_params_switch_enable_wireless_v1 { 3654 /* Flags to enable now */ 3655 uint8_t now_flags; 3656 3657 /* Which flags to copy from now_flags */ 3658 uint8_t now_mask; 3659 3660 /* 3661 * Flags to leave enabled in S3, if they're on at the S0->S3 3662 * transition. (Other flags will be disabled by the S0->S3 3663 * transition.) 3664 */ 3665 uint8_t suspend_flags; 3666 3667 /* Which flags to copy from suspend_flags */ 3668 uint8_t suspend_mask; 3669 } __ec_align1; 3670 3671 /* Version 1 response */ 3672 struct ec_response_switch_enable_wireless_v1 { 3673 /* Flags to enable now */ 3674 uint8_t now_flags; 3675 3676 /* Flags to leave enabled in S3 */ 3677 uint8_t suspend_flags; 3678 } __ec_align1; 3679 3680 /*****************************************************************************/ 3681 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3682 3683 /* Set GPIO output value */ 3684 #define EC_CMD_GPIO_SET 0x0092 3685 3686 struct ec_params_gpio_set { 3687 char name[32]; 3688 uint8_t val; 3689 } __ec_align1; 3690 3691 /* Get GPIO value */ 3692 #define EC_CMD_GPIO_GET 0x0093 3693 3694 /* Version 0 of input params and response */ 3695 struct ec_params_gpio_get { 3696 char name[32]; 3697 } __ec_align1; 3698 3699 struct ec_response_gpio_get { 3700 uint8_t val; 3701 } __ec_align1; 3702 3703 /* Version 1 of input params and response */ 3704 struct ec_params_gpio_get_v1 { 3705 uint8_t subcmd; 3706 union { 3707 struct __ec_align1 { 3708 char name[32]; 3709 } get_value_by_name; 3710 struct __ec_align1 { 3711 uint8_t index; 3712 } get_info; 3713 }; 3714 } __ec_align1; 3715 3716 struct ec_response_gpio_get_v1 { 3717 union { 3718 struct __ec_align1 { 3719 uint8_t val; 3720 } get_value_by_name, get_count; 3721 struct __ec_todo_unpacked { 3722 uint8_t val; 3723 char name[32]; 3724 uint32_t flags; 3725 } get_info; 3726 }; 3727 } __ec_todo_packed; 3728 3729 enum gpio_get_subcmd { 3730 EC_GPIO_GET_BY_NAME = 0, 3731 EC_GPIO_GET_COUNT = 1, 3732 EC_GPIO_GET_INFO = 2, 3733 }; 3734 3735 /*****************************************************************************/ 3736 /* I2C commands. Only available when flash write protect is unlocked. */ 3737 3738 /* 3739 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3740 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3741 * 3742 * Use EC_CMD_I2C_PASSTHRU instead. 3743 */ 3744 3745 /* Read I2C bus */ 3746 #define EC_CMD_I2C_READ 0x0094 3747 3748 struct ec_params_i2c_read { 3749 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3750 uint8_t read_size; /* Either 8 or 16. */ 3751 uint8_t port; 3752 uint8_t offset; 3753 } __ec_align_size1; 3754 3755 struct ec_response_i2c_read { 3756 uint16_t data; 3757 } __ec_align2; 3758 3759 /* Write I2C bus */ 3760 #define EC_CMD_I2C_WRITE 0x0095 3761 3762 struct ec_params_i2c_write { 3763 uint16_t data; 3764 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3765 uint8_t write_size; /* Either 8 or 16. */ 3766 uint8_t port; 3767 uint8_t offset; 3768 } __ec_align_size1; 3769 3770 /*****************************************************************************/ 3771 /* Charge state commands. Only available when flash write protect unlocked. */ 3772 3773 /* Force charge state machine to stop charging the battery or force it to 3774 * discharge the battery. 3775 */ 3776 #define EC_CMD_CHARGE_CONTROL 0x0096 3777 #define EC_VER_CHARGE_CONTROL 1 3778 3779 enum ec_charge_control_mode { 3780 CHARGE_CONTROL_NORMAL = 0, 3781 CHARGE_CONTROL_IDLE, 3782 CHARGE_CONTROL_DISCHARGE, 3783 }; 3784 3785 struct ec_params_charge_control { 3786 uint32_t mode; /* enum charge_control_mode */ 3787 } __ec_align4; 3788 3789 /*****************************************************************************/ 3790 3791 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3792 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3793 3794 /* 3795 * Read data from the saved snapshot. If the subcmd parameter is 3796 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3797 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3798 * end of the previous snapshot. 3799 * 3800 * The params are only looked at in version >= 1 of this command. Prior 3801 * versions will just default to CONSOLE_READ_NEXT behavior. 3802 * 3803 * Response is null-terminated string. Empty string, if there is no more 3804 * remaining output. 3805 */ 3806 #define EC_CMD_CONSOLE_READ 0x0098 3807 3808 enum ec_console_read_subcmd { 3809 CONSOLE_READ_NEXT = 0, 3810 CONSOLE_READ_RECENT 3811 }; 3812 3813 struct ec_params_console_read_v1 { 3814 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3815 } __ec_align1; 3816 3817 /*****************************************************************************/ 3818 3819 /* 3820 * Cut off battery power immediately or after the host has shut down. 3821 * 3822 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3823 * EC_RES_SUCCESS if the command was successful. 3824 * EC_RES_ERROR if the cut off command failed. 3825 */ 3826 #define EC_CMD_BATTERY_CUT_OFF 0x0099 3827 3828 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 3829 3830 struct ec_params_battery_cutoff { 3831 uint8_t flags; 3832 } __ec_align1; 3833 3834 /*****************************************************************************/ 3835 /* USB port mux control. */ 3836 3837 /* 3838 * Switch USB mux or return to automatic switching. 3839 */ 3840 #define EC_CMD_USB_MUX 0x009A 3841 3842 struct ec_params_usb_mux { 3843 uint8_t mux; 3844 } __ec_align1; 3845 3846 /*****************************************************************************/ 3847 /* LDOs / FETs control. */ 3848 3849 enum ec_ldo_state { 3850 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 3851 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 3852 }; 3853 3854 /* 3855 * Switch on/off a LDO. 3856 */ 3857 #define EC_CMD_LDO_SET 0x009B 3858 3859 struct ec_params_ldo_set { 3860 uint8_t index; 3861 uint8_t state; 3862 } __ec_align1; 3863 3864 /* 3865 * Get LDO state. 3866 */ 3867 #define EC_CMD_LDO_GET 0x009C 3868 3869 struct ec_params_ldo_get { 3870 uint8_t index; 3871 } __ec_align1; 3872 3873 struct ec_response_ldo_get { 3874 uint8_t state; 3875 } __ec_align1; 3876 3877 /*****************************************************************************/ 3878 /* Power info. */ 3879 3880 /* 3881 * Get power info. 3882 */ 3883 #define EC_CMD_POWER_INFO 0x009D 3884 3885 struct ec_response_power_info { 3886 uint32_t usb_dev_type; 3887 uint16_t voltage_ac; 3888 uint16_t voltage_system; 3889 uint16_t current_system; 3890 uint16_t usb_current_limit; 3891 } __ec_align4; 3892 3893 /*****************************************************************************/ 3894 /* I2C passthru command */ 3895 3896 #define EC_CMD_I2C_PASSTHRU 0x009E 3897 3898 /* Read data; if not present, message is a write */ 3899 #define EC_I2C_FLAG_READ BIT(15) 3900 3901 /* Mask for address */ 3902 #define EC_I2C_ADDR_MASK 0x3ff 3903 3904 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 3905 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 3906 3907 /* Any error */ 3908 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 3909 3910 struct ec_params_i2c_passthru_msg { 3911 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3912 uint16_t len; /* Number of bytes to read or write */ 3913 } __ec_align2; 3914 3915 struct ec_params_i2c_passthru { 3916 uint8_t port; /* I2C port number */ 3917 uint8_t num_msgs; /* Number of messages */ 3918 struct ec_params_i2c_passthru_msg msg[]; 3919 /* Data to write for all messages is concatenated here */ 3920 } __ec_align2; 3921 3922 struct ec_response_i2c_passthru { 3923 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3924 uint8_t num_msgs; /* Number of messages processed */ 3925 uint8_t data[]; /* Data read by messages concatenated here */ 3926 } __ec_align1; 3927 3928 /*****************************************************************************/ 3929 /* Power button hang detect */ 3930 3931 #define EC_CMD_HANG_DETECT 0x009F 3932 3933 /* Reasons to start hang detection timer */ 3934 /* Power button pressed */ 3935 #define EC_HANG_START_ON_POWER_PRESS BIT(0) 3936 3937 /* Lid closed */ 3938 #define EC_HANG_START_ON_LID_CLOSE BIT(1) 3939 3940 /* Lid opened */ 3941 #define EC_HANG_START_ON_LID_OPEN BIT(2) 3942 3943 /* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3944 #define EC_HANG_START_ON_RESUME BIT(3) 3945 3946 /* Reasons to cancel hang detection */ 3947 3948 /* Power button released */ 3949 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) 3950 3951 /* Any host command from AP received */ 3952 #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) 3953 3954 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3955 #define EC_HANG_STOP_ON_SUSPEND BIT(10) 3956 3957 /* 3958 * If this flag is set, all the other fields are ignored, and the hang detect 3959 * timer is started. This provides the AP a way to start the hang timer 3960 * without reconfiguring any of the other hang detect settings. Note that 3961 * you must previously have configured the timeouts. 3962 */ 3963 #define EC_HANG_START_NOW BIT(30) 3964 3965 /* 3966 * If this flag is set, all the other fields are ignored (including 3967 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3968 * without reconfiguring any of the other hang detect settings. 3969 */ 3970 #define EC_HANG_STOP_NOW BIT(31) 3971 3972 struct ec_params_hang_detect { 3973 /* Flags; see EC_HANG_* */ 3974 uint32_t flags; 3975 3976 /* Timeout in msec before generating host event, if enabled */ 3977 uint16_t host_event_timeout_msec; 3978 3979 /* Timeout in msec before generating warm reboot, if enabled */ 3980 uint16_t warm_reboot_timeout_msec; 3981 } __ec_align4; 3982 3983 /*****************************************************************************/ 3984 /* Commands for battery charging */ 3985 3986 /* 3987 * This is the single catch-all host command to exchange data regarding the 3988 * charge state machine (v2 and up). 3989 */ 3990 #define EC_CMD_CHARGE_STATE 0x00A0 3991 3992 /* Subcommands for this host command */ 3993 enum charge_state_command { 3994 CHARGE_STATE_CMD_GET_STATE, 3995 CHARGE_STATE_CMD_GET_PARAM, 3996 CHARGE_STATE_CMD_SET_PARAM, 3997 CHARGE_STATE_NUM_CMDS 3998 }; 3999 4000 /* 4001 * Known param numbers are defined here. Ranges are reserved for board-specific 4002 * params, which are handled by the particular implementations. 4003 */ 4004 enum charge_state_params { 4005 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4006 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4007 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4008 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4009 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4010 CS_PARAM_LIMIT_POWER, /* 4011 * Check if power is limited due to 4012 * low battery and / or a weak external 4013 * charger. READ ONLY. 4014 */ 4015 /* How many so far? */ 4016 CS_NUM_BASE_PARAMS, 4017 4018 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4019 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4020 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4021 4022 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4023 CS_PARAM_DEBUG_MIN = 0x20000, 4024 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4025 CS_PARAM_DEBUG_MANUAL_MODE, 4026 CS_PARAM_DEBUG_SEEMS_DEAD, 4027 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4028 CS_PARAM_DEBUG_BATT_REMOVED, 4029 CS_PARAM_DEBUG_MANUAL_CURRENT, 4030 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4031 CS_PARAM_DEBUG_MAX = 0x2ffff, 4032 4033 /* Other custom param ranges go here... */ 4034 }; 4035 4036 struct ec_params_charge_state { 4037 uint8_t cmd; /* enum charge_state_command */ 4038 union { 4039 /* get_state has no args */ 4040 4041 struct __ec_todo_unpacked { 4042 uint32_t param; /* enum charge_state_param */ 4043 } get_param; 4044 4045 struct __ec_todo_unpacked { 4046 uint32_t param; /* param to set */ 4047 uint32_t value; /* value to set */ 4048 } set_param; 4049 }; 4050 } __ec_todo_packed; 4051 4052 struct ec_response_charge_state { 4053 union { 4054 struct __ec_align4 { 4055 int ac; 4056 int chg_voltage; 4057 int chg_current; 4058 int chg_input_current; 4059 int batt_state_of_charge; 4060 } get_state; 4061 4062 struct __ec_align4 { 4063 uint32_t value; 4064 } get_param; 4065 4066 /* set_param returns no args */ 4067 }; 4068 } __ec_align4; 4069 4070 4071 /* 4072 * Set maximum battery charging current. 4073 */ 4074 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4075 4076 struct ec_params_current_limit { 4077 uint32_t limit; /* in mA */ 4078 } __ec_align4; 4079 4080 /* 4081 * Set maximum external voltage / current. 4082 */ 4083 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4084 4085 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4086 struct ec_params_external_power_limit_v1 { 4087 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4088 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4089 } __ec_align2; 4090 4091 #define EC_POWER_LIMIT_NONE 0xffff 4092 4093 /* 4094 * Set maximum voltage & current of a dedicated charge port 4095 */ 4096 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4097 4098 struct ec_params_dedicated_charger_limit { 4099 uint16_t current_lim; /* in mA */ 4100 uint16_t voltage_lim; /* in mV */ 4101 } __ec_align2; 4102 4103 /*****************************************************************************/ 4104 /* Hibernate/Deep Sleep Commands */ 4105 4106 /* Set the delay before going into hibernation. */ 4107 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4108 4109 struct ec_params_hibernation_delay { 4110 /* 4111 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4112 * current settings without changing them. 4113 */ 4114 uint32_t seconds; 4115 } __ec_align4; 4116 4117 struct ec_response_hibernation_delay { 4118 /* 4119 * The current time in seconds in which the system has been in the G3 4120 * state. This value is reset if the EC transitions out of G3. 4121 */ 4122 uint32_t time_g3; 4123 4124 /* 4125 * The current time remaining in seconds until the EC should hibernate. 4126 * This value is also reset if the EC transitions out of G3. 4127 */ 4128 uint32_t time_remaining; 4129 4130 /* 4131 * The current time in seconds that the EC should wait in G3 before 4132 * hibernating. 4133 */ 4134 uint32_t hibernate_delay; 4135 } __ec_align4; 4136 4137 /* Inform the EC when entering a sleep state */ 4138 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4139 4140 enum host_sleep_event { 4141 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4142 HOST_SLEEP_EVENT_S3_RESUME = 2, 4143 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4144 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4145 /* S3 suspend with additional enabled wake sources */ 4146 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4147 }; 4148 4149 struct ec_params_host_sleep_event { 4150 uint8_t sleep_event; 4151 } __ec_align1; 4152 4153 /* 4154 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4155 * transition failures 4156 */ 4157 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4158 4159 /* Disable timeout detection for this sleep transition */ 4160 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4161 4162 struct ec_params_host_sleep_event_v1 { 4163 /* The type of sleep being entered or exited. */ 4164 uint8_t sleep_event; 4165 4166 /* Padding */ 4167 uint8_t reserved; 4168 union { 4169 /* Parameters that apply for suspend messages. */ 4170 struct { 4171 /* 4172 * The timeout in milliseconds between when this message 4173 * is received and when the EC will declare sleep 4174 * transition failure if the sleep signal is not 4175 * asserted. 4176 */ 4177 uint16_t sleep_timeout_ms; 4178 } suspend_params; 4179 4180 /* No parameters for non-suspend messages. */ 4181 }; 4182 } __ec_align2; 4183 4184 /* A timeout occurred when this bit is set */ 4185 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4186 4187 /* 4188 * The mask defining which bits correspond to the number of sleep transitions, 4189 * as well as the maximum number of suspend line transitions that will be 4190 * reported back to the host. 4191 */ 4192 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4193 4194 struct ec_response_host_sleep_event_v1 { 4195 union { 4196 /* Response fields that apply for resume messages. */ 4197 struct { 4198 /* 4199 * The number of sleep power signal transitions that 4200 * occurred since the suspend message. The high bit 4201 * indicates a timeout occurred. 4202 */ 4203 uint32_t sleep_transitions; 4204 } resume_response; 4205 4206 /* No response fields for non-resume messages. */ 4207 }; 4208 } __ec_align4; 4209 4210 /*****************************************************************************/ 4211 /* Device events */ 4212 #define EC_CMD_DEVICE_EVENT 0x00AA 4213 4214 enum ec_device_event { 4215 EC_DEVICE_EVENT_TRACKPAD, 4216 EC_DEVICE_EVENT_DSP, 4217 EC_DEVICE_EVENT_WIFI, 4218 }; 4219 4220 enum ec_device_event_param { 4221 /* Get and clear pending device events */ 4222 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4223 /* Get device event mask */ 4224 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4225 /* Set device event mask */ 4226 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4227 }; 4228 4229 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4230 4231 struct ec_params_device_event { 4232 uint32_t event_mask; 4233 uint8_t param; 4234 } __ec_align_size1; 4235 4236 struct ec_response_device_event { 4237 uint32_t event_mask; 4238 } __ec_align4; 4239 4240 /*****************************************************************************/ 4241 /* Smart battery pass-through */ 4242 4243 /* Get / Set 16-bit smart battery registers */ 4244 #define EC_CMD_SB_READ_WORD 0x00B0 4245 #define EC_CMD_SB_WRITE_WORD 0x00B1 4246 4247 /* Get / Set string smart battery parameters 4248 * formatted as SMBUS "block". 4249 */ 4250 #define EC_CMD_SB_READ_BLOCK 0x00B2 4251 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4252 4253 struct ec_params_sb_rd { 4254 uint8_t reg; 4255 } __ec_align1; 4256 4257 struct ec_response_sb_rd_word { 4258 uint16_t value; 4259 } __ec_align2; 4260 4261 struct ec_params_sb_wr_word { 4262 uint8_t reg; 4263 uint16_t value; 4264 } __ec_align1; 4265 4266 struct ec_response_sb_rd_block { 4267 uint8_t data[32]; 4268 } __ec_align1; 4269 4270 struct ec_params_sb_wr_block { 4271 uint8_t reg; 4272 uint16_t data[32]; 4273 } __ec_align1; 4274 4275 /*****************************************************************************/ 4276 /* Battery vendor parameters 4277 * 4278 * Get or set vendor-specific parameters in the battery. Implementations may 4279 * differ between boards or batteries. On a set operation, the response 4280 * contains the actual value set, which may be rounded or clipped from the 4281 * requested value. 4282 */ 4283 4284 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4285 4286 enum ec_battery_vendor_param_mode { 4287 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4288 BATTERY_VENDOR_PARAM_MODE_SET, 4289 }; 4290 4291 struct ec_params_battery_vendor_param { 4292 uint32_t param; 4293 uint32_t value; 4294 uint8_t mode; 4295 } __ec_align_size1; 4296 4297 struct ec_response_battery_vendor_param { 4298 uint32_t value; 4299 } __ec_align4; 4300 4301 /*****************************************************************************/ 4302 /* 4303 * Smart Battery Firmware Update Commands 4304 */ 4305 #define EC_CMD_SB_FW_UPDATE 0x00B5 4306 4307 enum ec_sb_fw_update_subcmd { 4308 EC_SB_FW_UPDATE_PREPARE = 0x0, 4309 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4310 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4311 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4312 EC_SB_FW_UPDATE_END = 0x4, 4313 EC_SB_FW_UPDATE_STATUS = 0x5, 4314 EC_SB_FW_UPDATE_PROTECT = 0x6, 4315 EC_SB_FW_UPDATE_MAX = 0x7, 4316 }; 4317 4318 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4319 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4320 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4321 4322 struct ec_sb_fw_update_header { 4323 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4324 uint16_t fw_id; /* firmware id */ 4325 } __ec_align4; 4326 4327 struct ec_params_sb_fw_update { 4328 struct ec_sb_fw_update_header hdr; 4329 union { 4330 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4331 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4332 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4333 /* EC_SB_FW_UPDATE_END = 0x4 */ 4334 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4335 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4336 /* Those have no args */ 4337 4338 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4339 struct __ec_align4 { 4340 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4341 } write; 4342 }; 4343 } __ec_align4; 4344 4345 struct ec_response_sb_fw_update { 4346 union { 4347 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4348 struct __ec_align1 { 4349 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4350 } info; 4351 4352 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4353 struct __ec_align1 { 4354 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4355 } status; 4356 }; 4357 } __ec_align1; 4358 4359 /* 4360 * Entering Verified Boot Mode Command 4361 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4362 * Valid Modes are: normal, developer, and recovery. 4363 */ 4364 #define EC_CMD_ENTERING_MODE 0x00B6 4365 4366 struct ec_params_entering_mode { 4367 int vboot_mode; 4368 } __ec_align4; 4369 4370 #define VBOOT_MODE_NORMAL 0 4371 #define VBOOT_MODE_DEVELOPER 1 4372 #define VBOOT_MODE_RECOVERY 2 4373 4374 /*****************************************************************************/ 4375 /* 4376 * I2C passthru protection command: Protects I2C tunnels against access on 4377 * certain addresses (board-specific). 4378 */ 4379 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4380 4381 enum ec_i2c_passthru_protect_subcmd { 4382 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4383 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4384 }; 4385 4386 struct ec_params_i2c_passthru_protect { 4387 uint8_t subcmd; 4388 uint8_t port; /* I2C port number */ 4389 } __ec_align1; 4390 4391 struct ec_response_i2c_passthru_protect { 4392 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4393 } __ec_align1; 4394 4395 4396 /*****************************************************************************/ 4397 /* 4398 * HDMI CEC commands 4399 * 4400 * These commands are for sending and receiving message via HDMI CEC 4401 */ 4402 4403 #define MAX_CEC_MSG_LEN 16 4404 4405 /* CEC message from the AP to be written on the CEC bus */ 4406 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4407 4408 /** 4409 * struct ec_params_cec_write - Message to write to the CEC bus 4410 * @msg: message content to write to the CEC bus 4411 */ 4412 struct ec_params_cec_write { 4413 uint8_t msg[MAX_CEC_MSG_LEN]; 4414 } __ec_align1; 4415 4416 /* Set various CEC parameters */ 4417 #define EC_CMD_CEC_SET 0x00BA 4418 4419 /** 4420 * struct ec_params_cec_set - CEC parameters set 4421 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4422 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4423 * or 1 to enable CEC functionality, in case cmd is 4424 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4425 * address between 0 and 15 or 0xff to unregister 4426 */ 4427 struct ec_params_cec_set { 4428 uint8_t cmd; /* enum cec_command */ 4429 uint8_t val; 4430 } __ec_align1; 4431 4432 /* Read various CEC parameters */ 4433 #define EC_CMD_CEC_GET 0x00BB 4434 4435 /** 4436 * struct ec_params_cec_get - CEC parameters get 4437 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4438 */ 4439 struct ec_params_cec_get { 4440 uint8_t cmd; /* enum cec_command */ 4441 } __ec_align1; 4442 4443 /** 4444 * struct ec_response_cec_get - CEC parameters get response 4445 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4446 * disabled or 1 if CEC functionality is enabled, 4447 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4448 * configured logical address between 0 and 15 or 0xff if unregistered 4449 */ 4450 struct ec_response_cec_get { 4451 uint8_t val; 4452 } __ec_align1; 4453 4454 /* CEC parameters command */ 4455 enum cec_command { 4456 /* CEC reading, writing and events enable */ 4457 CEC_CMD_ENABLE, 4458 /* CEC logical address */ 4459 CEC_CMD_LOGICAL_ADDRESS, 4460 }; 4461 4462 /* Events from CEC to AP */ 4463 enum mkbp_cec_event { 4464 /* Outgoing message was acknowledged by a follower */ 4465 EC_MKBP_CEC_SEND_OK = BIT(0), 4466 /* Outgoing message was not acknowledged */ 4467 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4468 }; 4469 4470 /*****************************************************************************/ 4471 4472 /* Commands for audio codec. */ 4473 #define EC_CMD_EC_CODEC 0x00BC 4474 4475 enum ec_codec_subcmd { 4476 EC_CODEC_GET_CAPABILITIES = 0x0, 4477 EC_CODEC_GET_SHM_ADDR = 0x1, 4478 EC_CODEC_SET_SHM_ADDR = 0x2, 4479 EC_CODEC_SUBCMD_COUNT, 4480 }; 4481 4482 enum ec_codec_cap { 4483 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4484 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4485 EC_CODEC_CAP_LAST = 32, 4486 }; 4487 4488 enum ec_codec_shm_id { 4489 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4490 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4491 EC_CODEC_SHM_ID_LAST, 4492 }; 4493 4494 enum ec_codec_shm_type { 4495 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4496 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4497 }; 4498 4499 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4500 uint8_t shm_id; 4501 uint8_t reserved[3]; 4502 }; 4503 4504 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4505 uint64_t phys_addr; 4506 uint32_t len; 4507 uint8_t shm_id; 4508 uint8_t reserved[3]; 4509 }; 4510 4511 struct __ec_align4 ec_param_ec_codec { 4512 uint8_t cmd; /* enum ec_codec_subcmd */ 4513 uint8_t reserved[3]; 4514 4515 union { 4516 struct ec_param_ec_codec_get_shm_addr 4517 get_shm_addr_param; 4518 struct ec_param_ec_codec_set_shm_addr 4519 set_shm_addr_param; 4520 }; 4521 }; 4522 4523 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4524 uint32_t capabilities; 4525 }; 4526 4527 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4528 uint64_t phys_addr; 4529 uint32_t len; 4530 uint8_t type; 4531 uint8_t reserved[3]; 4532 }; 4533 4534 /*****************************************************************************/ 4535 4536 /* Commands for DMIC on audio codec. */ 4537 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4538 4539 enum ec_codec_dmic_subcmd { 4540 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4541 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4542 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4543 EC_CODEC_DMIC_SUBCMD_COUNT, 4544 }; 4545 4546 enum ec_codec_dmic_channel { 4547 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4548 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4549 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4550 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4551 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4552 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4553 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4554 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4555 EC_CODEC_DMIC_CHANNEL_COUNT, 4556 }; 4557 4558 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4559 uint8_t channel; /* enum ec_codec_dmic_channel */ 4560 uint8_t gain; 4561 uint8_t reserved[2]; 4562 }; 4563 4564 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4565 uint8_t channel; /* enum ec_codec_dmic_channel */ 4566 uint8_t reserved[3]; 4567 }; 4568 4569 struct __ec_align4 ec_param_ec_codec_dmic { 4570 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4571 uint8_t reserved[3]; 4572 4573 union { 4574 struct ec_param_ec_codec_dmic_set_gain_idx 4575 set_gain_idx_param; 4576 struct ec_param_ec_codec_dmic_get_gain_idx 4577 get_gain_idx_param; 4578 }; 4579 }; 4580 4581 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4582 uint8_t max_gain; 4583 }; 4584 4585 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4586 uint8_t gain; 4587 }; 4588 4589 /*****************************************************************************/ 4590 4591 /* Commands for I2S RX on audio codec. */ 4592 4593 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4594 4595 enum ec_codec_i2s_rx_subcmd { 4596 EC_CODEC_I2S_RX_ENABLE = 0x0, 4597 EC_CODEC_I2S_RX_DISABLE = 0x1, 4598 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4599 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4600 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4601 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4602 }; 4603 4604 enum ec_codec_i2s_rx_sample_depth { 4605 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4606 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4607 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4608 }; 4609 4610 enum ec_codec_i2s_rx_daifmt { 4611 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4612 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4613 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4614 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4615 }; 4616 4617 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4618 uint8_t depth; 4619 uint8_t reserved[3]; 4620 }; 4621 4622 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4623 uint8_t left; 4624 uint8_t right; 4625 uint8_t reserved[2]; 4626 }; 4627 4628 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4629 uint8_t daifmt; 4630 uint8_t reserved[3]; 4631 }; 4632 4633 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4634 uint32_t bclk; 4635 }; 4636 4637 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4638 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4639 uint8_t reserved[3]; 4640 4641 union { 4642 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4643 set_sample_depth_param; 4644 struct ec_param_ec_codec_i2s_rx_set_daifmt 4645 set_daifmt_param; 4646 struct ec_param_ec_codec_i2s_rx_set_bclk 4647 set_bclk_param; 4648 }; 4649 }; 4650 4651 /*****************************************************************************/ 4652 /* Commands for WoV on audio codec. */ 4653 4654 #define EC_CMD_EC_CODEC_WOV 0x00BF 4655 4656 enum ec_codec_wov_subcmd { 4657 EC_CODEC_WOV_SET_LANG = 0x0, 4658 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4659 EC_CODEC_WOV_GET_LANG = 0x2, 4660 EC_CODEC_WOV_ENABLE = 0x3, 4661 EC_CODEC_WOV_DISABLE = 0x4, 4662 EC_CODEC_WOV_READ_AUDIO = 0x5, 4663 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4664 EC_CODEC_WOV_SUBCMD_COUNT, 4665 }; 4666 4667 /* 4668 * @hash is SHA256 of the whole language model. 4669 * @total_len indicates the length of whole language model. 4670 * @offset is the cursor from the beginning of the model. 4671 * @buf is the packet buffer. 4672 * @len denotes how many bytes in the buf. 4673 */ 4674 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4675 uint8_t hash[32]; 4676 uint32_t total_len; 4677 uint32_t offset; 4678 uint8_t buf[128]; 4679 uint32_t len; 4680 }; 4681 4682 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4683 uint8_t hash[32]; 4684 uint32_t total_len; 4685 }; 4686 4687 struct __ec_align4 ec_param_ec_codec_wov { 4688 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4689 uint8_t reserved[3]; 4690 4691 union { 4692 struct ec_param_ec_codec_wov_set_lang 4693 set_lang_param; 4694 struct ec_param_ec_codec_wov_set_lang_shm 4695 set_lang_shm_param; 4696 }; 4697 }; 4698 4699 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4700 uint8_t hash[32]; 4701 }; 4702 4703 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4704 uint8_t buf[128]; 4705 uint32_t len; 4706 }; 4707 4708 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4709 uint32_t offset; 4710 uint32_t len; 4711 }; 4712 4713 /*****************************************************************************/ 4714 /* System commands */ 4715 4716 /* 4717 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4718 * necessarily reboot the EC. Rename to "image" or something similar? 4719 */ 4720 #define EC_CMD_REBOOT_EC 0x00D2 4721 4722 /* Command */ 4723 enum ec_reboot_cmd { 4724 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4725 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4726 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4727 /* (command 3 was jump to RW-B) */ 4728 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4729 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4730 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 4731 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4732 }; 4733 4734 /* Flags for ec_params_reboot_ec.reboot_flags */ 4735 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 4736 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 4737 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4738 4739 struct ec_params_reboot_ec { 4740 uint8_t cmd; /* enum ec_reboot_cmd */ 4741 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4742 } __ec_align1; 4743 4744 /* 4745 * Get information on last EC panic. 4746 * 4747 * Returns variable-length platform-dependent panic information. See panic.h 4748 * for details. 4749 */ 4750 #define EC_CMD_GET_PANIC_INFO 0x00D3 4751 4752 /*****************************************************************************/ 4753 /* 4754 * Special commands 4755 * 4756 * These do not follow the normal rules for commands. See each command for 4757 * details. 4758 */ 4759 4760 /* 4761 * Reboot NOW 4762 * 4763 * This command will work even when the EC LPC interface is busy, because the 4764 * reboot command is processed at interrupt level. Note that when the EC 4765 * reboots, the host will reboot too, so there is no response to this command. 4766 * 4767 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 4768 */ 4769 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 4770 4771 /* 4772 * Resend last response (not supported on LPC). 4773 * 4774 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 4775 * there was no previous command, or the previous command's response was too 4776 * big to save. 4777 */ 4778 #define EC_CMD_RESEND_RESPONSE 0x00DB 4779 4780 /* 4781 * This header byte on a command indicate version 0. Any header byte less 4782 * than this means that we are talking to an old EC which doesn't support 4783 * versioning. In that case, we assume version 0. 4784 * 4785 * Header bytes greater than this indicate a later version. For example, 4786 * EC_CMD_VERSION0 + 1 means we are using version 1. 4787 * 4788 * The old EC interface must not use commands 0xdc or higher. 4789 */ 4790 #define EC_CMD_VERSION0 0x00DC 4791 4792 /*****************************************************************************/ 4793 /* 4794 * PD commands 4795 * 4796 * These commands are for PD MCU communication. 4797 */ 4798 4799 /* EC to PD MCU exchange status command */ 4800 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 4801 #define EC_VER_PD_EXCHANGE_STATUS 2 4802 4803 enum pd_charge_state { 4804 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 4805 PD_CHARGE_NONE, /* No charging allowed */ 4806 PD_CHARGE_5V, /* 5V charging only */ 4807 PD_CHARGE_MAX /* Charge at max voltage */ 4808 }; 4809 4810 /* Status of EC being sent to PD */ 4811 #define EC_STATUS_HIBERNATING BIT(0) 4812 4813 struct ec_params_pd_status { 4814 uint8_t status; /* EC status */ 4815 int8_t batt_soc; /* battery state of charge */ 4816 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 4817 } __ec_align1; 4818 4819 /* Status of PD being sent back to EC */ 4820 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 4821 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 4822 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 4823 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 4824 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 4825 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 4826 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 4827 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 4828 PD_STATUS_TCPC_ALERT_1 | \ 4829 PD_STATUS_HOST_EVENT) 4830 struct ec_response_pd_status { 4831 uint32_t curr_lim_ma; /* input current limit */ 4832 uint16_t status; /* PD MCU status */ 4833 int8_t active_charge_port; /* active charging port */ 4834 } __ec_align_size1; 4835 4836 /* AP to PD MCU host event status command, cleared on read */ 4837 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 4838 4839 /* PD MCU host event status bits */ 4840 #define PD_EVENT_UPDATE_DEVICE BIT(0) 4841 #define PD_EVENT_POWER_CHANGE BIT(1) 4842 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 4843 #define PD_EVENT_DATA_SWAP BIT(3) 4844 struct ec_response_host_event_status { 4845 uint32_t status; /* PD MCU host event status */ 4846 } __ec_align4; 4847 4848 /* Set USB type-C port role and muxes */ 4849 #define EC_CMD_USB_PD_CONTROL 0x0101 4850 4851 enum usb_pd_control_role { 4852 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 4853 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 4854 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 4855 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 4856 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 4857 USB_PD_CTRL_ROLE_FREEZE = 5, 4858 USB_PD_CTRL_ROLE_COUNT 4859 }; 4860 4861 enum usb_pd_control_mux { 4862 USB_PD_CTRL_MUX_NO_CHANGE = 0, 4863 USB_PD_CTRL_MUX_NONE = 1, 4864 USB_PD_CTRL_MUX_USB = 2, 4865 USB_PD_CTRL_MUX_DP = 3, 4866 USB_PD_CTRL_MUX_DOCK = 4, 4867 USB_PD_CTRL_MUX_AUTO = 5, 4868 USB_PD_CTRL_MUX_COUNT 4869 }; 4870 4871 enum usb_pd_control_swap { 4872 USB_PD_CTRL_SWAP_NONE = 0, 4873 USB_PD_CTRL_SWAP_DATA = 1, 4874 USB_PD_CTRL_SWAP_POWER = 2, 4875 USB_PD_CTRL_SWAP_VCONN = 3, 4876 USB_PD_CTRL_SWAP_COUNT 4877 }; 4878 4879 struct ec_params_usb_pd_control { 4880 uint8_t port; 4881 uint8_t role; 4882 uint8_t mux; 4883 uint8_t swap; 4884 } __ec_align1; 4885 4886 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 4887 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 4888 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 4889 4890 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 4891 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 4892 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 4893 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 4894 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 4895 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 4896 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 4897 4898 struct ec_response_usb_pd_control { 4899 uint8_t enabled; 4900 uint8_t role; 4901 uint8_t polarity; 4902 uint8_t state; 4903 } __ec_align1; 4904 4905 struct ec_response_usb_pd_control_v1 { 4906 uint8_t enabled; 4907 uint8_t role; 4908 uint8_t polarity; 4909 char state[32]; 4910 } __ec_align1; 4911 4912 /* Values representing usbc PD CC state */ 4913 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 4914 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 4915 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 4916 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 4917 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 4918 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 4919 4920 /* Active/Passive Cable */ 4921 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 4922 /* Optical/Non-optical cable */ 4923 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 4924 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 4925 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 4926 /* Active Link Uni-Direction */ 4927 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 4928 4929 struct ec_response_usb_pd_control_v2 { 4930 uint8_t enabled; 4931 uint8_t role; 4932 uint8_t polarity; 4933 char state[32]; 4934 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 4935 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 4936 uint8_t reserved; /* Reserved for future use */ 4937 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 4938 uint8_t cable_speed; /* TBT_SS_* cable speed */ 4939 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 4940 } __ec_align1; 4941 4942 #define EC_CMD_USB_PD_PORTS 0x0102 4943 4944 /* Maximum number of PD ports on a device, num_ports will be <= this */ 4945 #define EC_USB_PD_MAX_PORTS 8 4946 4947 struct ec_response_usb_pd_ports { 4948 uint8_t num_ports; 4949 } __ec_align1; 4950 4951 #define EC_CMD_USB_PD_POWER_INFO 0x0103 4952 4953 #define PD_POWER_CHARGING_PORT 0xff 4954 struct ec_params_usb_pd_power_info { 4955 uint8_t port; 4956 } __ec_align1; 4957 4958 enum usb_chg_type { 4959 USB_CHG_TYPE_NONE, 4960 USB_CHG_TYPE_PD, 4961 USB_CHG_TYPE_C, 4962 USB_CHG_TYPE_PROPRIETARY, 4963 USB_CHG_TYPE_BC12_DCP, 4964 USB_CHG_TYPE_BC12_CDP, 4965 USB_CHG_TYPE_BC12_SDP, 4966 USB_CHG_TYPE_OTHER, 4967 USB_CHG_TYPE_VBUS, 4968 USB_CHG_TYPE_UNKNOWN, 4969 USB_CHG_TYPE_DEDICATED, 4970 }; 4971 enum usb_power_roles { 4972 USB_PD_PORT_POWER_DISCONNECTED, 4973 USB_PD_PORT_POWER_SOURCE, 4974 USB_PD_PORT_POWER_SINK, 4975 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 4976 }; 4977 4978 struct usb_chg_measures { 4979 uint16_t voltage_max; 4980 uint16_t voltage_now; 4981 uint16_t current_max; 4982 uint16_t current_lim; 4983 } __ec_align2; 4984 4985 struct ec_response_usb_pd_power_info { 4986 uint8_t role; 4987 uint8_t type; 4988 uint8_t dualrole; 4989 uint8_t reserved1; 4990 struct usb_chg_measures meas; 4991 uint32_t max_power; 4992 } __ec_align4; 4993 4994 4995 /* 4996 * This command will return the number of USB PD charge port + the number 4997 * of dedicated port present. 4998 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 4999 */ 5000 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5001 struct ec_response_charge_port_count { 5002 uint8_t port_count; 5003 } __ec_align1; 5004 5005 /* Write USB-PD device FW */ 5006 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5007 5008 enum usb_pd_fw_update_cmds { 5009 USB_PD_FW_REBOOT, 5010 USB_PD_FW_FLASH_ERASE, 5011 USB_PD_FW_FLASH_WRITE, 5012 USB_PD_FW_ERASE_SIG, 5013 }; 5014 5015 struct ec_params_usb_pd_fw_update { 5016 uint16_t dev_id; 5017 uint8_t cmd; 5018 uint8_t port; 5019 uint32_t size; /* Size to write in bytes */ 5020 /* Followed by data to write */ 5021 } __ec_align4; 5022 5023 /* Write USB-PD Accessory RW_HASH table entry */ 5024 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5025 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5026 #define PD_RW_HASH_SIZE 20 5027 struct ec_params_usb_pd_rw_hash_entry { 5028 uint16_t dev_id; 5029 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5030 uint8_t reserved; /* 5031 * For alignment of current_image 5032 * TODO(rspangler) but it's not aligned! 5033 * Should have been reserved[2]. 5034 */ 5035 uint32_t current_image; /* One of ec_current_image */ 5036 } __ec_align1; 5037 5038 /* Read USB-PD Accessory info */ 5039 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5040 5041 struct ec_params_usb_pd_info_request { 5042 uint8_t port; 5043 } __ec_align1; 5044 5045 /* Read USB-PD Device discovery info */ 5046 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5047 struct ec_params_usb_pd_discovery_entry { 5048 uint16_t vid; /* USB-IF VID */ 5049 uint16_t pid; /* USB-IF PID */ 5050 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5051 } __ec_align_size1; 5052 5053 /* Override default charge behavior */ 5054 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5055 5056 /* Negative port parameters have special meaning */ 5057 enum usb_pd_override_ports { 5058 OVERRIDE_DONT_CHARGE = -2, 5059 OVERRIDE_OFF = -1, 5060 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5061 }; 5062 5063 struct ec_params_charge_port_override { 5064 int16_t override_port; /* Override port# */ 5065 } __ec_align2; 5066 5067 /* 5068 * Read (and delete) one entry of PD event log. 5069 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5070 * future non-PD logs that use the same internal EC event_log. 5071 */ 5072 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5073 5074 struct ec_response_pd_log { 5075 uint32_t timestamp; /* relative timestamp in milliseconds */ 5076 uint8_t type; /* event type : see PD_EVENT_xx below */ 5077 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5078 uint16_t data; /* type-defined data payload */ 5079 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5080 } __ec_align4; 5081 5082 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5083 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5084 5085 #define PD_LOG_SIZE_MASK 0x1f 5086 #define PD_LOG_PORT_MASK 0xe0 5087 #define PD_LOG_PORT_SHIFT 5 5088 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5089 ((size) & PD_LOG_SIZE_MASK)) 5090 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5091 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5092 5093 /* PD event log : entry types */ 5094 /* PD MCU events */ 5095 #define PD_EVENT_MCU_BASE 0x00 5096 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5097 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5098 /* Reserved for custom board event */ 5099 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5100 /* PD generic accessory events */ 5101 #define PD_EVENT_ACC_BASE 0x20 5102 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5103 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5104 /* PD power supply events */ 5105 #define PD_EVENT_PS_BASE 0x40 5106 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5107 /* PD video dongles events */ 5108 #define PD_EVENT_VIDEO_BASE 0x60 5109 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5110 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5111 /* Returned in the "type" field, when there is no entry available */ 5112 #define PD_EVENT_NO_ENTRY 0xff 5113 5114 /* 5115 * PD_EVENT_MCU_CHARGE event definition : 5116 * the payload is "struct usb_chg_measures" 5117 * the data field contains the port state flags as defined below : 5118 */ 5119 /* Port partner is a dual role device */ 5120 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5121 /* Port is the pending override port */ 5122 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5123 /* Port is the override port */ 5124 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5125 /* Charger type */ 5126 #define CHARGE_FLAGS_TYPE_SHIFT 3 5127 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5128 /* Power delivery role */ 5129 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5130 5131 /* 5132 * PD_EVENT_PS_FAULT data field flags definition : 5133 */ 5134 #define PS_FAULT_OCP 1 5135 #define PS_FAULT_FAST_OCP 2 5136 #define PS_FAULT_OVP 3 5137 #define PS_FAULT_DISCH 4 5138 5139 /* 5140 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5141 */ 5142 struct mcdp_version { 5143 uint8_t major; 5144 uint8_t minor; 5145 uint16_t build; 5146 } __ec_align4; 5147 5148 struct mcdp_info { 5149 uint8_t family[2]; 5150 uint8_t chipid[2]; 5151 struct mcdp_version irom; 5152 struct mcdp_version fw; 5153 } __ec_align4; 5154 5155 /* struct mcdp_info field decoding */ 5156 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5157 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5158 5159 /* Get/Set USB-PD Alternate mode info */ 5160 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5161 struct ec_params_usb_pd_get_mode_request { 5162 uint16_t svid_idx; /* SVID index to get */ 5163 uint8_t port; /* port */ 5164 } __ec_align_size1; 5165 5166 struct ec_params_usb_pd_get_mode_response { 5167 uint16_t svid; /* SVID */ 5168 uint16_t opos; /* Object Position */ 5169 uint32_t vdo[6]; /* Mode VDOs */ 5170 } __ec_align4; 5171 5172 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5173 5174 enum pd_mode_cmd { 5175 PD_EXIT_MODE = 0, 5176 PD_ENTER_MODE = 1, 5177 /* Not a command. Do NOT remove. */ 5178 PD_MODE_CMD_COUNT, 5179 }; 5180 5181 struct ec_params_usb_pd_set_mode_request { 5182 uint32_t cmd; /* enum pd_mode_cmd */ 5183 uint16_t svid; /* SVID to set */ 5184 uint8_t opos; /* Object Position */ 5185 uint8_t port; /* port */ 5186 } __ec_align4; 5187 5188 /* Ask the PD MCU to record a log of a requested type */ 5189 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5190 5191 struct ec_params_pd_write_log_entry { 5192 uint8_t type; /* event type : see PD_EVENT_xx above */ 5193 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5194 } __ec_align1; 5195 5196 5197 /* Control USB-PD chip */ 5198 #define EC_CMD_PD_CONTROL 0x0119 5199 5200 enum ec_pd_control_cmd { 5201 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5202 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5203 PD_RESET, /* Force reset the PD chip */ 5204 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5205 PD_CHIP_ON, /* Power on the PD chip */ 5206 }; 5207 5208 struct ec_params_pd_control { 5209 uint8_t chip; /* chip id */ 5210 uint8_t subcmd; 5211 } __ec_align1; 5212 5213 /* Get info about USB-C SS muxes */ 5214 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5215 5216 struct ec_params_usb_pd_mux_info { 5217 uint8_t port; /* USB-C port number */ 5218 } __ec_align1; 5219 5220 /* Flags representing mux state */ 5221 #define USB_PD_MUX_NONE 0 /* Open switch */ 5222 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5223 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5224 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5225 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5226 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5227 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5228 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5229 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5230 5231 struct ec_response_usb_pd_mux_info { 5232 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5233 } __ec_align1; 5234 5235 #define EC_CMD_PD_CHIP_INFO 0x011B 5236 5237 struct ec_params_pd_chip_info { 5238 uint8_t port; /* USB-C port number */ 5239 uint8_t renew; /* Force renewal */ 5240 } __ec_align1; 5241 5242 struct ec_response_pd_chip_info { 5243 uint16_t vendor_id; 5244 uint16_t product_id; 5245 uint16_t device_id; 5246 union { 5247 uint8_t fw_version_string[8]; 5248 uint64_t fw_version_number; 5249 }; 5250 } __ec_align2; 5251 5252 struct ec_response_pd_chip_info_v1 { 5253 uint16_t vendor_id; 5254 uint16_t product_id; 5255 uint16_t device_id; 5256 union { 5257 uint8_t fw_version_string[8]; 5258 uint64_t fw_version_number; 5259 }; 5260 union { 5261 uint8_t min_req_fw_version_string[8]; 5262 uint64_t min_req_fw_version_number; 5263 }; 5264 } __ec_align2; 5265 5266 /* Run RW signature verification and get status */ 5267 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5268 5269 struct ec_response_rwsig_check_status { 5270 uint32_t status; 5271 } __ec_align4; 5272 5273 /* For controlling RWSIG task */ 5274 #define EC_CMD_RWSIG_ACTION 0x011D 5275 5276 enum rwsig_action { 5277 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5278 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5279 }; 5280 5281 struct ec_params_rwsig_action { 5282 uint32_t action; 5283 } __ec_align4; 5284 5285 /* Run verification on a slot */ 5286 #define EC_CMD_EFS_VERIFY 0x011E 5287 5288 struct ec_params_efs_verify { 5289 uint8_t region; /* enum ec_flash_region */ 5290 } __ec_align1; 5291 5292 /* 5293 * Retrieve info from Cros Board Info store. Response is based on the data 5294 * type. Integers return a uint32. Strings return a string, using the response 5295 * size to determine how big it is. 5296 */ 5297 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5298 /* 5299 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5300 * hardware write-protect enabled. 5301 */ 5302 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5303 5304 enum cbi_data_tag { 5305 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5306 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5307 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5308 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5309 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5310 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5311 CBI_TAG_COUNT, 5312 }; 5313 5314 /* 5315 * Flags to control read operation 5316 * 5317 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5318 * write was successful without reboot. 5319 */ 5320 #define CBI_GET_RELOAD BIT(0) 5321 5322 struct ec_params_get_cbi { 5323 uint32_t tag; /* enum cbi_data_tag */ 5324 uint32_t flag; /* CBI_GET_* */ 5325 } __ec_align4; 5326 5327 /* 5328 * Flags to control write behavior. 5329 * 5330 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5331 * useful when writing multiple fields in a row. 5332 * INIT: Need to be set when creating a new CBI from scratch. All fields 5333 * will be initialized to zero first. 5334 */ 5335 #define CBI_SET_NO_SYNC BIT(0) 5336 #define CBI_SET_INIT BIT(1) 5337 5338 struct ec_params_set_cbi { 5339 uint32_t tag; /* enum cbi_data_tag */ 5340 uint32_t flag; /* CBI_SET_* */ 5341 uint32_t size; /* Data size */ 5342 uint8_t data[]; /* For string and raw data */ 5343 } __ec_align1; 5344 5345 /* 5346 * Information about resets of the AP by the EC and the EC's own uptime. 5347 */ 5348 #define EC_CMD_GET_UPTIME_INFO 0x0121 5349 5350 struct ec_response_uptime_info { 5351 /* 5352 * Number of milliseconds since the last EC boot. Sysjump resets 5353 * typically do not restart the EC's time_since_boot epoch. 5354 * 5355 * WARNING: The EC's sense of time is much less accurate than the AP's 5356 * sense of time, in both phase and frequency. This timebase is similar 5357 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5358 */ 5359 uint32_t time_since_ec_boot_ms; 5360 5361 /* 5362 * Number of times the AP was reset by the EC since the last EC boot. 5363 * Note that the AP may be held in reset by the EC during the initial 5364 * boot sequence, such that the very first AP boot may count as more 5365 * than one here. 5366 */ 5367 uint32_t ap_resets_since_ec_boot; 5368 5369 /* 5370 * The set of flags which describe the EC's most recent reset. See 5371 * include/system.h RESET_FLAG_* for details. 5372 */ 5373 uint32_t ec_reset_flags; 5374 5375 /* Empty log entries have both the cause and timestamp set to zero. */ 5376 struct ap_reset_log_entry { 5377 /* 5378 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5379 * for details. 5380 */ 5381 uint16_t reset_cause; 5382 5383 /* Reserved for protocol growth. */ 5384 uint16_t reserved; 5385 5386 /* 5387 * The time of the reset's assertion, in milliseconds since the 5388 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5389 * Set to zero if the log entry is empty. 5390 */ 5391 uint32_t reset_time_ms; 5392 } recent_ap_reset[4]; 5393 } __ec_align4; 5394 5395 /* 5396 * Add entropy to the device secret (stored in the rollback region). 5397 * 5398 * Depending on the chip, the operation may take a long time (e.g. to erase 5399 * flash), so the commands are asynchronous. 5400 */ 5401 #define EC_CMD_ADD_ENTROPY 0x0122 5402 5403 enum add_entropy_action { 5404 /* Add entropy to the current secret. */ 5405 ADD_ENTROPY_ASYNC = 0, 5406 /* 5407 * Add entropy, and also make sure that the previous secret is erased. 5408 * (this can be implemented by adding entropy multiple times until 5409 * all rolback blocks have been overwritten). 5410 */ 5411 ADD_ENTROPY_RESET_ASYNC = 1, 5412 /* Read back result from the previous operation. */ 5413 ADD_ENTROPY_GET_RESULT = 2, 5414 }; 5415 5416 struct ec_params_rollback_add_entropy { 5417 uint8_t action; 5418 } __ec_align1; 5419 5420 /* 5421 * Perform a single read of a given ADC channel. 5422 */ 5423 #define EC_CMD_ADC_READ 0x0123 5424 5425 struct ec_params_adc_read { 5426 uint8_t adc_channel; 5427 } __ec_align1; 5428 5429 struct ec_response_adc_read { 5430 int32_t adc_value; 5431 } __ec_align4; 5432 5433 /* 5434 * Read back rollback info 5435 */ 5436 #define EC_CMD_ROLLBACK_INFO 0x0124 5437 5438 struct ec_response_rollback_info { 5439 int32_t id; /* Incrementing number to indicate which region to use. */ 5440 int32_t rollback_min_version; 5441 int32_t rw_rollback_version; 5442 } __ec_align4; 5443 5444 5445 /* Issue AP reset */ 5446 #define EC_CMD_AP_RESET 0x0125 5447 5448 /*****************************************************************************/ 5449 /* Voltage regulator controls */ 5450 5451 /* 5452 * Get basic info of voltage regulator for given index. 5453 * 5454 * Returns the regulator name and supported voltage list in mV. 5455 */ 5456 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5457 5458 /* Maximum length of regulator name */ 5459 #define EC_REGULATOR_NAME_MAX_LEN 16 5460 5461 /* Maximum length of the supported voltage list. */ 5462 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5463 5464 struct ec_params_regulator_get_info { 5465 uint32_t index; 5466 } __ec_align4; 5467 5468 struct ec_response_regulator_get_info { 5469 char name[EC_REGULATOR_NAME_MAX_LEN]; 5470 uint16_t num_voltages; 5471 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5472 } __ec_align2; 5473 5474 /* 5475 * Configure the regulator as enabled / disabled. 5476 */ 5477 #define EC_CMD_REGULATOR_ENABLE 0x012D 5478 5479 struct ec_params_regulator_enable { 5480 uint32_t index; 5481 uint8_t enable; 5482 } __ec_align4; 5483 5484 /* 5485 * Query if the regulator is enabled. 5486 * 5487 * Returns 1 if the regulator is enabled, 0 if not. 5488 */ 5489 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5490 5491 struct ec_params_regulator_is_enabled { 5492 uint32_t index; 5493 } __ec_align4; 5494 5495 struct ec_response_regulator_is_enabled { 5496 uint8_t enabled; 5497 } __ec_align1; 5498 5499 /* 5500 * Set voltage for the voltage regulator within the range specified. 5501 * 5502 * The driver should select the voltage in range closest to min_mv. 5503 * 5504 * Also note that this might be called before the regulator is enabled, and the 5505 * setting should be in effect after the regulator is enabled. 5506 */ 5507 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5508 5509 struct ec_params_regulator_set_voltage { 5510 uint32_t index; 5511 uint32_t min_mv; 5512 uint32_t max_mv; 5513 } __ec_align4; 5514 5515 /* 5516 * Get the currently configured voltage for the voltage regulator. 5517 * 5518 * Note that this might be called before the regulator is enabled, and this 5519 * should return the configured output voltage if the regulator is enabled. 5520 */ 5521 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5522 5523 struct ec_params_regulator_get_voltage { 5524 uint32_t index; 5525 } __ec_align4; 5526 5527 struct ec_response_regulator_get_voltage { 5528 uint32_t voltage_mv; 5529 } __ec_align4; 5530 5531 /*****************************************************************************/ 5532 /* The command range 0x200-0x2FF is reserved for Rotor. */ 5533 5534 /*****************************************************************************/ 5535 /* 5536 * Reserve a range of host commands for the CR51 firmware. 5537 */ 5538 #define EC_CMD_CR51_BASE 0x0300 5539 #define EC_CMD_CR51_LAST 0x03FF 5540 5541 /*****************************************************************************/ 5542 /* Fingerprint MCU commands: range 0x0400-0x040x */ 5543 5544 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 5545 #define EC_CMD_FP_PASSTHRU 0x0400 5546 5547 #define EC_FP_FLAG_NOT_COMPLETE 0x1 5548 5549 struct ec_params_fp_passthru { 5550 uint16_t len; /* Number of bytes to write then read */ 5551 uint16_t flags; /* EC_FP_FLAG_xxx */ 5552 uint8_t data[]; /* Data to send */ 5553 } __ec_align2; 5554 5555 /* Configure the Fingerprint MCU behavior */ 5556 #define EC_CMD_FP_MODE 0x0402 5557 5558 /* Put the sensor in its lowest power mode */ 5559 #define FP_MODE_DEEPSLEEP BIT(0) 5560 /* Wait to see a finger on the sensor */ 5561 #define FP_MODE_FINGER_DOWN BIT(1) 5562 /* Poll until the finger has left the sensor */ 5563 #define FP_MODE_FINGER_UP BIT(2) 5564 /* Capture the current finger image */ 5565 #define FP_MODE_CAPTURE BIT(3) 5566 /* Finger enrollment session on-going */ 5567 #define FP_MODE_ENROLL_SESSION BIT(4) 5568 /* Enroll the current finger image */ 5569 #define FP_MODE_ENROLL_IMAGE BIT(5) 5570 /* Try to match the current finger image */ 5571 #define FP_MODE_MATCH BIT(6) 5572 /* Reset and re-initialize the sensor. */ 5573 #define FP_MODE_RESET_SENSOR BIT(7) 5574 /* special value: don't change anything just read back current mode */ 5575 #define FP_MODE_DONT_CHANGE BIT(31) 5576 5577 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 5578 FP_MODE_FINGER_DOWN | \ 5579 FP_MODE_FINGER_UP | \ 5580 FP_MODE_CAPTURE | \ 5581 FP_MODE_ENROLL_SESSION | \ 5582 FP_MODE_ENROLL_IMAGE | \ 5583 FP_MODE_MATCH | \ 5584 FP_MODE_RESET_SENSOR | \ 5585 FP_MODE_DONT_CHANGE) 5586 5587 /* Capture types defined in bits [30..28] */ 5588 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 5589 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 5590 /* 5591 * This enum must remain ordered, if you add new values you must ensure that 5592 * FP_CAPTURE_TYPE_MAX is still the last one. 5593 */ 5594 enum fp_capture_type { 5595 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 5596 FP_CAPTURE_VENDOR_FORMAT = 0, 5597 /* Simple raw image capture (produces width x height x bpp bits) */ 5598 FP_CAPTURE_SIMPLE_IMAGE = 1, 5599 /* Self test pattern (e.g. checkerboard) */ 5600 FP_CAPTURE_PATTERN0 = 2, 5601 /* Self test pattern (e.g. inverted checkerboard) */ 5602 FP_CAPTURE_PATTERN1 = 3, 5603 /* Capture for Quality test with fixed contrast */ 5604 FP_CAPTURE_QUALITY_TEST = 4, 5605 /* Capture for pixel reset value test */ 5606 FP_CAPTURE_RESET_TEST = 5, 5607 FP_CAPTURE_TYPE_MAX, 5608 }; 5609 /* Extracts the capture type from the sensor 'mode' word */ 5610 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 5611 >> FP_MODE_CAPTURE_TYPE_SHIFT) 5612 5613 struct ec_params_fp_mode { 5614 uint32_t mode; /* as defined by FP_MODE_ constants */ 5615 } __ec_align4; 5616 5617 struct ec_response_fp_mode { 5618 uint32_t mode; /* as defined by FP_MODE_ constants */ 5619 } __ec_align4; 5620 5621 /* Retrieve Fingerprint sensor information */ 5622 #define EC_CMD_FP_INFO 0x0403 5623 5624 /* Number of dead pixels detected on the last maintenance */ 5625 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 5626 /* Unknown number of dead pixels detected on the last maintenance */ 5627 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 5628 /* No interrupt from the sensor */ 5629 #define FP_ERROR_NO_IRQ BIT(12) 5630 /* SPI communication error */ 5631 #define FP_ERROR_SPI_COMM BIT(13) 5632 /* Invalid sensor Hardware ID */ 5633 #define FP_ERROR_BAD_HWID BIT(14) 5634 /* Sensor initialization failed */ 5635 #define FP_ERROR_INIT_FAIL BIT(15) 5636 5637 struct ec_response_fp_info_v0 { 5638 /* Sensor identification */ 5639 uint32_t vendor_id; 5640 uint32_t product_id; 5641 uint32_t model_id; 5642 uint32_t version; 5643 /* Image frame characteristics */ 5644 uint32_t frame_size; 5645 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5646 uint16_t width; 5647 uint16_t height; 5648 uint16_t bpp; 5649 uint16_t errors; /* see FP_ERROR_ flags above */ 5650 } __ec_align4; 5651 5652 struct ec_response_fp_info { 5653 /* Sensor identification */ 5654 uint32_t vendor_id; 5655 uint32_t product_id; 5656 uint32_t model_id; 5657 uint32_t version; 5658 /* Image frame characteristics */ 5659 uint32_t frame_size; 5660 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5661 uint16_t width; 5662 uint16_t height; 5663 uint16_t bpp; 5664 uint16_t errors; /* see FP_ERROR_ flags above */ 5665 /* Template/finger current information */ 5666 uint32_t template_size; /* max template size in bytes */ 5667 uint16_t template_max; /* maximum number of fingers/templates */ 5668 uint16_t template_valid; /* number of valid fingers/templates */ 5669 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 5670 uint32_t template_version; /* version of the template format */ 5671 } __ec_align4; 5672 5673 /* Get the last captured finger frame or a template content */ 5674 #define EC_CMD_FP_FRAME 0x0404 5675 5676 /* constants defining the 'offset' field which also contains the frame index */ 5677 #define FP_FRAME_INDEX_SHIFT 28 5678 /* Frame buffer where the captured image is stored */ 5679 #define FP_FRAME_INDEX_RAW_IMAGE 0 5680 /* First frame buffer holding a template */ 5681 #define FP_FRAME_INDEX_TEMPLATE 1 5682 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 5683 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 5684 5685 /* Version of the format of the encrypted templates. */ 5686 #define FP_TEMPLATE_FORMAT_VERSION 3 5687 5688 /* Constants for encryption parameters */ 5689 #define FP_CONTEXT_NONCE_BYTES 12 5690 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 5691 #define FP_CONTEXT_TAG_BYTES 16 5692 #define FP_CONTEXT_SALT_BYTES 16 5693 #define FP_CONTEXT_TPM_BYTES 32 5694 5695 struct ec_fp_template_encryption_metadata { 5696 /* 5697 * Version of the structure format (N=3). 5698 */ 5699 uint16_t struct_version; 5700 /* Reserved bytes, set to 0. */ 5701 uint16_t reserved; 5702 /* 5703 * The salt is *only* ever used for key derivation. The nonce is unique, 5704 * a different one is used for every message. 5705 */ 5706 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 5707 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 5708 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 5709 }; 5710 5711 struct ec_params_fp_frame { 5712 /* 5713 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 5714 * in the high nibble, and the real offset within the frame in 5715 * FP_FRAME_OFFSET_MASK. 5716 */ 5717 uint32_t offset; 5718 uint32_t size; 5719 } __ec_align4; 5720 5721 /* Load a template into the MCU */ 5722 #define EC_CMD_FP_TEMPLATE 0x0405 5723 5724 /* Flag in the 'size' field indicating that the full template has been sent */ 5725 #define FP_TEMPLATE_COMMIT 0x80000000 5726 5727 struct ec_params_fp_template { 5728 uint32_t offset; 5729 uint32_t size; 5730 uint8_t data[]; 5731 } __ec_align4; 5732 5733 /* Clear the current fingerprint user context and set a new one */ 5734 #define EC_CMD_FP_CONTEXT 0x0406 5735 5736 struct ec_params_fp_context { 5737 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 5738 } __ec_align4; 5739 5740 #define EC_CMD_FP_STATS 0x0407 5741 5742 #define FPSTATS_CAPTURE_INV BIT(0) 5743 #define FPSTATS_MATCHING_INV BIT(1) 5744 5745 struct ec_response_fp_stats { 5746 uint32_t capture_time_us; 5747 uint32_t matching_time_us; 5748 uint32_t overall_time_us; 5749 struct { 5750 uint32_t lo; 5751 uint32_t hi; 5752 } overall_t0; 5753 uint8_t timestamps_invalid; 5754 int8_t template_matched; 5755 } __ec_align2; 5756 5757 #define EC_CMD_FP_SEED 0x0408 5758 struct ec_params_fp_seed { 5759 /* 5760 * Version of the structure format (N=3). 5761 */ 5762 uint16_t struct_version; 5763 /* Reserved bytes, set to 0. */ 5764 uint16_t reserved; 5765 /* Seed from the TPM. */ 5766 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 5767 } __ec_align4; 5768 5769 #define EC_CMD_FP_ENC_STATUS 0x0409 5770 5771 /* FP TPM seed has been set or not */ 5772 #define FP_ENC_STATUS_SEED_SET BIT(0) 5773 5774 struct ec_response_fp_encryption_status { 5775 /* Used bits in encryption engine status */ 5776 uint32_t valid_flags; 5777 /* Encryption engine status */ 5778 uint32_t status; 5779 } __ec_align4; 5780 5781 /*****************************************************************************/ 5782 /* Touchpad MCU commands: range 0x0500-0x05FF */ 5783 5784 /* Perform touchpad self test */ 5785 #define EC_CMD_TP_SELF_TEST 0x0500 5786 5787 /* Get number of frame types, and the size of each type */ 5788 #define EC_CMD_TP_FRAME_INFO 0x0501 5789 5790 struct ec_response_tp_frame_info { 5791 uint32_t n_frames; 5792 uint32_t frame_sizes[]; 5793 } __ec_align4; 5794 5795 /* Create a snapshot of current frame readings */ 5796 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 5797 5798 /* Read the frame */ 5799 #define EC_CMD_TP_FRAME_GET 0x0503 5800 5801 struct ec_params_tp_frame_get { 5802 uint32_t frame_index; 5803 uint32_t offset; 5804 uint32_t size; 5805 } __ec_align4; 5806 5807 /*****************************************************************************/ 5808 /* EC-EC communication commands: range 0x0600-0x06FF */ 5809 5810 #define EC_COMM_TEXT_MAX 8 5811 5812 /* 5813 * Get battery static information, i.e. information that never changes, or 5814 * very infrequently. 5815 */ 5816 #define EC_CMD_BATTERY_GET_STATIC 0x0600 5817 5818 /** 5819 * struct ec_params_battery_static_info - Battery static info parameters 5820 * @index: Battery index. 5821 */ 5822 struct ec_params_battery_static_info { 5823 uint8_t index; 5824 } __ec_align_size1; 5825 5826 /** 5827 * struct ec_response_battery_static_info - Battery static info response 5828 * @design_capacity: Battery Design Capacity (mAh) 5829 * @design_voltage: Battery Design Voltage (mV) 5830 * @manufacturer: Battery Manufacturer String 5831 * @model: Battery Model Number String 5832 * @serial: Battery Serial Number String 5833 * @type: Battery Type String 5834 * @cycle_count: Battery Cycle Count 5835 */ 5836 struct ec_response_battery_static_info { 5837 uint16_t design_capacity; 5838 uint16_t design_voltage; 5839 char manufacturer[EC_COMM_TEXT_MAX]; 5840 char model[EC_COMM_TEXT_MAX]; 5841 char serial[EC_COMM_TEXT_MAX]; 5842 char type[EC_COMM_TEXT_MAX]; 5843 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 5844 uint32_t cycle_count; 5845 } __ec_align4; 5846 5847 /* 5848 * Get battery dynamic information, i.e. information that is likely to change 5849 * every time it is read. 5850 */ 5851 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 5852 5853 /** 5854 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 5855 * @index: Battery index. 5856 */ 5857 struct ec_params_battery_dynamic_info { 5858 uint8_t index; 5859 } __ec_align_size1; 5860 5861 /** 5862 * struct ec_response_battery_dynamic_info - Battery dynamic info response 5863 * @actual_voltage: Battery voltage (mV) 5864 * @actual_current: Battery current (mA); negative=discharging 5865 * @remaining_capacity: Remaining capacity (mAh) 5866 * @full_capacity: Capacity (mAh, might change occasionally) 5867 * @flags: Flags, see EC_BATT_FLAG_* 5868 * @desired_voltage: Charging voltage desired by battery (mV) 5869 * @desired_current: Charging current desired by battery (mA) 5870 */ 5871 struct ec_response_battery_dynamic_info { 5872 int16_t actual_voltage; 5873 int16_t actual_current; 5874 int16_t remaining_capacity; 5875 int16_t full_capacity; 5876 int16_t flags; 5877 int16_t desired_voltage; 5878 int16_t desired_current; 5879 } __ec_align2; 5880 5881 /* 5882 * Control charger chip. Used to control charger chip on the slave. 5883 */ 5884 #define EC_CMD_CHARGER_CONTROL 0x0602 5885 5886 /** 5887 * struct ec_params_charger_control - Charger control parameters 5888 * @max_current: Charger current (mA). Positive to allow base to draw up to 5889 * max_current and (possibly) charge battery, negative to request current 5890 * from base (OTG). 5891 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 5892 * >= 0. 5893 * @allow_charging: Allow base battery charging (only makes sense if 5894 * max_current > 0). 5895 */ 5896 struct ec_params_charger_control { 5897 int16_t max_current; 5898 uint16_t otg_voltage; 5899 uint8_t allow_charging; 5900 } __ec_align_size1; 5901 5902 /*****************************************************************************/ 5903 /* 5904 * Reserve a range of host commands for board-specific, experimental, or 5905 * special purpose features. These can be (re)used without updating this file. 5906 * 5907 * CAUTION: Don't go nuts with this. Shipping products should document ALL 5908 * their EC commands for easier development, testing, debugging, and support. 5909 * 5910 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 5911 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 5912 * 5913 * In your experimental code, you may want to do something like this: 5914 * 5915 * #define EC_CMD_MAGIC_FOO 0x0000 5916 * #define EC_CMD_MAGIC_BAR 0x0001 5917 * #define EC_CMD_MAGIC_HEY 0x0002 5918 * 5919 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 5920 * EC_VER_MASK(0); 5921 * 5922 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 5923 * EC_VER_MASK(0); 5924 * 5925 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 5926 * EC_VER_MASK(0); 5927 */ 5928 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 5929 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 5930 5931 /* 5932 * Given the private host command offset, calculate the true private host 5933 * command value. 5934 */ 5935 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 5936 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 5937 5938 /*****************************************************************************/ 5939 /* 5940 * Passthru commands 5941 * 5942 * Some platforms have sub-processors chained to each other. For example. 5943 * 5944 * AP <--> EC <--> PD MCU 5945 * 5946 * The top 2 bits of the command number are used to indicate which device the 5947 * command is intended for. Device 0 is always the device receiving the 5948 * command; other device mapping is board-specific. 5949 * 5950 * When a device receives a command to be passed to a sub-processor, it passes 5951 * it on with the device number set back to 0. This allows the sub-processor 5952 * to remain blissfully unaware of whether the command originated on the next 5953 * device up the chain, or was passed through from the AP. 5954 * 5955 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 5956 * AP sends command 0x4002 to the EC 5957 * EC sends command 0x0002 to the PD MCU 5958 * EC forwards PD MCU response back to the AP 5959 */ 5960 5961 /* Offset and max command number for sub-device n */ 5962 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 5963 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 5964 5965 /*****************************************************************************/ 5966 /* 5967 * Deprecated constants. These constants have been renamed for clarity. The 5968 * meaning and size has not changed. Programs that use the old names should 5969 * switch to the new names soon, as the old names may not be carried forward 5970 * forever. 5971 */ 5972 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 5973 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 5974 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 5975 5976 5977 5978 #endif /* __CROS_EC_COMMANDS_H */ 5979