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Searched defs:OpIdx (Results 1 – 25 of 56) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp212 AArch64MCCodeEmitter::getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, in getLdStUImm12OpValue()
233 AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, in getAdrLabelOpValue()
259 AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, in getAddSubImmOpValue()
296 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getCondBranchTargetOpValue()
317 AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, in getLoadLiteralOpValue()
337 AArch64MCCodeEmitter::getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, in getMemExtendOpValue()
346 AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, in getMoveWideImmOpValue()
366 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getTestBranchTargetOpValue()
387 AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
415 AArch64MCCodeEmitter::getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, in getVecShifterOpValue()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DInstructionSelectorImpl.h88 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
186 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
471 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
520 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
537 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
568 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
588 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
612 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
637 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
659 int64_t OpIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
[all …]
DRegBankSelect.h338 unsigned OpIdx; variable
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp231 uint32_t getLdStmModeOpValue(const MCInst &MI, unsigned OpIdx, in getLdStmModeOpValue()
597 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, in EncodeAddrModeOpValues()
626 static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
664 getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLTargetOpValue()
677 getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBLXTargetOpValue()
689 getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBRTargetOpValue()
701 getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbBCCTargetOpValue()
713 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx, in getThumbCBTargetOpValue()
742 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getBranchTargetOpValue()
756 getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, in getARMBranchTargetOpValue()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMIRFormatter.h38 Optional<unsigned> OpIdx, int64_t Imm) const { in printImm()
44 virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx, in parseImmMnemonic()
DScheduleDAGInstrs.h78 int OpIdx; member
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DBreakFalseDeps.cpp107 bool BreakFalseDeps::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx, in pickBestRegisterForUndef()
163 bool BreakFalseDeps::shouldBreakDependence(MachineInstr *MI, unsigned OpIdx, in shouldBreakDependence()
230 unsigned OpIdx = UndefReads.back().second; in processUndefReads() local
DMachineInstr.cpp783 int MachineInstr::findInlineAsmFlagIdx(unsigned OpIdx, in findInlineAsmFlagIdx()
831 MachineInstr::getRegClassConstraint(unsigned OpIdx, in getRegClassConstraint()
888 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl()
900 unsigned OpIdx, const TargetRegisterClass *CurRC, in getRegClassConstraintEffect()
1423 LLT MachineInstr::getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, in getTypeToPrint()
1487 auto getTiedOperandIdx = [&](unsigned OpIdx) { in print()
1561 const unsigned OpIdx = InlineAsm::MIOp_AsmString; in print() local
1830 unsigned OpIdx = DeadOps.back(); in addRegisterKilled() local
1895 unsigned OpIdx = DeadOps.back(); in addRegisterDead() local
DTargetInstrInfo.cpp537 for (unsigned OpIdx : Ops) in foldMemoryOperand() local
555 for (unsigned OpIdx : Ops) { in foldMemoryOperand() local
626 for (unsigned OpIdx : Ops) in foldMemoryOperand() local
787 unsigned OpIdx[4][4] = { in reassociateOps() local
1225 for (unsigned OpIdx = 1, EndOpIdx = MI.getNumOperands(); OpIdx != EndOpIdx; in getRegSequenceInputs() local
DMachineCopyPropagation.cpp471 for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd; in forwardUses() local
752 for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx != OpEnd; in propagateDefs() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp113 const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, in getRegBankFromConstraints()
183 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx; in getInstrMappingImpl() local
443 for (unsigned OpIdx = 0, in applyDefaultMapping() local
642 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) { in print() local
662 RegisterBankInfo::OperandsMapper::getVRegsMem(unsigned OpIdx) { in getVRegsMem()
698 void RegisterBankInfo::OperandsMapper::createVRegs(unsigned OpIdx) { in createVRegs()
718 void RegisterBankInfo::OperandsMapper::setVRegs(unsigned OpIdx, in setVRegs()
733 RegisterBankInfo::OperandsMapper::getVRegs(unsigned OpIdx, in getVRegs()
DInstructionSelector.cpp37 MachineInstr &I, unsigned OpIdx, const TargetRegisterClass &RC, in constrainOperandRegToRegClass()
DRegBankSelect.cpp467 for (unsigned OpIdx = 0, EndOpIdx = InstrMapping.getNumOperands(); in computeMapping() local
594 unsigned OpIdx = RepairPt.getOpIdx(); in applyMapping() local
724 MachineInstr &MI, unsigned OpIdx, const TargetRegisterInfo &TRI, Pass &P, in RepairingPlacement()
DUtils.cpp45 unsigned OpIdx) { in constrainOperandRegClass()
74 const MachineOperand &RegMO, unsigned OpIdx) { in constrainOperandRegClass()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCInstPrinter.cpp63 const MCRegisterInfo &MRI, unsigned &OpIdx, in matchAliasCondition()
127 unsigned OpIdx = 0; in matchAliasPatterns() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp481 unsigned OpIdx = 0; in ExpandVLD() local
592 unsigned OpIdx = 0; in ExpandVST() local
669 unsigned OpIdx = 0; in ExpandLaneOp() local
753 unsigned OpIdx = 0; in ExpandVTBL() local
1591 unsigned OpIdx = 0; in ExpandMI() local
1622 unsigned OpIdx = 0; in ExpandMI() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64StackTaggingPreRA.cpp179 unsigned OpIdx = TII->getLoadStoreImmIdx(UseI->getOpcode()) - 1; in uncheckUsesOf() local
DAArch64CollectLOH.cpp537 int OpIdx = mapRegToGPRIndex(Op.getReg()); in runOnMachineFunction() local
DAArch64PromoteConstant.cpp259 unsigned OpIdx) { in shouldConvertUse()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.h714 int OpIdx = MI.getOperandNo(&UseMO); in isInlineConstant() local
724 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx) const { in isInlineConstant()
729 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx, in isInlineConstant()
756 bool isLiteralConstant(const MachineInstr &MI, int OpIdx) const { in isLiteralConstant()
DR600ExpandSpecialInstrs.cpp75 int OpIdx = TII->getOperandIdx(*OldMI, Op); in SetFlagInNewMI() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZHazardRecognizer.cpp122 for (unsigned OpIdx = 0; OpIdx < MID.getNumOperands(); OpIdx++) { in has4RegOps() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SpeculativeLoadHardening.cpp289 for (int OpIdx = 1, NumOps = MI.getNumOperands(); OpIdx < NumOps; in splitEdge() local
338 for (int OpIdx = 1, NumOps = MI.getNumOperands(); OpIdx < NumOps; in canonicalizePHIOperands() local
355 int OpIdx = DupIndices.pop_back_val(); in canonicalizePHIOperands() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/
DSLPVectorizer.cpp766 OperandData &getData(unsigned OpIdx, unsigned Lane) { in getData()
771 const OperandData &getData(unsigned OpIdx, unsigned Lane) const { in getData()
777 for (unsigned OpIdx = 0, NumOperands = getNumOperands(); in clearUsed() local
1013 getBestOperand(unsigned OpIdx, int Lane, int LastLane, in getBestOperand()
1113 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) in getMaxNumOperandsThatCanBeReordered() local
1129 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) { in appendOperandsOfVL() local
1158 Value *getValue(unsigned OpIdx, unsigned Lane) const { in getValue()
1171 bool shouldBroadcast(Value *Op, unsigned OpIdx, unsigned Lane) { in shouldBroadcast()
1242 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) { in reorder() local
1288 for (unsigned OpIdx = 0; OpIdx != NumOperands; ++OpIdx) { in reorder() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/
DDisassembler.cpp184 for (unsigned OpIdx = 0, OpIdxEnd = Inst.getNumOperands(); OpIdx != OpIdxEnd; in getItineraryLatency() local

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