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Searched defs:Opc (Results 1 – 25 of 199) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyMCTargetDesc.h150 inline unsigned GetDefaultP2AlignAny(unsigned Opc) { in GetDefaultP2AlignAny()
364 inline unsigned GetDefaultP2Align(unsigned Opc) { in GetDefaultP2Align()
372 inline bool isArgument(unsigned Opc) { in isArgument()
402 inline bool isCopy(unsigned Opc) { in isCopy()
422 inline bool isTee(unsigned Opc) { in isTee()
442 inline bool isCallDirect(unsigned Opc) { in isCallDirect()
476 inline bool isCallIndirect(unsigned Opc) { in isCallIndirect()
512 inline unsigned getCalleeOpNo(unsigned Opc) { in getCalleeOpNo()
573 inline bool isMarker(unsigned Opc) { in isMarker()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h487 bool isUncondBranchOpcode(int Opc) { in isUncondBranchOpcode()
512 static inline bool isVPTOpcode(int Opc) { in isVPTOpcode()
619 bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode()
623 static inline bool isJumpTableBranchOpcode(int Opc) { in isJumpTableBranchOpcode()
630 bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode()
634 static inline bool isPopOpcode(int Opc) { in isPopOpcode()
640 static inline bool isPushOpcode(int Opc) { in isPushOpcode()
DARMFastISel.cpp429 unsigned Opc; in ARMMaterializeFP() local
454 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; in ARMMaterializeFP() local
472 unsigned Opc = isThumb2 ? ARM::t2MOVi16 : ARM::MOVi16; in ARMMaterializeInt() local
488 unsigned Opc = isThumb2 ? ARM::t2MVNi : ARM::MVNi; in ARMMaterializeInt() local
560 unsigned Opc; in ARMMaterializeGV() local
593 unsigned Opc = IsPositionIndependent ? ARM::t2LDRpci_pic : ARM::t2LDRpci; in ARMMaterializeGV() local
609 unsigned Opc = IsIndirect ? ARM::PICLDR : ARM::PICADD; in ARMMaterializeGV() local
674 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in fastMaterializeAlloca() local
852 unsigned Opc = isThumb2 ? ARM::t2ADDri : ARM::ADDri; in ARMSimplifyAddress() local
918 unsigned Opc; in ARMEmitLoad() local
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DARMISelDAGToDAG.cpp345 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate()
553 SDValue &Opc, in SelectImmShifterOperand()
593 SDValue &Opc, in SelectRegShifterOperand()
680 SDValue &Opc) { in SelectLdStSOReg()
788 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetReg()
824 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImmPre()
844 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImm()
870 SDValue &Opc) { in SelectAddrMode3()
923 SDValue &Offset, SDValue &Opc) { in SelectAddrMode3Offset()
1886 static bool isVLDfixed(unsigned Opc) in isVLDfixed()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyExplicitLocals.cpp249 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local
259 unsigned Opc = getLocalTeeOpcode(RC); in runOnMachineFunction() local
287 unsigned Opc = getDropOpcode(RC); in runOnMachineFunction() local
295 unsigned Opc = getLocalSetOpcode(RC); in runOnMachineFunction() local
355 unsigned Opc = getLocalGetOpcode(RC); in runOnMachineFunction() local
DWebAssemblyFastISel.cpp386 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 in materializeLoadStoreOperands() local
605 unsigned Opc = in fastMaterializeAlloca() local
624 unsigned Opc = Subtarget->hasAddr64() ? WebAssembly::CONST_I64 in fastMaterializeConstant() local
659 unsigned Opc; in fastLowerArguments() local
762 unsigned Opc; in selectCall() local
906 unsigned Opc; in selectSelect() local
1003 unsigned Opc; in selectICmp() local
1072 unsigned Opc; in selectFCmp() local
1169 unsigned Opc; in selectLoad() local
1225 unsigned Opc; in selectStore() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h352 static inline bool isUncondBranchOpcode(int Opc) { return Opc == AArch64::B; } in isUncondBranchOpcode()
354 static inline bool isCondBranchOpcode(int Opc) { in isCondBranchOpcode()
371 static inline bool isIndirectBranchOpcode(int Opc) { in isIndirectBranchOpcode()
DAArch64ConditionOptimizer.cpp217 static int getComplementOpc(int Opc) { in getComplementOpc()
244 unsigned Opc = CmpMI->getOpcode(); in adjustCmp() local
273 unsigned Opc; in modifyCmp() local
DAArch64FastISel.cpp413 unsigned Opc = Is64Bit ? AArch64::FMOVDi : AArch64::FMOVSi; in materializeFP() local
446 unsigned Opc = Is64Bit ? AArch64::LDRDui : AArch64::LDRSui; in materializeFP() local
561 unsigned Opc = Is64Bit ? AArch64::FMOVXDr : AArch64::FMOVWSr; in fastMaterializeFloatZero() local
1334 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rr() local
1376 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_ri() local
1421 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rs() local
1463 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rx() local
1536 unsigned Opc = (RetVT == MVT::f64) ? AArch64::FCMPDri : AArch64::FCMPSri; in emitFCmp() local
1547 unsigned Opc = (RetVT == MVT::f64) ? AArch64::FCMPDrr : AArch64::FCMPSrr; in emitFCmp() local
1702 unsigned Opc; in emitLogicalOp_ri() local
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DAArch64LoadStoreOptimizer.cpp212 static bool isNarrowStore(unsigned Opc) { in isNarrowStore()
238 static unsigned getMatchingNonSExtOpcode(unsigned Opc, in getMatchingNonSExtOpcode()
279 static unsigned getMatchingWideOpcode(unsigned Opc) { in getMatchingWideOpcode()
298 static unsigned getMatchingPairOpcode(unsigned Opc) { in getMatchingPairOpcode()
368 static unsigned getPreIndexedOpcode(unsigned Opc) { in getPreIndexedOpcode()
441 static unsigned getPostIndexedOpcode(unsigned Opc) { in getPostIndexedOpcode()
593 unsigned Opc = MI.getOpcode(); in isPromotableZeroStoreInst() local
618 unsigned Opc = MI.getOpcode(); in isMergeableLdStUpdate() local
689 unsigned Opc = I->getOpcode(); in mergeNarrowZeroStores() local
795 unsigned Opc = in mergePairedInsns() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonCFGOptimizer.cpp61 static bool IsConditionalBranch(int Opc) { in IsConditionalBranch()
76 static bool IsUnconditionalJump(int Opc) { in IsUnconditionalJump()
128 int Opc = MI.getOpcode(); in runOnMachineFunction() local
DHexagonGenPredicate.cpp143 unsigned HexagonGenPredicate::getPredForm(unsigned Opc) { in getPredForm()
188 unsigned Opc = MI->getOpcode(); in isConvertibleToPredForm() local
211 unsigned Opc = MI->getOpcode(); in collectPredicateGPR() local
257 unsigned Opc = DefI->getOpcode(); in getPredRegFor() local
286 bool HexagonGenPredicate::isScalarCmp(unsigned Opc) { in isScalarCmp()
371 unsigned Opc = MI->getOpcode(); in convertToPredForm() local
DHexagonBitSimplify.cpp462 bool HexagonBitSimplify::getUsedBitsInStore(unsigned Opc, BitVector &Bits, in getUsedBitsInStore()
621 bool HexagonBitSimplify::getUsedBits(unsigned Opc, unsigned OpN, in getUsedBits()
1001 unsigned Opc = MI->getOpcode(); in runOnNode() local
1083 unsigned Opc = MI.getOpcode(); in isLossyShiftLeft() local
1143 unsigned Opc = MI.getOpcode(); in isLossyShiftRight() local
1251 unsigned Opc = MI.getOpcode(); in computeUsedBits() local
1394 unsigned Opc = MI.getOpcode(); in isTfrConst() local
1429 unsigned Opc = isInt<8>(Lo) ? Hexagon::A2_combineii in genTfrConst() local
1443 unsigned Opc; in genTfrConst() local
1597 unsigned Opc = I->getOpcode(); in processBlock() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp47 unsigned Opc = MI.getOpcode(); in isLoadFromStackSlot() local
69 unsigned Opc = MI.getOpcode(); in isStoreToStackSlot() local
87 unsigned Opc = 0, ZeroReg = 0; in copyPhysReg() local
252 unsigned Opc = 0; in storeRegToStack() local
325 unsigned Opc = 0; in loadRegFromStack() local
406 unsigned Opc; in expandPostRAPseudo() local
591 unsigned Opc = ABI.GetPtrAdduOp(); in adjustStackPtr() local
696 MipsSEInstrInfo::compareOpndSize(unsigned Opc, in compareOpndSize()
DMipsRegisterBankInfo.cpp109 static bool isFloatingPointOpcode(unsigned Opc) { in isFloatingPointOpcode()
130 static bool isFloatingPointOpcodeUse(unsigned Opc) { in isFloatingPointOpcodeUse()
146 static bool isFloatingPointOpcodeDef(unsigned Opc) { in isFloatingPointOpcodeDef()
159 static bool isAmbiguous(unsigned Opc) { in isAmbiguous()
404 unsigned Opc = MI.getOpcode(); in getInstrMapping() local
DMips16InstrInfo.cpp73 unsigned Opc = 0; in copyPhysReg() local
115 unsigned Opc = 0; in storeRegToStack() local
133 unsigned Opc = 0; in loadRegFromStack() local
219 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16; in makeFrame() local
249 unsigned Opc = ((FrameSize <= 128) && !SaveS2)? in restoreFrame() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCFrameLowering.cpp138 unsigned Opc = ARC::SUB_rrlimm; in emitPrologue() local
255 unsigned Opc = ARC::SUB_rrlimm; in emitEpilogue() local
283 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local
298 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local
325 unsigned Opc = ARC::ADD_rrlimm; in emitEpilogue() local
456 unsigned Opc; in emitRegUpdate() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCSEMIRBuilder.cpp90 void CSEMIRBuilder::profileEverything(unsigned Opc, ArrayRef<DstOp> DstOps, in profileEverything()
137 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr()
206 constexpr unsigned Opc = TargetOpcode::G_CONSTANT; in buildConstant() local
233 constexpr unsigned Opc = TargetOpcode::G_FCONSTANT; in buildFConstant() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DCSEConfigBase.h23 virtual bool shouldCSEOpc(unsigned Opc) { return false; } in shouldCSEOpc()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp148 unsigned Opc = I->getOpcode(); in verifyCTRBranch() local
210 unsigned Opc = MII->getOpcode(); in runOnMachineFunction() local
DPPCPreEmitPeephole.cpp83 unsigned Opc = BBI->getOpcode(); in removeRedundantLIs() local
186 unsigned Opc = MI.getOpcode(); in runOnMachineFunction() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/AggressiveInstCombine/
DTruncInstCombine.cpp42 unsigned Opc = I->getOpcode(); in getRelevantOperands() local
102 unsigned Opc = I->getOpcode(); in buildTruncExpressionDag() local
309 unsigned Opc = I->getOpcode(); in ReduceExpressionDag() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp704 unsigned Opc, bool AllowSP, Register &NewSrc, in classifyLEAReg()
947 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
984 unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r : in convertToThreeAddress() local
1006 unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r in convertToThreeAddress() local
1038 unsigned Opc; in convertToThreeAddress() local
1091 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
1132 unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r; in convertToThreeAddress() local
1196 unsigned Opc; in convertToThreeAddress() local
1272 unsigned Opc; in convertToThreeAddress() local
1361 unsigned Opc = MI.getOpcode(); in getFMA3OpcodeToCommuteOperands() local
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DX86FastISel.cpp333 unsigned Opc = 0; in X86FastEmitLoad() local
495 unsigned Opc = 0; in X86FastEmitStore() local
666 unsigned Opc = 0; in X86FastEmitStore() local
705 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend()
770 unsigned Opc = 0; in handleConstantAddresses() local
2135 unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC)/8); in X86FastEmitCMoveSelect() local
2258 const uint16_t *Opc = nullptr; in X86FastEmitSSESelect() local
2285 unsigned Opc; in X86FastEmitPseudoSelect() local
2507 unsigned Opc = in X86SelectFPExt() local
2521 unsigned Opc = in X86SelectFPTrunc() local
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/
DRISCVMatInt.h21 unsigned Opc; member

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