1 /* 2 * Copyright © 2022 Imagination Technologies Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #ifndef ROGUE_OPERAND_H 25 #define ROGUE_OPERAND_H 26 27 #include <stddef.h> 28 #include <stdint.h> 29 30 #include "rogue_util.h" 31 #include "util/macros.h" 32 33 /* Register-related defines. */ 34 35 /* Total max number of registers per class 36 * (instances > ROGUE_MAX_REG_INDEX addressable via indexing only). 37 */ 38 #define ROGUE_MAX_REG_TEMP 248 39 #define ROGUE_MAX_REG_COEFF 4096 40 #define ROGUE_MAX_REG_CONST 240 41 #define ROGUE_MAX_REG_SHARED 4096 42 #define ROGUE_MAX_REG_PIXEL_OUT 8 43 #define ROGUE_MAX_REG_VERTEX_IN 248 44 #define ROGUE_MAX_REG_INTERNAL 8 45 46 /* Maximum register index via offset encoding. */ 47 #define ROGUE_MAX_REG_INDEX 256 48 49 /* Pixel-out register offset. */ 50 #define ROGUE_PIXEL_OUT_REG_OFFSET 32 51 52 /* Internal register offset. */ 53 #define ROGUE_INTERNAL_REG_OFFSET 36 54 55 /* Coefficient registers are typically used in groups of 4. */ 56 #define ROGUE_COEFF_ALIGN 4 57 58 /* Defines for other operand types. */ 59 60 /* Available dependent read counters. */ 61 #define ROGUE_NUM_DRCS 2 62 63 /* Maximum number of vertex outputs. */ 64 #define ROGUE_MAX_VERTEX_OUTPUTS 256 65 66 /* All components of an emulated vec4 register group. */ 67 #define ROGUE_COMPONENT_ALL (~0) 68 69 /** 70 * \brief Operand types. 71 */ 72 enum rogue_operand_type { 73 /* Register operands. */ 74 ROGUE_OPERAND_TYPE_REG_TEMP = 0, /** Temporary register. */ 75 ROGUE_OPERAND_TYPE_REG_COEFF, /** Coefficient register. */ 76 ROGUE_OPERAND_TYPE_REG_CONST, /** Constant register. */ 77 ROGUE_OPERAND_TYPE_REG_SHARED, /** Shared register. */ 78 ROGUE_OPERAND_TYPE_REG_PIXEL_OUT, /** Pixel output register. */ 79 ROGUE_OPERAND_TYPE_REG_VERTEX_IN, /** Vertex input register. */ 80 ROGUE_OPERAND_TYPE_REG_INTERNAL, /** Internal register. */ 81 82 ROGUE_OPERAND_TYPE_REG_MAX = ROGUE_OPERAND_TYPE_REG_INTERNAL, 83 84 ROGUE_OPERAND_TYPE_IMMEDIATE, /** Immediate value. */ 85 86 ROGUE_OPERAND_TYPE_DRC, /** Dependent read counter. */ 87 88 ROGUE_OPERAND_TYPE_VREG, /** Virtual register (pre-regalloc). */ 89 90 ROGUE_OPERAND_TYPE_COUNT, 91 }; 92 93 /* clang-format off */ 94 95 #define ROGUE_NUM_REG_TYPES (ROGUE_OPERAND_TYPE_REG_MAX + 1) 96 97 /** 98 * \brief A bitmask for any register operand type. 99 */ 100 #define ROGUE_MASK_ANY_REG \ 101 ROH(ROGUE_OPERAND_TYPE_REG_TEMP) | \ 102 ROH(ROGUE_OPERAND_TYPE_REG_COEFF) | \ 103 ROH(ROGUE_OPERAND_TYPE_REG_CONST) | \ 104 ROH(ROGUE_OPERAND_TYPE_REG_PIXEL_OUT) | \ 105 ROH(ROGUE_OPERAND_TYPE_REG_VERTEX_IN) | \ 106 ROH(ROGUE_OPERAND_TYPE_REG_SHARED) | \ 107 ROH(ROGUE_OPERAND_TYPE_REG_INTERNAL) 108 109 /* clang-format on */ 110 111 /** 112 * \brief Operand description. 113 */ 114 struct rogue_operand { 115 enum rogue_operand_type type; 116 117 union { 118 struct { 119 uint64_t value; 120 } immediate; 121 122 struct { 123 size_t number; 124 } drc; 125 126 struct { 127 size_t number; 128 } reg; 129 130 struct { 131 size_t number; 132 bool is_vector; 133 size_t component; 134 } vreg; 135 }; 136 }; 137 138 /** 139 * \brief Register access flags. 140 */ 141 enum rogue_register_access { 142 ROGUE_REG_ACCESS_READ = BITFIELD_BIT(0U), /** Read-only. */ 143 ROGUE_REG_ACCESS_WRITE = BITFIELD_BIT(1U), /* Write-only. */ 144 ROGUE_REG_ACCESS_RW = ROGUE_REG_ACCESS_READ | 145 ROGUE_REG_ACCESS_WRITE, /** Read/write. */ 146 }; 147 148 /** 149 * \brief Register modifier flags. 150 */ 151 enum rogue_register_modifier { 152 ROGUE_REG_MOD_NONE = 0U, 153 ROGUE_REG_MOD_IDX = BITFIELD_BIT(0U), /** Index modifier. */ 154 ROGUE_REG_MOD_DIM = BITFIELD_BIT(1U), /** Dimension modifier. */ 155 ROGUE_REG_MOD_ALL = ROGUE_REG_MOD_IDX | ROGUE_REG_MOD_DIM, 156 }; 157 158 #endif /* ROGUE_OPERAND_H */ 159