1 /*
2 * Copyright © 2018 Valve Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #include "aco_builder.h"
26 #include "aco_ir.h"
27
28 #include "common/ac_shader_util.h"
29 #include "common/sid.h"
30
31 #include <array>
32
33 namespace aco {
34
35 const std::array<const char*, num_reduce_ops> reduce_ops = []()
__anonaab877d90102() 36 {
37 std::array<const char*, num_reduce_ops> ret{};
38 ret[iadd8] = "iadd8";
39 ret[iadd16] = "iadd16";
40 ret[iadd32] = "iadd32";
41 ret[iadd64] = "iadd64";
42 ret[imul8] = "imul8";
43 ret[imul16] = "imul16";
44 ret[imul32] = "imul32";
45 ret[imul64] = "imul64";
46 ret[fadd16] = "fadd16";
47 ret[fadd32] = "fadd32";
48 ret[fadd64] = "fadd64";
49 ret[fmul16] = "fmul16";
50 ret[fmul32] = "fmul32";
51 ret[fmul64] = "fmul64";
52 ret[imin8] = "imin8";
53 ret[imin16] = "imin16";
54 ret[imin32] = "imin32";
55 ret[imin64] = "imin64";
56 ret[imax8] = "imax8";
57 ret[imax16] = "imax16";
58 ret[imax32] = "imax32";
59 ret[imax64] = "imax64";
60 ret[umin8] = "umin8";
61 ret[umin16] = "umin16";
62 ret[umin32] = "umin32";
63 ret[umin64] = "umin64";
64 ret[umax8] = "umax8";
65 ret[umax16] = "umax16";
66 ret[umax32] = "umax32";
67 ret[umax64] = "umax64";
68 ret[fmin16] = "fmin16";
69 ret[fmin32] = "fmin32";
70 ret[fmin64] = "fmin64";
71 ret[fmax16] = "fmax16";
72 ret[fmax32] = "fmax32";
73 ret[fmax64] = "fmax64";
74 ret[iand8] = "iand8";
75 ret[iand16] = "iand16";
76 ret[iand32] = "iand32";
77 ret[iand64] = "iand64";
78 ret[ior8] = "ior8";
79 ret[ior16] = "ior16";
80 ret[ior32] = "ior32";
81 ret[ior64] = "ior64";
82 ret[ixor8] = "ixor8";
83 ret[ixor16] = "ixor16";
84 ret[ixor32] = "ixor32";
85 ret[ixor64] = "ixor64";
86 return ret;
87 }();
88
89 static void
print_reg_class(const RegClass rc,FILE * output)90 print_reg_class(const RegClass rc, FILE* output)
91 {
92 if (rc.is_subdword()) {
93 fprintf(output, " v%ub: ", rc.bytes());
94 } else if (rc.type() == RegType::sgpr) {
95 fprintf(output, " s%u: ", rc.size());
96 } else if (rc.is_linear()) {
97 fprintf(output, " lv%u: ", rc.size());
98 } else {
99 fprintf(output, " v%u: ", rc.size());
100 }
101 }
102
103 void
print_physReg(PhysReg reg,unsigned bytes,FILE * output,unsigned flags)104 print_physReg(PhysReg reg, unsigned bytes, FILE* output, unsigned flags)
105 {
106 if (reg == 124) {
107 fprintf(output, "m0");
108 } else if (reg == 106) {
109 fprintf(output, "vcc");
110 } else if (reg == 253) {
111 fprintf(output, "scc");
112 } else if (reg == 126) {
113 fprintf(output, "exec");
114 } else {
115 bool is_vgpr = reg / 256;
116 unsigned r = reg % 256;
117 unsigned size = DIV_ROUND_UP(bytes, 4);
118 if (size == 1 && (flags & print_no_ssa)) {
119 fprintf(output, "%c%d", is_vgpr ? 'v' : 's', r);
120 } else {
121 fprintf(output, "%c[%d", is_vgpr ? 'v' : 's', r);
122 if (size > 1)
123 fprintf(output, "-%d]", r + size - 1);
124 else
125 fprintf(output, "]");
126 }
127 if (reg.byte() || bytes % 4)
128 fprintf(output, "[%d:%d]", reg.byte() * 8, (reg.byte() + bytes) * 8);
129 }
130 }
131
132 static void
print_constant(uint8_t reg,FILE * output)133 print_constant(uint8_t reg, FILE* output)
134 {
135 if (reg >= 128 && reg <= 192) {
136 fprintf(output, "%d", reg - 128);
137 return;
138 } else if (reg >= 192 && reg <= 208) {
139 fprintf(output, "%d", 192 - reg);
140 return;
141 }
142
143 switch (reg) {
144 case 240: fprintf(output, "0.5"); break;
145 case 241: fprintf(output, "-0.5"); break;
146 case 242: fprintf(output, "1.0"); break;
147 case 243: fprintf(output, "-1.0"); break;
148 case 244: fprintf(output, "2.0"); break;
149 case 245: fprintf(output, "-2.0"); break;
150 case 246: fprintf(output, "4.0"); break;
151 case 247: fprintf(output, "-4.0"); break;
152 case 248: fprintf(output, "1/(2*PI)"); break;
153 }
154 }
155
156 void
aco_print_operand(const Operand * operand,FILE * output,unsigned flags)157 aco_print_operand(const Operand* operand, FILE* output, unsigned flags)
158 {
159 if (operand->isLiteral() || (operand->isConstant() && operand->bytes() == 1)) {
160 if (operand->bytes() == 1)
161 fprintf(output, "0x%.2x", operand->constantValue());
162 else if (operand->bytes() == 2)
163 fprintf(output, "0x%.4x", operand->constantValue());
164 else
165 fprintf(output, "0x%x", operand->constantValue());
166 } else if (operand->isConstant()) {
167 print_constant(operand->physReg().reg(), output);
168 } else if (operand->isUndefined()) {
169 print_reg_class(operand->regClass(), output);
170 fprintf(output, "undef");
171 } else {
172 if (operand->isLateKill())
173 fprintf(output, "(latekill)");
174 if (operand->is16bit())
175 fprintf(output, "(is16bit)");
176 if (operand->is24bit())
177 fprintf(output, "(is24bit)");
178 if ((flags & print_kill) && operand->isKill())
179 fprintf(output, "(kill)");
180
181 if (!(flags & print_no_ssa))
182 fprintf(output, "%%%d%s", operand->tempId(), operand->isFixed() ? ":" : "");
183
184 if (operand->isFixed())
185 print_physReg(operand->physReg(), operand->bytes(), output, flags);
186 }
187 }
188
189 static void
print_definition(const Definition * definition,FILE * output,unsigned flags)190 print_definition(const Definition* definition, FILE* output, unsigned flags)
191 {
192 if (!(flags & print_no_ssa))
193 print_reg_class(definition->regClass(), output);
194 if (definition->isPrecise())
195 fprintf(output, "(precise)");
196 if (definition->isNUW())
197 fprintf(output, "(nuw)");
198 if (definition->isNoCSE())
199 fprintf(output, "(noCSE)");
200 if ((flags & print_kill) && definition->isKill())
201 fprintf(output, "(kill)");
202 if (!(flags & print_no_ssa))
203 fprintf(output, "%%%d%s", definition->tempId(), definition->isFixed() ? ":" : "");
204
205 if (definition->isFixed())
206 print_physReg(definition->physReg(), definition->bytes(), output, flags);
207 }
208
209 static void
print_storage(storage_class storage,FILE * output)210 print_storage(storage_class storage, FILE* output)
211 {
212 fprintf(output, " storage:");
213 int printed = 0;
214 if (storage & storage_buffer)
215 printed += fprintf(output, "%sbuffer", printed ? "," : "");
216 if (storage & storage_atomic_counter)
217 printed += fprintf(output, "%satomic_counter", printed ? "," : "");
218 if (storage & storage_image)
219 printed += fprintf(output, "%simage", printed ? "," : "");
220 if (storage & storage_shared)
221 printed += fprintf(output, "%sshared", printed ? "," : "");
222 if (storage & storage_task_payload)
223 printed += fprintf(output, "%stask_payload", printed ? "," : "");
224 if (storage & storage_vmem_output)
225 printed += fprintf(output, "%svmem_output", printed ? "," : "");
226 if (storage & storage_scratch)
227 printed += fprintf(output, "%sscratch", printed ? "," : "");
228 if (storage & storage_vgpr_spill)
229 printed += fprintf(output, "%svgpr_spill", printed ? "," : "");
230 }
231
232 static void
print_semantics(memory_semantics sem,FILE * output)233 print_semantics(memory_semantics sem, FILE* output)
234 {
235 fprintf(output, " semantics:");
236 int printed = 0;
237 if (sem & semantic_acquire)
238 printed += fprintf(output, "%sacquire", printed ? "," : "");
239 if (sem & semantic_release)
240 printed += fprintf(output, "%srelease", printed ? "," : "");
241 if (sem & semantic_volatile)
242 printed += fprintf(output, "%svolatile", printed ? "," : "");
243 if (sem & semantic_private)
244 printed += fprintf(output, "%sprivate", printed ? "," : "");
245 if (sem & semantic_can_reorder)
246 printed += fprintf(output, "%sreorder", printed ? "," : "");
247 if (sem & semantic_atomic)
248 printed += fprintf(output, "%satomic", printed ? "," : "");
249 if (sem & semantic_rmw)
250 printed += fprintf(output, "%srmw", printed ? "," : "");
251 }
252
253 static void
print_scope(sync_scope scope,FILE * output,const char * prefix="scope")254 print_scope(sync_scope scope, FILE* output, const char* prefix = "scope")
255 {
256 fprintf(output, " %s:", prefix);
257 switch (scope) {
258 case scope_invocation: fprintf(output, "invocation"); break;
259 case scope_subgroup: fprintf(output, "subgroup"); break;
260 case scope_workgroup: fprintf(output, "workgroup"); break;
261 case scope_queuefamily: fprintf(output, "queuefamily"); break;
262 case scope_device: fprintf(output, "device"); break;
263 }
264 }
265
266 static void
print_sync(memory_sync_info sync,FILE * output)267 print_sync(memory_sync_info sync, FILE* output)
268 {
269 print_storage(sync.storage, output);
270 print_semantics(sync.semantics, output);
271 print_scope(sync.scope, output);
272 }
273
274 static void
print_instr_format_specific(const Instruction * instr,FILE * output)275 print_instr_format_specific(const Instruction* instr, FILE* output)
276 {
277 switch (instr->format) {
278 case Format::SOPK: {
279 const SOPK_instruction& sopk = instr->sopk();
280 fprintf(output, " imm:%d", sopk.imm & 0x8000 ? (sopk.imm - 65536) : sopk.imm);
281 break;
282 }
283 case Format::SOPP: {
284 uint16_t imm = instr->sopp().imm;
285 switch (instr->opcode) {
286 case aco_opcode::s_waitcnt: {
287 /* we usually should check the gfx level for vmcnt/lgkm, but
288 * insert_waitcnt() should fill it in regardless. */
289 unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
290 if (vmcnt != 63)
291 fprintf(output, " vmcnt(%d)", vmcnt);
292 if (((imm >> 4) & 0x7) < 0x7)
293 fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
294 if (((imm >> 8) & 0x3F) < 0x3F)
295 fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
296 break;
297 }
298 case aco_opcode::s_endpgm:
299 case aco_opcode::s_endpgm_saved:
300 case aco_opcode::s_endpgm_ordered_ps_done:
301 case aco_opcode::s_wakeup:
302 case aco_opcode::s_barrier:
303 case aco_opcode::s_icache_inv:
304 case aco_opcode::s_ttracedata:
305 case aco_opcode::s_set_gpr_idx_off: {
306 break;
307 }
308 case aco_opcode::s_sendmsg: {
309 unsigned id = imm & sendmsg_id_mask;
310 switch (id) {
311 case sendmsg_none: fprintf(output, " sendmsg(MSG_NONE)"); break;
312 case _sendmsg_gs:
313 fprintf(output, " sendmsg(gs%s%s, %u)", imm & 0x10 ? ", cut" : "",
314 imm & 0x20 ? ", emit" : "", imm >> 8);
315 break;
316 case _sendmsg_gs_done:
317 fprintf(output, " sendmsg(gs_done%s%s, %u)", imm & 0x10 ? ", cut" : "",
318 imm & 0x20 ? ", emit" : "", imm >> 8);
319 break;
320 case sendmsg_save_wave: fprintf(output, " sendmsg(save_wave)"); break;
321 case sendmsg_stall_wave_gen: fprintf(output, " sendmsg(stall_wave_gen)"); break;
322 case sendmsg_halt_waves: fprintf(output, " sendmsg(halt_waves)"); break;
323 case sendmsg_ordered_ps_done: fprintf(output, " sendmsg(ordered_ps_done)"); break;
324 case sendmsg_early_prim_dealloc: fprintf(output, " sendmsg(early_prim_dealloc)"); break;
325 case sendmsg_gs_alloc_req: fprintf(output, " sendmsg(gs_alloc_req)"); break;
326 }
327 break;
328 }
329 default: {
330 if (imm)
331 fprintf(output, " imm:%u", imm);
332 break;
333 }
334 }
335 if (instr->sopp().block != -1)
336 fprintf(output, " block:BB%d", instr->sopp().block);
337 break;
338 }
339 case Format::SMEM: {
340 const SMEM_instruction& smem = instr->smem();
341 if (smem.glc)
342 fprintf(output, " glc");
343 if (smem.dlc)
344 fprintf(output, " dlc");
345 if (smem.nv)
346 fprintf(output, " nv");
347 print_sync(smem.sync, output);
348 break;
349 }
350 case Format::VINTRP: {
351 const Interp_instruction& vintrp = instr->vintrp();
352 fprintf(output, " attr%d.%c", vintrp.attribute, "xyzw"[vintrp.component]);
353 break;
354 }
355 case Format::DS: {
356 const DS_instruction& ds = instr->ds();
357 if (ds.offset0)
358 fprintf(output, " offset0:%u", ds.offset0);
359 if (ds.offset1)
360 fprintf(output, " offset1:%u", ds.offset1);
361 if (ds.gds)
362 fprintf(output, " gds");
363 print_sync(ds.sync, output);
364 break;
365 }
366 case Format::MUBUF: {
367 const MUBUF_instruction& mubuf = instr->mubuf();
368 if (mubuf.offset)
369 fprintf(output, " offset:%u", mubuf.offset);
370 if (mubuf.offen)
371 fprintf(output, " offen");
372 if (mubuf.idxen)
373 fprintf(output, " idxen");
374 if (mubuf.addr64)
375 fprintf(output, " addr64");
376 if (mubuf.glc)
377 fprintf(output, " glc");
378 if (mubuf.dlc)
379 fprintf(output, " dlc");
380 if (mubuf.slc)
381 fprintf(output, " slc");
382 if (mubuf.tfe)
383 fprintf(output, " tfe");
384 if (mubuf.lds)
385 fprintf(output, " lds");
386 if (mubuf.disable_wqm)
387 fprintf(output, " disable_wqm");
388 print_sync(mubuf.sync, output);
389 break;
390 }
391 case Format::MIMG: {
392 const MIMG_instruction& mimg = instr->mimg();
393 unsigned identity_dmask =
394 !instr->definitions.empty() ? (1 << instr->definitions[0].size()) - 1 : 0xf;
395 if ((mimg.dmask & identity_dmask) != identity_dmask)
396 fprintf(output, " dmask:%s%s%s%s", mimg.dmask & 0x1 ? "x" : "",
397 mimg.dmask & 0x2 ? "y" : "", mimg.dmask & 0x4 ? "z" : "",
398 mimg.dmask & 0x8 ? "w" : "");
399 switch (mimg.dim) {
400 case ac_image_1d: fprintf(output, " 1d"); break;
401 case ac_image_2d: fprintf(output, " 2d"); break;
402 case ac_image_3d: fprintf(output, " 3d"); break;
403 case ac_image_cube: fprintf(output, " cube"); break;
404 case ac_image_1darray: fprintf(output, " 1darray"); break;
405 case ac_image_2darray: fprintf(output, " 2darray"); break;
406 case ac_image_2dmsaa: fprintf(output, " 2dmsaa"); break;
407 case ac_image_2darraymsaa: fprintf(output, " 2darraymsaa"); break;
408 }
409 if (mimg.unrm)
410 fprintf(output, " unrm");
411 if (mimg.glc)
412 fprintf(output, " glc");
413 if (mimg.dlc)
414 fprintf(output, " dlc");
415 if (mimg.slc)
416 fprintf(output, " slc");
417 if (mimg.tfe)
418 fprintf(output, " tfe");
419 if (mimg.da)
420 fprintf(output, " da");
421 if (mimg.lwe)
422 fprintf(output, " lwe");
423 if (mimg.r128)
424 fprintf(output, " r128");
425 if (mimg.a16)
426 fprintf(output, " a16");
427 if (mimg.d16)
428 fprintf(output, " d16");
429 if (mimg.disable_wqm)
430 fprintf(output, " disable_wqm");
431 print_sync(mimg.sync, output);
432 break;
433 }
434 case Format::EXP: {
435 const Export_instruction& exp = instr->exp();
436 unsigned identity_mask = exp.compressed ? 0x5 : 0xf;
437 if ((exp.enabled_mask & identity_mask) != identity_mask)
438 fprintf(output, " en:%c%c%c%c", exp.enabled_mask & 0x1 ? 'r' : '*',
439 exp.enabled_mask & 0x2 ? 'g' : '*', exp.enabled_mask & 0x4 ? 'b' : '*',
440 exp.enabled_mask & 0x8 ? 'a' : '*');
441 if (exp.compressed)
442 fprintf(output, " compr");
443 if (exp.done)
444 fprintf(output, " done");
445 if (exp.valid_mask)
446 fprintf(output, " vm");
447
448 if (exp.dest <= V_008DFC_SQ_EXP_MRT + 7)
449 fprintf(output, " mrt%d", exp.dest - V_008DFC_SQ_EXP_MRT);
450 else if (exp.dest == V_008DFC_SQ_EXP_MRTZ)
451 fprintf(output, " mrtz");
452 else if (exp.dest == V_008DFC_SQ_EXP_NULL)
453 fprintf(output, " null");
454 else if (exp.dest >= V_008DFC_SQ_EXP_POS && exp.dest <= V_008DFC_SQ_EXP_POS + 3)
455 fprintf(output, " pos%d", exp.dest - V_008DFC_SQ_EXP_POS);
456 else if (exp.dest >= V_008DFC_SQ_EXP_PARAM && exp.dest <= V_008DFC_SQ_EXP_PARAM + 31)
457 fprintf(output, " param%d", exp.dest - V_008DFC_SQ_EXP_PARAM);
458 break;
459 }
460 case Format::PSEUDO_BRANCH: {
461 const Pseudo_branch_instruction& branch = instr->branch();
462 /* Note: BB0 cannot be a branch target */
463 if (branch.target[0] != 0)
464 fprintf(output, " BB%d", branch.target[0]);
465 if (branch.target[1] != 0)
466 fprintf(output, ", BB%d", branch.target[1]);
467 break;
468 }
469 case Format::PSEUDO_REDUCTION: {
470 const Pseudo_reduction_instruction& reduce = instr->reduction();
471 fprintf(output, " op:%s", reduce_ops[reduce.reduce_op]);
472 if (reduce.cluster_size)
473 fprintf(output, " cluster_size:%u", reduce.cluster_size);
474 break;
475 }
476 case Format::PSEUDO_BARRIER: {
477 const Pseudo_barrier_instruction& barrier = instr->barrier();
478 print_sync(barrier.sync, output);
479 print_scope(barrier.exec_scope, output, "exec_scope");
480 break;
481 }
482 case Format::FLAT:
483 case Format::GLOBAL:
484 case Format::SCRATCH: {
485 const FLAT_instruction& flat = instr->flatlike();
486 if (flat.offset)
487 fprintf(output, " offset:%d", flat.offset);
488 if (flat.glc)
489 fprintf(output, " glc");
490 if (flat.dlc)
491 fprintf(output, " dlc");
492 if (flat.slc)
493 fprintf(output, " slc");
494 if (flat.lds)
495 fprintf(output, " lds");
496 if (flat.nv)
497 fprintf(output, " nv");
498 if (flat.disable_wqm)
499 fprintf(output, " disable_wqm");
500 print_sync(flat.sync, output);
501 break;
502 }
503 case Format::MTBUF: {
504 const MTBUF_instruction& mtbuf = instr->mtbuf();
505 fprintf(output, " dfmt:");
506 switch (mtbuf.dfmt) {
507 case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
508 case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
509 case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
510 case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
511 case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
512 case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
513 case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
514 case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
515 case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
516 case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
517 case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
518 case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
519 case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
520 case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
521 case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
522 }
523 fprintf(output, " nfmt:");
524 switch (mtbuf.nfmt) {
525 case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
526 case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
527 case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
528 case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
529 case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
530 case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
531 case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
532 case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
533 }
534 if (mtbuf.offset)
535 fprintf(output, " offset:%u", mtbuf.offset);
536 if (mtbuf.offen)
537 fprintf(output, " offen");
538 if (mtbuf.idxen)
539 fprintf(output, " idxen");
540 if (mtbuf.glc)
541 fprintf(output, " glc");
542 if (mtbuf.dlc)
543 fprintf(output, " dlc");
544 if (mtbuf.slc)
545 fprintf(output, " slc");
546 if (mtbuf.tfe)
547 fprintf(output, " tfe");
548 if (mtbuf.disable_wqm)
549 fprintf(output, " disable_wqm");
550 print_sync(mtbuf.sync, output);
551 break;
552 }
553 case Format::VOP3P: {
554 if (instr->vop3p().clamp)
555 fprintf(output, " clamp");
556 break;
557 }
558 default: {
559 break;
560 }
561 }
562 if (instr->isVOP3()) {
563 const VOP3_instruction& vop3 = instr->vop3();
564 switch (vop3.omod) {
565 case 1: fprintf(output, " *2"); break;
566 case 2: fprintf(output, " *4"); break;
567 case 3: fprintf(output, " *0.5"); break;
568 }
569 if (vop3.clamp)
570 fprintf(output, " clamp");
571 if (vop3.opsel & (1 << 3))
572 fprintf(output, " opsel_hi");
573 } else if (instr->isDPP16()) {
574 const DPP16_instruction& dpp = instr->dpp16();
575 if (dpp.dpp_ctrl <= 0xff) {
576 fprintf(output, " quad_perm:[%d,%d,%d,%d]", dpp.dpp_ctrl & 0x3, (dpp.dpp_ctrl >> 2) & 0x3,
577 (dpp.dpp_ctrl >> 4) & 0x3, (dpp.dpp_ctrl >> 6) & 0x3);
578 } else if (dpp.dpp_ctrl >= 0x101 && dpp.dpp_ctrl <= 0x10f) {
579 fprintf(output, " row_shl:%d", dpp.dpp_ctrl & 0xf);
580 } else if (dpp.dpp_ctrl >= 0x111 && dpp.dpp_ctrl <= 0x11f) {
581 fprintf(output, " row_shr:%d", dpp.dpp_ctrl & 0xf);
582 } else if (dpp.dpp_ctrl >= 0x121 && dpp.dpp_ctrl <= 0x12f) {
583 fprintf(output, " row_ror:%d", dpp.dpp_ctrl & 0xf);
584 } else if (dpp.dpp_ctrl == dpp_wf_sl1) {
585 fprintf(output, " wave_shl:1");
586 } else if (dpp.dpp_ctrl == dpp_wf_rl1) {
587 fprintf(output, " wave_rol:1");
588 } else if (dpp.dpp_ctrl == dpp_wf_sr1) {
589 fprintf(output, " wave_shr:1");
590 } else if (dpp.dpp_ctrl == dpp_wf_rr1) {
591 fprintf(output, " wave_ror:1");
592 } else if (dpp.dpp_ctrl == dpp_row_mirror) {
593 fprintf(output, " row_mirror");
594 } else if (dpp.dpp_ctrl == dpp_row_half_mirror) {
595 fprintf(output, " row_half_mirror");
596 } else if (dpp.dpp_ctrl == dpp_row_bcast15) {
597 fprintf(output, " row_bcast:15");
598 } else if (dpp.dpp_ctrl == dpp_row_bcast31) {
599 fprintf(output, " row_bcast:31");
600 } else {
601 fprintf(output, " dpp_ctrl:0x%.3x", dpp.dpp_ctrl);
602 }
603 if (dpp.row_mask != 0xf)
604 fprintf(output, " row_mask:0x%.1x", dpp.row_mask);
605 if (dpp.bank_mask != 0xf)
606 fprintf(output, " bank_mask:0x%.1x", dpp.bank_mask);
607 if (dpp.bound_ctrl)
608 fprintf(output, " bound_ctrl:1");
609 } else if (instr->isDPP8()) {
610 const DPP8_instruction& dpp = instr->dpp8();
611 fprintf(output, " dpp8:[%d,%d,%d,%d,%d,%d,%d,%d]", dpp.lane_sel[0], dpp.lane_sel[1],
612 dpp.lane_sel[2], dpp.lane_sel[3], dpp.lane_sel[4], dpp.lane_sel[5], dpp.lane_sel[6],
613 dpp.lane_sel[7]);
614 } else if (instr->isSDWA()) {
615 const SDWA_instruction& sdwa = instr->sdwa();
616 switch (sdwa.omod) {
617 case 1: fprintf(output, " *2"); break;
618 case 2: fprintf(output, " *4"); break;
619 case 3: fprintf(output, " *0.5"); break;
620 }
621 if (sdwa.clamp)
622 fprintf(output, " clamp");
623 if (!instr->isVOPC()) {
624 char sext = sdwa.dst_sel.sign_extend() ? 's' : 'u';
625 unsigned offset = sdwa.dst_sel.offset();
626 if (instr->definitions[0].isFixed())
627 offset += instr->definitions[0].physReg().byte();
628 switch (sdwa.dst_sel.size()) {
629 case 1: fprintf(output, " dst_sel:%cbyte%u", sext, offset); break;
630 case 2: fprintf(output, " dst_sel:%cword%u", sext, offset >> 1); break;
631 case 4: fprintf(output, " dst_sel:dword"); break;
632 default: break;
633 }
634 if (instr->definitions[0].bytes() < 4)
635 fprintf(output, " dst_preserve");
636 }
637 for (unsigned i = 0; i < std::min<unsigned>(2, instr->operands.size()); i++) {
638 char sext = sdwa.sel[i].sign_extend() ? 's' : 'u';
639 unsigned offset = sdwa.sel[i].offset();
640 if (instr->operands[i].isFixed())
641 offset += instr->operands[i].physReg().byte();
642 switch (sdwa.sel[i].size()) {
643 case 1: fprintf(output, " src%d_sel:%cbyte%u", i, sext, offset); break;
644 case 2: fprintf(output, " src%d_sel:%cword%u", i, sext, offset >> 1); break;
645 case 4: fprintf(output, " src%d_sel:dword", i); break;
646 default: break;
647 }
648 }
649 }
650 }
651
652 void
aco_print_instr(const Instruction * instr,FILE * output,unsigned flags)653 aco_print_instr(const Instruction* instr, FILE* output, unsigned flags)
654 {
655 if (!instr->definitions.empty()) {
656 for (unsigned i = 0; i < instr->definitions.size(); ++i) {
657 print_definition(&instr->definitions[i], output, flags);
658 if (i + 1 != instr->definitions.size())
659 fprintf(output, ", ");
660 }
661 fprintf(output, " = ");
662 }
663 fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
664 if (instr->operands.size()) {
665 const unsigned num_operands = instr->operands.size();
666 bool* const abs = (bool*)alloca(num_operands * sizeof(bool));
667 bool* const neg = (bool*)alloca(num_operands * sizeof(bool));
668 bool* const opsel = (bool*)alloca(num_operands * sizeof(bool));
669 bool* const f2f32 = (bool*)alloca(num_operands * sizeof(bool));
670 for (unsigned i = 0; i < num_operands; ++i) {
671 abs[i] = false;
672 neg[i] = false;
673 opsel[i] = false;
674 f2f32[i] = false;
675 }
676 bool is_mad_mix = instr->opcode == aco_opcode::v_fma_mix_f32 ||
677 instr->opcode == aco_opcode::v_fma_mixlo_f16 ||
678 instr->opcode == aco_opcode::v_fma_mixhi_f16;
679 if (instr->isVOP3()) {
680 const VOP3_instruction& vop3 = instr->vop3();
681 for (unsigned i = 0; i < MIN2(num_operands, 3); ++i) {
682 abs[i] = vop3.abs[i];
683 neg[i] = vop3.neg[i];
684 opsel[i] = vop3.opsel & (1 << i);
685 }
686 } else if (instr->isDPP16()) {
687 const DPP16_instruction& dpp = instr->dpp16();
688 for (unsigned i = 0; i < MIN2(num_operands, 2); ++i) {
689 abs[i] = dpp.abs[i];
690 neg[i] = dpp.neg[i];
691 opsel[i] = false;
692 }
693 } else if (instr->isSDWA()) {
694 const SDWA_instruction& sdwa = instr->sdwa();
695 for (unsigned i = 0; i < MIN2(num_operands, 2); ++i) {
696 abs[i] = sdwa.abs[i];
697 neg[i] = sdwa.neg[i];
698 opsel[i] = false;
699 }
700 } else if (instr->isVOP3P() && is_mad_mix) {
701 const VOP3P_instruction& vop3p = instr->vop3p();
702 for (unsigned i = 0; i < MIN2(num_operands, 3); ++i) {
703 abs[i] = vop3p.neg_hi[i];
704 neg[i] = vop3p.neg_lo[i];
705 f2f32[i] = vop3p.opsel_hi & (1 << i);
706 opsel[i] = f2f32[i] && (vop3p.opsel_lo & (1 << i));
707 }
708 }
709 for (unsigned i = 0; i < num_operands; ++i) {
710 if (i)
711 fprintf(output, ", ");
712 else
713 fprintf(output, " ");
714
715 if (neg[i])
716 fprintf(output, "-");
717 if (abs[i])
718 fprintf(output, "|");
719 if (opsel[i])
720 fprintf(output, "hi(");
721 else if (f2f32[i])
722 fprintf(output, "lo(");
723 aco_print_operand(&instr->operands[i], output, flags);
724 if (f2f32[i] || opsel[i])
725 fprintf(output, ")");
726 if (abs[i])
727 fprintf(output, "|");
728
729 if (instr->isVOP3P() && !is_mad_mix) {
730 const VOP3P_instruction& vop3 = instr->vop3p();
731 if ((vop3.opsel_lo & (1 << i)) || !(vop3.opsel_hi & (1 << i))) {
732 fprintf(output, ".%c%c", vop3.opsel_lo & (1 << i) ? 'y' : 'x',
733 vop3.opsel_hi & (1 << i) ? 'y' : 'x');
734 }
735 if (vop3.neg_lo[i] && vop3.neg_hi[i])
736 fprintf(output, "*[-1,-1]");
737 else if (vop3.neg_lo[i])
738 fprintf(output, "*[-1,1]");
739 else if (vop3.neg_hi[i])
740 fprintf(output, "*[1,-1]");
741 }
742 }
743 }
744 print_instr_format_specific(instr, output);
745 }
746
747 static void
print_block_kind(uint16_t kind,FILE * output)748 print_block_kind(uint16_t kind, FILE* output)
749 {
750 if (kind & block_kind_uniform)
751 fprintf(output, "uniform, ");
752 if (kind & block_kind_top_level)
753 fprintf(output, "top-level, ");
754 if (kind & block_kind_loop_preheader)
755 fprintf(output, "loop-preheader, ");
756 if (kind & block_kind_loop_header)
757 fprintf(output, "loop-header, ");
758 if (kind & block_kind_loop_exit)
759 fprintf(output, "loop-exit, ");
760 if (kind & block_kind_continue)
761 fprintf(output, "continue, ");
762 if (kind & block_kind_break)
763 fprintf(output, "break, ");
764 if (kind & block_kind_continue_or_break)
765 fprintf(output, "continue_or_break, ");
766 if (kind & block_kind_branch)
767 fprintf(output, "branch, ");
768 if (kind & block_kind_merge)
769 fprintf(output, "merge, ");
770 if (kind & block_kind_invert)
771 fprintf(output, "invert, ");
772 if (kind & block_kind_uses_discard)
773 fprintf(output, "discard, ");
774 if (kind & block_kind_needs_lowering)
775 fprintf(output, "needs_lowering, ");
776 if (kind & block_kind_export_end)
777 fprintf(output, "export_end, ");
778 }
779
780 static void
print_stage(Stage stage,FILE * output)781 print_stage(Stage stage, FILE* output)
782 {
783 fprintf(output, "ACO shader stage: ");
784
785 if (stage == compute_cs)
786 fprintf(output, "compute_cs");
787 else if (stage == fragment_fs)
788 fprintf(output, "fragment_fs");
789 else if (stage == gs_copy_vs)
790 fprintf(output, "gs_copy_vs");
791 else if (stage == vertex_ls)
792 fprintf(output, "vertex_ls");
793 else if (stage == vertex_es)
794 fprintf(output, "vertex_es");
795 else if (stage == vertex_vs)
796 fprintf(output, "vertex_vs");
797 else if (stage == tess_control_hs)
798 fprintf(output, "tess_control_hs");
799 else if (stage == vertex_tess_control_hs)
800 fprintf(output, "vertex_tess_control_hs");
801 else if (stage == tess_eval_es)
802 fprintf(output, "tess_eval_es");
803 else if (stage == tess_eval_vs)
804 fprintf(output, "tess_eval_vs");
805 else if (stage == geometry_gs)
806 fprintf(output, "geometry_gs");
807 else if (stage == vertex_geometry_gs)
808 fprintf(output, "vertex_geometry_gs");
809 else if (stage == tess_eval_geometry_gs)
810 fprintf(output, "tess_eval_geometry_gs");
811 else if (stage == vertex_ngg)
812 fprintf(output, "vertex_ngg");
813 else if (stage == tess_eval_ngg)
814 fprintf(output, "tess_eval_ngg");
815 else if (stage == vertex_geometry_ngg)
816 fprintf(output, "vertex_geometry_ngg");
817 else if (stage == tess_eval_geometry_ngg)
818 fprintf(output, "tess_eval_geometry_ngg");
819 else if (stage == mesh_ngg)
820 fprintf(output, "mesh_ngg");
821 else if (stage == task_cs)
822 fprintf(output, "task_cs");
823 else
824 fprintf(output, "unknown");
825
826 fprintf(output, "\n");
827 }
828
829 void
aco_print_block(const Block * block,FILE * output,unsigned flags,const live & live_vars)830 aco_print_block(const Block* block, FILE* output, unsigned flags, const live& live_vars)
831 {
832 fprintf(output, "BB%d\n", block->index);
833 fprintf(output, "/* logical preds: ");
834 for (unsigned pred : block->logical_preds)
835 fprintf(output, "BB%d, ", pred);
836 fprintf(output, "/ linear preds: ");
837 for (unsigned pred : block->linear_preds)
838 fprintf(output, "BB%d, ", pred);
839 fprintf(output, "/ kind: ");
840 print_block_kind(block->kind, output);
841 fprintf(output, "*/\n");
842
843 if (flags & print_live_vars) {
844 fprintf(output, "\tlive out:");
845 for (unsigned id : live_vars.live_out[block->index])
846 fprintf(output, " %%%d", id);
847 fprintf(output, "\n");
848
849 RegisterDemand demand = block->register_demand;
850 fprintf(output, "\tdemand: %u vgpr, %u sgpr\n", demand.vgpr, demand.sgpr);
851 }
852
853 unsigned index = 0;
854 for (auto const& instr : block->instructions) {
855 fprintf(output, "\t");
856 if (flags & print_live_vars) {
857 RegisterDemand demand = live_vars.register_demand[block->index][index];
858 fprintf(output, "(%3u vgpr, %3u sgpr) ", demand.vgpr, demand.sgpr);
859 }
860 if (flags & print_perf_info)
861 fprintf(output, "(%3u clk) ", instr->pass_flags);
862
863 aco_print_instr(instr.get(), output, flags);
864 fprintf(output, "\n");
865 index++;
866 }
867 }
868
869 void
aco_print_program(const Program * program,FILE * output,const live & live_vars,unsigned flags)870 aco_print_program(const Program* program, FILE* output, const live& live_vars, unsigned flags)
871 {
872 switch (program->progress) {
873 case CompilationProgress::after_isel: fprintf(output, "After Instruction Selection:\n"); break;
874 case CompilationProgress::after_spilling:
875 fprintf(output, "After Spilling:\n");
876 flags |= print_kill;
877 break;
878 case CompilationProgress::after_ra: fprintf(output, "After RA:\n"); break;
879 }
880
881 print_stage(program->stage, output);
882
883 for (Block const& block : program->blocks)
884 aco_print_block(&block, output, flags, live_vars);
885
886 if (program->constant_data.size()) {
887 fprintf(output, "\n/* constant data */\n");
888 for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
889 fprintf(output, "[%06d] ", i);
890 unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
891 for (unsigned j = 0; j < line_size; j += 4) {
892 unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
893 uint32_t v = 0;
894 memcpy(&v, &program->constant_data[i + j], size);
895 fprintf(output, " %08x", v);
896 }
897 fprintf(output, "\n");
898 }
899 }
900
901 fprintf(output, "\n");
902 }
903
904 void
aco_print_program(const Program * program,FILE * output,unsigned flags)905 aco_print_program(const Program* program, FILE* output, unsigned flags)
906 {
907 aco_print_program(program, output, live(), flags);
908 }
909
910 } // namespace aco
911