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1 /* ----------------------------------------------------------------------
2  * Project:      CMSIS DSP Library
3  * Title:        arm_const_structs.c
4  * Description:  Constant structs that are initialized for user convenience.
5  *               For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
6  *
7  * $Date:        23 April 2021
8  * $Revision:    V1.9.0
9  *
10  * Target Processor: Cortex-M and Cortex-A cores
11  * -------------------------------------------------------------------- */
12 /*
13  * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14  *
15  * SPDX-License-Identifier: Apache-2.0
16  *
17  * Licensed under the Apache License, Version 2.0 (the License); you may
18  * not use this file except in compliance with the License.
19  * You may obtain a copy of the License at
20  *
21  * www.apache.org/licenses/LICENSE-2.0
22  *
23  * Unless required by applicable law or agreed to in writing, software
24  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
25  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26  * See the License for the specific language governing permissions and
27  * limitations under the License.
28  */
29 
30 #include "arm_math_types.h"
31 #include "arm_const_structs.h"
32 
33 /*
34 ALLOW TABLE is true when config table is enabled and the Tramsform folder is included
35 for compilation.
36 */
37 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
38 
39 /* Floating-point structs */
40 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16))
41 const arm_cfft_instance_f64 arm_cfft_sR_f64_len16 = {
42   16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH
43 };
44 #endif
45 
46 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32))
47 const arm_cfft_instance_f64 arm_cfft_sR_f64_len32 = {
48   32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH
49 };
50 #endif
51 
52 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64))
53 const arm_cfft_instance_f64 arm_cfft_sR_f64_len64 = {
54   64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH
55 };
56 #endif
57 
58 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128))
59 const arm_cfft_instance_f64 arm_cfft_sR_f64_len128 = {
60   128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH
61 };
62 #endif
63 
64 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256))
65 const arm_cfft_instance_f64 arm_cfft_sR_f64_len256 = {
66   256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH
67 };
68 #endif
69 
70 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512))
71 const arm_cfft_instance_f64 arm_cfft_sR_f64_len512 = {
72   512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH
73 };
74 #endif
75 
76 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024))
77 const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024 = {
78   1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH
79 };
80 #endif
81 
82 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048))
83 const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048 = {
84   2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH
85 };
86 #endif
87 
88 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096))
89 const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096 = {
90   4096, (const float64_t *)twiddleCoefF64_4096, armBitRevIndexTableF64_4096, ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH
91 };
92 #endif
93 
94 /* Floating-point structs */
95 #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
96 
97 
98 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
99 const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
100   16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
101 };
102 #endif
103 
104 
105 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
106 const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
107   32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
108 };
109 #endif
110 
111 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
112 const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
113   64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
114 };
115 #endif
116 
117 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
118 const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
119   128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
120 };
121 #endif
122 
123 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
124 const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
125   256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
126 };
127 #endif
128 
129 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
130 const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
131   512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
132 };
133 #endif
134 
135 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
136 const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
137   1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
138 };
139 #endif
140 
141 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
142 const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
143   2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
144 };
145 #endif
146 
147 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
148 const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
149   4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
150 };
151 #endif
152 
153 #endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
154 
155 /* Fixed-point structs */
156 
157 #if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE)
158 
159 /*
160 
161 Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
162 So they are not compiled when MVE is defined.
163 
164 For the MVE version, the new arm_cfft_init_f32 must be used.
165 
166 
167 */
168 
169 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
170 const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
171   16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
172 };
173 #endif
174 
175 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
176 const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
177   32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
178 };
179 #endif
180 
181 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
182 const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
183   64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
184 };
185 #endif
186 
187 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
188 const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
189   128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
190 };
191 #endif
192 
193 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
194 const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
195   256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
196 };
197 #endif
198 
199 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
200 const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
201   512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
202 };
203 #endif
204 
205 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
206 const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
207   1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
208 };
209 #endif
210 
211 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
212 const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
213   2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
214 };
215 #endif
216 
217 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
218 const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
219   4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
220 };
221 #endif
222 
223 
224 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
225 const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
226   16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
227 };
228 #endif
229 
230 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
231 const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
232   32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
233 };
234 #endif
235 
236 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
237 const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
238   64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
239 };
240 #endif
241 
242 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
243 const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
244   128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
245 };
246 #endif
247 
248 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
249 const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
250   256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
251 };
252 #endif
253 
254 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
255 const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
256   512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
257 };
258 #endif
259 
260 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
261 const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
262   1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
263 };
264 #endif
265 
266 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
267 const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
268   2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
269 };
270 #endif
271 
272 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
273 const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
274   4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
275 };
276 #endif
277 
278 #endif /* !defined(ARM_MATH_MVEI) */
279 
280 /* Structure for real-value inputs */
281 /* Double precision strucs */
282 
283 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32))
284 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len32 = {
285   { 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH },
286   32U,
287   (float64_t *)twiddleCoefF64_rfft_32
288 };
289 #endif
290 
291 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64))
292 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len64 = {
293    { 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH },
294   64U,
295   (float64_t *)twiddleCoefF64_rfft_64
296 };
297 #endif
298 
299 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128))
300 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len128 = {
301   { 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH },
302   128U,
303   (float64_t *)twiddleCoefF64_rfft_128
304 };
305 #endif
306 
307 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256))
308 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len256 = {
309   { 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH },
310   256U,
311   (float64_t *)twiddleCoefF64_rfft_256
312 };
313 #endif
314 
315 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512))
316 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len512 = {
317   { 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH },
318   512U,
319   (float64_t *)twiddleCoefF64_rfft_512
320 };
321 #endif
322 
323 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024))
324 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len1024 = {
325   { 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH },
326   1024U,
327   (float64_t *)twiddleCoefF64_rfft_1024
328 };
329 #endif
330 
331 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048))
332 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len2048 = {
333   { 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH },
334   2048U,
335   (float64_t *)twiddleCoefF64_rfft_2048
336 };
337 #endif
338 
339 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096))
340 const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len4096 = {
341   { 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH },
342   4096U,
343   (float64_t *)twiddleCoefF64_rfft_4096
344 };
345 #endif
346 
347 /* Floating-point structs */
348 
349 #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
350 
351 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
352 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
353   { 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
354   32U,
355   (float32_t *)twiddleCoef_rfft_32
356 };
357 #endif
358 
359 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
360 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
361    { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
362   64U,
363   (float32_t *)twiddleCoef_rfft_64
364 };
365 #endif
366 
367 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
368 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
369   { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
370   128U,
371   (float32_t *)twiddleCoef_rfft_128
372 };
373 #endif
374 
375 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
376 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
377   { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
378   256U,
379   (float32_t *)twiddleCoef_rfft_256
380 };
381 #endif
382 
383 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
384 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
385   { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
386   512U,
387   (float32_t *)twiddleCoef_rfft_512
388 };
389 #endif
390 
391 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
392 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
393   { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
394   1024U,
395   (float32_t *)twiddleCoef_rfft_1024
396 };
397 #endif
398 
399 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
400 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
401   { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
402   2048U,
403   (float32_t *)twiddleCoef_rfft_2048
404 };
405 #endif
406 
407 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
408 const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
409   { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
410   4096U,
411   (float32_t *)twiddleCoef_rfft_4096
412 };
413 #endif
414 
415 #endif /* #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
416 
417 /* Fixed-point structs */
418 /* q31_t */
419 
420 #if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE)
421 
422 /*
423 
424 Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
425 So they are not compiled when MVE is defined.
426 
427 For the MVE version, the new arm_cfft_init_f32 must be used.
428 
429 
430 */
431 
432 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
433 const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
434   32U,
435   0,
436   1,
437   256U,
438   (q31_t*)realCoefAQ31,
439   (q31_t*)realCoefBQ31,
440   &arm_cfft_sR_q31_len16
441 };
442 #endif
443 
444 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
445 const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
446   64U,
447   0,
448   1,
449   128U,
450   (q31_t*)realCoefAQ31,
451   (q31_t*)realCoefBQ31,
452   &arm_cfft_sR_q31_len32
453 };
454 #endif
455 
456 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
457 const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
458   128U,
459   0,
460   1,
461   64U,
462   (q31_t*)realCoefAQ31,
463   (q31_t*)realCoefBQ31,
464   &arm_cfft_sR_q31_len64
465 };
466 #endif
467 
468 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
469 const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
470   256U,
471   0,
472   1,
473   32U,
474   (q31_t*)realCoefAQ31,
475   (q31_t*)realCoefBQ31,
476   &arm_cfft_sR_q31_len128
477 };
478 #endif
479 
480 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
481 const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
482   512U,
483   0,
484   1,
485   16U,
486   (q31_t*)realCoefAQ31,
487   (q31_t*)realCoefBQ31,
488   &arm_cfft_sR_q31_len256
489 };
490 #endif
491 
492 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
493 const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
494   1024U,
495   0,
496   1,
497   8U,
498   (q31_t*)realCoefAQ31,
499   (q31_t*)realCoefBQ31,
500   &arm_cfft_sR_q31_len512
501 };
502 #endif
503 
504 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
505 const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
506   2048U,
507   0,
508   1,
509   4U,
510   (q31_t*)realCoefAQ31,
511   (q31_t*)realCoefBQ31,
512   &arm_cfft_sR_q31_len1024
513 };
514 #endif
515 
516 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
517 const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
518   4096U,
519   0,
520   1,
521   2U,
522   (q31_t*)realCoefAQ31,
523   (q31_t*)realCoefBQ31,
524   &arm_cfft_sR_q31_len2048
525 };
526 #endif
527 
528 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
529 const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
530   8192U,
531   0,
532   1,
533   1U,
534   (q31_t*)realCoefAQ31,
535   (q31_t*)realCoefBQ31,
536   &arm_cfft_sR_q31_len4096
537 };
538 #endif
539 
540 
541 
542 /* q15_t */
543 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
544 const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
545   32U,
546   0,
547   1,
548   256U,
549   (q15_t*)realCoefAQ15,
550   (q15_t*)realCoefBQ15,
551   &arm_cfft_sR_q15_len16
552 };
553 #endif
554 
555 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
556 const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
557   64U,
558   0,
559   1,
560   128U,
561   (q15_t*)realCoefAQ15,
562   (q15_t*)realCoefBQ15,
563   &arm_cfft_sR_q15_len32
564 };
565 #endif
566 
567 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
568 const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
569   128U,
570   0,
571   1,
572   64U,
573   (q15_t*)realCoefAQ15,
574   (q15_t*)realCoefBQ15,
575   &arm_cfft_sR_q15_len64
576 };
577 #endif
578 
579 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
580 const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
581   256U,
582   0,
583   1,
584   32U,
585   (q15_t*)realCoefAQ15,
586   (q15_t*)realCoefBQ15,
587   &arm_cfft_sR_q15_len128
588 };
589 #endif
590 
591 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
592 const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
593   512U,
594   0,
595   1,
596   16U,
597   (q15_t*)realCoefAQ15,
598   (q15_t*)realCoefBQ15,
599   &arm_cfft_sR_q15_len256
600 };
601 #endif
602 
603 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
604 const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
605   1024U,
606   0,
607   1,
608   8U,
609   (q15_t*)realCoefAQ15,
610   (q15_t*)realCoefBQ15,
611   &arm_cfft_sR_q15_len512
612 };
613 #endif
614 
615 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
616 const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
617   2048U,
618   0,
619   1,
620   4U,
621   (q15_t*)realCoefAQ15,
622   (q15_t*)realCoefBQ15,
623   &arm_cfft_sR_q15_len1024
624 };
625 #endif
626 
627 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
628 const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
629   4096U,
630   0,
631   1,
632   2U,
633   (q15_t*)realCoefAQ15,
634   (q15_t*)realCoefBQ15,
635   &arm_cfft_sR_q15_len2048
636 };
637 #endif
638 
639 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
640 const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
641   8192U,
642   0,
643   1,
644   1U,
645   (q15_t*)realCoefAQ15,
646   (q15_t*)realCoefBQ15,
647   &arm_cfft_sR_q15_len4096
648 };
649 #endif
650 
651 #endif /* !defined(ARM_MATH_MVEI) */
652 
653 
654 #endif
655