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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
4  *
5  */
6 #ifndef _MHI_H_
7 #define _MHI_H_
8 
9 #include <linux/device.h>
10 #include <linux/dma-direction.h>
11 #include <linux/mutex.h>
12 #include <linux/skbuff.h>
13 #include <linux/slab.h>
14 #include <linux/spinlock.h>
15 #include <linux/wait.h>
16 #include <linux/workqueue.h>
17 
18 #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16
19 
20 struct mhi_chan;
21 struct mhi_event;
22 struct mhi_ctxt;
23 struct mhi_cmd;
24 struct mhi_buf_info;
25 
26 /**
27  * enum mhi_callback - MHI callback
28  * @MHI_CB_IDLE: MHI entered idle state
29  * @MHI_CB_PENDING_DATA: New data available for client to process
30  * @MHI_CB_LPM_ENTER: MHI host entered low power mode
31  * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode
32  * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env
33  * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env
34  * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover)
35  * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state
36  * @MHI_CB_BW_REQ: Received a bandwidth switch request from device
37  */
38 enum mhi_callback {
39 	MHI_CB_IDLE,
40 	MHI_CB_PENDING_DATA,
41 	MHI_CB_LPM_ENTER,
42 	MHI_CB_LPM_EXIT,
43 	MHI_CB_EE_RDDM,
44 	MHI_CB_EE_MISSION_MODE,
45 	MHI_CB_SYS_ERROR,
46 	MHI_CB_FATAL_ERROR,
47 	MHI_CB_BW_REQ,
48 };
49 
50 /**
51  * enum mhi_flags - Transfer flags
52  * @MHI_EOB: End of buffer for bulk transfer
53  * @MHI_EOT: End of transfer
54  * @MHI_CHAIN: Linked transfer
55  */
56 enum mhi_flags {
57 	MHI_EOB = BIT(0),
58 	MHI_EOT = BIT(1),
59 	MHI_CHAIN = BIT(2),
60 };
61 
62 /**
63  * enum mhi_device_type - Device types
64  * @MHI_DEVICE_XFER: Handles data transfer
65  * @MHI_DEVICE_CONTROLLER: Control device
66  */
67 enum mhi_device_type {
68 	MHI_DEVICE_XFER,
69 	MHI_DEVICE_CONTROLLER,
70 };
71 
72 /**
73  * enum mhi_ch_type - Channel types
74  * @MHI_CH_TYPE_INVALID: Invalid channel type
75  * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device
76  * @MHI_CH_TYPE_INBOUND: Inbound channel from the device
77  * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine
78  *				   multiple packets and send them as a single
79  *				   large packet to reduce CPU consumption
80  */
81 enum mhi_ch_type {
82 	MHI_CH_TYPE_INVALID = 0,
83 	MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE,
84 	MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE,
85 	MHI_CH_TYPE_INBOUND_COALESCED = 3,
86 };
87 
88 /**
89  * struct image_info - Firmware and RDDM table
90  * @mhi_buf: Buffer for firmware and RDDM table
91  * @entries: # of entries in table
92  */
93 struct image_info {
94 	struct mhi_buf *mhi_buf;
95 	/* private: from internal.h */
96 	struct bhi_vec_entry *bhi_vec;
97 	/* public: */
98 	u32 entries;
99 };
100 
101 /**
102  * struct mhi_link_info - BW requirement
103  * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
104  * target_link_width - Link width as defined by NLW bits in LinkStatus reg
105  */
106 struct mhi_link_info {
107 	unsigned int target_link_speed;
108 	unsigned int target_link_width;
109 };
110 
111 /**
112  * enum mhi_ee_type - Execution environment types
113  * @MHI_EE_PBL: Primary Bootloader
114  * @MHI_EE_SBL: Secondary Bootloader
115  * @MHI_EE_AMSS: Modem, aka the primary runtime EE
116  * @MHI_EE_RDDM: Ram dump download mode
117  * @MHI_EE_WFW: WLAN firmware mode
118  * @MHI_EE_PTHRU: Passthrough
119  * @MHI_EE_EDL: Embedded downloader
120  */
121 enum mhi_ee_type {
122 	MHI_EE_PBL,
123 	MHI_EE_SBL,
124 	MHI_EE_AMSS,
125 	MHI_EE_RDDM,
126 	MHI_EE_WFW,
127 	MHI_EE_PTHRU,
128 	MHI_EE_EDL,
129 	MHI_EE_MAX_SUPPORTED = MHI_EE_EDL,
130 	MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
131 	MHI_EE_NOT_SUPPORTED,
132 	MHI_EE_MAX,
133 };
134 
135 /**
136  * enum mhi_state - MHI states
137  * @MHI_STATE_RESET: Reset state
138  * @MHI_STATE_READY: Ready state
139  * @MHI_STATE_M0: M0 state
140  * @MHI_STATE_M1: M1 state
141  * @MHI_STATE_M2: M2 state
142  * @MHI_STATE_M3: M3 state
143  * @MHI_STATE_M3_FAST: M3 Fast state
144  * @MHI_STATE_BHI: BHI state
145  * @MHI_STATE_SYS_ERR: System Error state
146  */
147 enum mhi_state {
148 	MHI_STATE_RESET = 0x0,
149 	MHI_STATE_READY = 0x1,
150 	MHI_STATE_M0 = 0x2,
151 	MHI_STATE_M1 = 0x3,
152 	MHI_STATE_M2 = 0x4,
153 	MHI_STATE_M3 = 0x5,
154 	MHI_STATE_M3_FAST = 0x6,
155 	MHI_STATE_BHI = 0x7,
156 	MHI_STATE_SYS_ERR = 0xFF,
157 	MHI_STATE_MAX,
158 };
159 
160 /**
161  * enum mhi_ch_ee_mask - Execution environment mask for channel
162  * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE
163  * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE
164  * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE
165  * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE
166  * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE
167  * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE
168  * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE
169  */
170 enum mhi_ch_ee_mask {
171 	MHI_CH_EE_PBL = BIT(MHI_EE_PBL),
172 	MHI_CH_EE_SBL = BIT(MHI_EE_SBL),
173 	MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS),
174 	MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM),
175 	MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU),
176 	MHI_CH_EE_WFW = BIT(MHI_EE_WFW),
177 	MHI_CH_EE_EDL = BIT(MHI_EE_EDL),
178 };
179 
180 /**
181  * enum mhi_er_data_type - Event ring data types
182  * @MHI_ER_DATA: Only client data over this ring
183  * @MHI_ER_CTRL: MHI control data and client data
184  */
185 enum mhi_er_data_type {
186 	MHI_ER_DATA,
187 	MHI_ER_CTRL,
188 };
189 
190 /**
191  * enum mhi_db_brst_mode - Doorbell mode
192  * @MHI_DB_BRST_DISABLE: Burst mode disable
193  * @MHI_DB_BRST_ENABLE: Burst mode enable
194  */
195 enum mhi_db_brst_mode {
196 	MHI_DB_BRST_DISABLE = 0x2,
197 	MHI_DB_BRST_ENABLE = 0x3,
198 };
199 
200 /**
201  * struct mhi_channel_config - Channel configuration structure for controller
202  * @name: The name of this channel
203  * @num: The number assigned to this channel
204  * @num_elements: The number of elements that can be queued to this channel
205  * @local_elements: The local ring length of the channel
206  * @event_ring: The event rung index that services this channel
207  * @dir: Direction that data may flow on this channel
208  * @type: Channel type
209  * @ee_mask: Execution Environment mask for this channel
210  * @pollcfg: Polling configuration for burst mode.  0 is default.  milliseconds
211 	     for UL channels, multiple of 8 ring elements for DL channels
212  * @doorbell: Doorbell mode
213  * @lpm_notify: The channel master requires low power mode notifications
214  * @offload_channel: The client manages the channel completely
215  * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition
216  * @auto_queue: Framework will automatically queue buffers for DL traffic
217  * @auto_start: Automatically start (open) this channel
218  * @wake-capable: Channel capable of waking up the system
219  */
220 struct mhi_channel_config {
221 	char *name;
222 	u32 num;
223 	u32 num_elements;
224 	u32 local_elements;
225 	u32 event_ring;
226 	enum dma_data_direction dir;
227 	enum mhi_ch_type type;
228 	u32 ee_mask;
229 	u32 pollcfg;
230 	enum mhi_db_brst_mode doorbell;
231 	bool lpm_notify;
232 	bool offload_channel;
233 	bool doorbell_mode_switch;
234 	bool auto_queue;
235 	bool auto_start;
236 	bool wake_capable;
237 };
238 
239 /**
240  * struct mhi_event_config - Event ring configuration structure for controller
241  * @num_elements: The number of elements that can be queued to this ring
242  * @irq_moderation_ms: Delay irq for additional events to be aggregated
243  * @irq: IRQ associated with this ring
244  * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring
245  * @priority: Priority of this ring. Use 1 for now
246  * @mode: Doorbell mode
247  * @data_type: Type of data this ring will process
248  * @hardware_event: This ring is associated with hardware channels
249  * @client_managed: This ring is client managed
250  * @offload_channel: This ring is associated with an offloaded channel
251  */
252 struct mhi_event_config {
253 	u32 num_elements;
254 	u32 irq_moderation_ms;
255 	u32 irq;
256 	u32 channel;
257 	u32 priority;
258 	enum mhi_db_brst_mode mode;
259 	enum mhi_er_data_type data_type;
260 	bool hardware_event;
261 	bool client_managed;
262 	bool offload_channel;
263 };
264 
265 /**
266  * struct mhi_controller_config - Root MHI controller configuration
267  * @max_channels: Maximum number of channels supported
268  * @timeout_ms: Timeout value for operations. 0 means use default
269  * @buf_len: Size of automatically allocated buffers. 0 means use default
270  * @num_channels: Number of channels defined in @ch_cfg
271  * @ch_cfg: Array of defined channels
272  * @num_events: Number of event rings defined in @event_cfg
273  * @event_cfg: Array of defined event rings
274  * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access
275  * @m2_no_db: Host is not allowed to ring DB in M2 state
276  */
277 struct mhi_controller_config {
278 	u32 max_channels;
279 	u32 timeout_ms;
280 	u32 buf_len;
281 	u32 num_channels;
282 	const struct mhi_channel_config *ch_cfg;
283 	u32 num_events;
284 	const struct mhi_event_config *event_cfg;
285 	bool use_bounce_buf;
286 	bool m2_no_db;
287 };
288 
289 /**
290  * struct mhi_controller - Master MHI controller structure
291  * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI
292  *            controller (required)
293  * @mhi_dev: MHI device instance for the controller
294  * @debugfs_dentry: MHI controller debugfs directory
295  * @regs: Base address of MHI MMIO register space (required)
296  * @bhi: Points to base of MHI BHI register space
297  * @bhie: Points to base of MHI BHIe register space
298  * @wake_db: MHI WAKE doorbell register address
299  * @iova_start: IOMMU starting address for data (required)
300  * @iova_stop: IOMMU stop address for data (required)
301  * @fw_image: Firmware image name for normal booting (required)
302  * @edl_image: Firmware image name for emergency download mode (optional)
303  * @rddm_size: RAM dump size that host should allocate for debugging purpose
304  * @sbl_size: SBL image size downloaded through BHIe (optional)
305  * @seg_len: BHIe vector size (optional)
306  * @fbc_image: Points to firmware image buffer
307  * @rddm_image: Points to RAM dump buffer
308  * @mhi_chan: Points to the channel configuration table
309  * @lpm_chans: List of channels that require LPM notifications
310  * @irq: base irq # to request (required)
311  * @max_chan: Maximum number of channels the controller supports
312  * @total_ev_rings: Total # of event rings allocated
313  * @hw_ev_rings: Number of hardware event rings
314  * @sw_ev_rings: Number of software event rings
315  * @nr_irqs: Number of IRQ allocated by bus master (required)
316  * @family_number: MHI controller family number
317  * @device_number: MHI controller device number
318  * @major_version: MHI controller major revision number
319  * @minor_version: MHI controller minor revision number
320  * @serial_number: MHI controller serial number obtained from BHI
321  * @oem_pk_hash: MHI controller OEM PK Hash obtained from BHI
322  * @mhi_event: MHI event ring configurations table
323  * @mhi_cmd: MHI command ring configurations table
324  * @mhi_ctxt: MHI device context, shared memory between host and device
325  * @pm_mutex: Mutex for suspend/resume operation
326  * @pm_lock: Lock for protecting MHI power management state
327  * @timeout_ms: Timeout in ms for state transitions
328  * @pm_state: MHI power management state
329  * @db_access: DB access states
330  * @ee: MHI device execution environment
331  * @dev_state: MHI device state
332  * @dev_wake: Device wakeup count
333  * @pending_pkts: Pending packets for the controller
334  * @M0, M2, M3: Counters to track number of device MHI state changes
335  * @transition_list: List of MHI state transitions
336  * @transition_lock: Lock for protecting MHI state transition list
337  * @wlock: Lock for protecting device wakeup
338  * @mhi_link_info: Device bandwidth info
339  * @st_worker: State transition worker
340  * @state_event: State change event
341  * @status_cb: CB function to notify power states of the device (required)
342  * @wake_get: CB function to assert device wake (optional)
343  * @wake_put: CB function to de-assert device wake (optional)
344  * @wake_toggle: CB function to assert and de-assert device wake (optional)
345  * @runtime_get: CB function to controller runtime resume (required)
346  * @runtime_put: CB function to decrement pm usage (required)
347  * @map_single: CB function to create TRE buffer
348  * @unmap_single: CB function to destroy TRE buffer
349  * @read_reg: Read a MHI register via the physical link (required)
350  * @write_reg: Write a MHI register via the physical link (required)
351  * @buffer_len: Bounce buffer length
352  * @bounce_buf: Use of bounce buffer
353  * @fbc_download: MHI host needs to do complete image transfer (optional)
354  * @pre_init: MHI host needs to do pre-initialization before power up
355  * @wake_set: Device wakeup set flag
356  *
357  * Fields marked as (required) need to be populated by the controller driver
358  * before calling mhi_register_controller(). For the fields marked as (optional)
359  * they can be populated depending on the usecase.
360  *
361  * The following fields are present for the purpose of implementing any device
362  * specific quirks or customizations for specific MHI revisions used in device
363  * by the controller drivers. The MHI stack will just populate these fields
364  * during mhi_register_controller():
365  *  family_number
366  *  device_number
367  *  major_version
368  *  minor_version
369  */
370 struct mhi_controller {
371 	struct device *cntrl_dev;
372 	struct mhi_device *mhi_dev;
373 	struct dentry *debugfs_dentry;
374 	void __iomem *regs;
375 	void __iomem *bhi;
376 	void __iomem *bhie;
377 	void __iomem *wake_db;
378 
379 	dma_addr_t iova_start;
380 	dma_addr_t iova_stop;
381 	const char *fw_image;
382 	const char *edl_image;
383 	size_t rddm_size;
384 	size_t sbl_size;
385 	size_t seg_len;
386 	struct image_info *fbc_image;
387 	struct image_info *rddm_image;
388 	struct mhi_chan *mhi_chan;
389 	struct list_head lpm_chans;
390 	int *irq;
391 	u32 max_chan;
392 	u32 total_ev_rings;
393 	u32 hw_ev_rings;
394 	u32 sw_ev_rings;
395 	u32 nr_irqs;
396 	u32 family_number;
397 	u32 device_number;
398 	u32 major_version;
399 	u32 minor_version;
400 	u32 serial_number;
401 	u32 oem_pk_hash[MHI_MAX_OEM_PK_HASH_SEGMENTS];
402 
403 	struct mhi_event *mhi_event;
404 	struct mhi_cmd *mhi_cmd;
405 	struct mhi_ctxt *mhi_ctxt;
406 
407 	struct mutex pm_mutex;
408 	rwlock_t pm_lock;
409 	u32 timeout_ms;
410 	u32 pm_state;
411 	u32 db_access;
412 	enum mhi_ee_type ee;
413 	enum mhi_state dev_state;
414 	atomic_t dev_wake;
415 	atomic_t pending_pkts;
416 	u32 M0, M2, M3;
417 	struct list_head transition_list;
418 	spinlock_t transition_lock;
419 	spinlock_t wlock;
420 	struct mhi_link_info mhi_link_info;
421 	struct work_struct st_worker;
422 	wait_queue_head_t state_event;
423 
424 	void (*status_cb)(struct mhi_controller *mhi_cntrl,
425 			  enum mhi_callback cb);
426 	void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
427 	void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
428 	void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
429 	int (*runtime_get)(struct mhi_controller *mhi_cntrl);
430 	void (*runtime_put)(struct mhi_controller *mhi_cntrl);
431 	int (*map_single)(struct mhi_controller *mhi_cntrl,
432 			  struct mhi_buf_info *buf);
433 	void (*unmap_single)(struct mhi_controller *mhi_cntrl,
434 			     struct mhi_buf_info *buf);
435 	int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
436 			u32 *out);
437 	void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
438 			  u32 val);
439 
440 	size_t buffer_len;
441 	bool bounce_buf;
442 	bool fbc_download;
443 	bool pre_init;
444 	bool wake_set;
445 };
446 
447 /**
448  * struct mhi_device - Structure representing an MHI device which binds
449  *                     to channels or is associated with controllers
450  * @id: Pointer to MHI device ID struct
451  * @name: Name of the associated MHI device
452  * @mhi_cntrl: Controller the device belongs to
453  * @ul_chan: UL channel for the device
454  * @dl_chan: DL channel for the device
455  * @dev: Driver model device node for the MHI device
456  * @dev_type: MHI device type
457  * @ul_chan_id: MHI channel id for UL transfer
458  * @dl_chan_id: MHI channel id for DL transfer
459  * @dev_wake: Device wakeup counter
460  */
461 struct mhi_device {
462 	const struct mhi_device_id *id;
463 	const char *name;
464 	struct mhi_controller *mhi_cntrl;
465 	struct mhi_chan *ul_chan;
466 	struct mhi_chan *dl_chan;
467 	struct device dev;
468 	enum mhi_device_type dev_type;
469 	int ul_chan_id;
470 	int dl_chan_id;
471 	u32 dev_wake;
472 };
473 
474 /**
475  * struct mhi_result - Completed buffer information
476  * @buf_addr: Address of data buffer
477  * @bytes_xferd: # of bytes transferred
478  * @dir: Channel direction
479  * @transaction_status: Status of last transaction
480  */
481 struct mhi_result {
482 	void *buf_addr;
483 	size_t bytes_xferd;
484 	enum dma_data_direction dir;
485 	int transaction_status;
486 };
487 
488 /**
489  * struct mhi_buf - MHI Buffer description
490  * @buf: Virtual address of the buffer
491  * @name: Buffer label. For offload channel, configurations name must be:
492  *        ECA - Event context array data
493  *        CCA - Channel context array data
494  * @dma_addr: IOMMU address of the buffer
495  * @len: # of bytes
496  */
497 struct mhi_buf {
498 	void *buf;
499 	const char *name;
500 	dma_addr_t dma_addr;
501 	size_t len;
502 };
503 
504 /**
505  * struct mhi_driver - Structure representing a MHI client driver
506  * @probe: CB function for client driver probe function
507  * @remove: CB function for client driver remove function
508  * @ul_xfer_cb: CB function for UL data transfer
509  * @dl_xfer_cb: CB function for DL data transfer
510  * @status_cb: CB functions for asynchronous status
511  * @driver: Device driver model driver
512  */
513 struct mhi_driver {
514 	const struct mhi_device_id *id_table;
515 	int (*probe)(struct mhi_device *mhi_dev,
516 		     const struct mhi_device_id *id);
517 	void (*remove)(struct mhi_device *mhi_dev);
518 	void (*ul_xfer_cb)(struct mhi_device *mhi_dev,
519 			   struct mhi_result *result);
520 	void (*dl_xfer_cb)(struct mhi_device *mhi_dev,
521 			   struct mhi_result *result);
522 	void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb);
523 	struct device_driver driver;
524 };
525 
526 #define to_mhi_driver(drv) container_of(drv, struct mhi_driver, driver)
527 #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev)
528 
529 /**
530  * mhi_alloc_controller - Allocate the MHI Controller structure
531  * Allocate the mhi_controller structure using zero initialized memory
532  */
533 struct mhi_controller *mhi_alloc_controller(void);
534 
535 /**
536  * mhi_free_controller - Free the MHI Controller structure
537  * Free the mhi_controller structure which was previously allocated
538  */
539 void mhi_free_controller(struct mhi_controller *mhi_cntrl);
540 
541 /**
542  * mhi_register_controller - Register MHI controller
543  * @mhi_cntrl: MHI controller to register
544  * @config: Configuration to use for the controller
545  */
546 int mhi_register_controller(struct mhi_controller *mhi_cntrl,
547 			const struct mhi_controller_config *config);
548 
549 /**
550  * mhi_unregister_controller - Unregister MHI controller
551  * @mhi_cntrl: MHI controller to unregister
552  */
553 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl);
554 
555 /*
556  * module_mhi_driver() - Helper macro for drivers that don't do
557  * anything special other than using default mhi_driver_register() and
558  * mhi_driver_unregister().  This eliminates a lot of boilerplate.
559  * Each module may only use this macro once.
560  */
561 #define module_mhi_driver(mhi_drv) \
562 	module_driver(mhi_drv, mhi_driver_register, \
563 		      mhi_driver_unregister)
564 
565 /*
566  * Macro to avoid include chaining to get THIS_MODULE
567  */
568 #define mhi_driver_register(mhi_drv) \
569 	__mhi_driver_register(mhi_drv, THIS_MODULE)
570 
571 /**
572  * __mhi_driver_register - Register driver with MHI framework
573  * @mhi_drv: Driver associated with the device
574  * @owner: The module owner
575  */
576 int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner);
577 
578 /**
579  * mhi_driver_unregister - Unregister a driver for mhi_devices
580  * @mhi_drv: Driver associated with the device
581  */
582 void mhi_driver_unregister(struct mhi_driver *mhi_drv);
583 
584 /**
585  * mhi_set_mhi_state - Set MHI device state
586  * @mhi_cntrl: MHI controller
587  * @state: State to set
588  */
589 void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
590 		       enum mhi_state state);
591 
592 /**
593  * mhi_notify - Notify the MHI client driver about client device status
594  * @mhi_dev: MHI device instance
595  * @cb_reason: MHI callback reason
596  */
597 void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason);
598 
599 /**
600  * mhi_prepare_for_power_up - Do pre-initialization before power up.
601  *                            This is optional, call this before power up if
602  *                            the controller does not want bus framework to
603  *                            automatically free any allocated memory during
604  *                            shutdown process.
605  * @mhi_cntrl: MHI controller
606  */
607 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl);
608 
609 /**
610  * mhi_async_power_up - Start MHI power up sequence
611  * @mhi_cntrl: MHI controller
612  */
613 int mhi_async_power_up(struct mhi_controller *mhi_cntrl);
614 
615 /**
616  * mhi_sync_power_up - Start MHI power up sequence and wait till the device
617  *                     enters valid EE state
618  * @mhi_cntrl: MHI controller
619  */
620 int mhi_sync_power_up(struct mhi_controller *mhi_cntrl);
621 
622 /**
623  * mhi_power_down - Start MHI power down sequence
624  * @mhi_cntrl: MHI controller
625  * @graceful: Link is still accessible, so do a graceful shutdown process
626  */
627 void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful);
628 
629 /**
630  * mhi_unprepare_after_power_down - Free any allocated memory after power down
631  * @mhi_cntrl: MHI controller
632  */
633 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl);
634 
635 /**
636  * mhi_pm_suspend - Move MHI into a suspended state
637  * @mhi_cntrl: MHI controller
638  */
639 int mhi_pm_suspend(struct mhi_controller *mhi_cntrl);
640 
641 /**
642  * mhi_pm_resume - Resume MHI from suspended state
643  * @mhi_cntrl: MHI controller
644  */
645 int mhi_pm_resume(struct mhi_controller *mhi_cntrl);
646 
647 /**
648  * mhi_download_rddm_img - Download ramdump image from device for
649  *                         debugging purpose.
650  * @mhi_cntrl: MHI controller
651  * @in_panic: Download rddm image during kernel panic
652  */
653 int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic);
654 
655 /**
656  * mhi_force_rddm_mode - Force device into rddm mode
657  * @mhi_cntrl: MHI controller
658  */
659 int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl);
660 
661 /**
662  * mhi_get_mhi_state - Get MHI state of the device
663  * @mhi_cntrl: MHI controller
664  */
665 enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl);
666 
667 /**
668  * mhi_device_get - Disable device low power mode
669  * @mhi_dev: Device associated with the channel
670  */
671 void mhi_device_get(struct mhi_device *mhi_dev);
672 
673 /**
674  * mhi_device_get_sync - Disable device low power mode. Synchronously
675  *                       take the controller out of suspended state
676  * @mhi_dev: Device associated with the channel
677  */
678 int mhi_device_get_sync(struct mhi_device *mhi_dev);
679 
680 /**
681  * mhi_device_put - Re-enable device low power mode
682  * @mhi_dev: Device associated with the channel
683  */
684 void mhi_device_put(struct mhi_device *mhi_dev);
685 
686 /**
687  * mhi_prepare_for_transfer - Setup channel for data transfer
688  * @mhi_dev: Device associated with the channels
689  */
690 int mhi_prepare_for_transfer(struct mhi_device *mhi_dev);
691 
692 /**
693  * mhi_unprepare_from_transfer - Unprepare the channels
694  * @mhi_dev: Device associated with the channels
695  */
696 void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev);
697 
698 /**
699  * mhi_poll - Poll for any available data in DL direction
700  * @mhi_dev: Device associated with the channels
701  * @budget: # of events to process
702  */
703 int mhi_poll(struct mhi_device *mhi_dev, u32 budget);
704 
705 /**
706  * mhi_queue_dma - Send or receive DMA mapped buffers from client device
707  *                 over MHI channel
708  * @mhi_dev: Device associated with the channels
709  * @dir: DMA direction for the channel
710  * @mhi_buf: Buffer for holding the DMA mapped data
711  * @len: Buffer length
712  * @mflags: MHI transfer flags used for the transfer
713  */
714 int mhi_queue_dma(struct mhi_device *mhi_dev, enum dma_data_direction dir,
715 		  struct mhi_buf *mhi_buf, size_t len, enum mhi_flags mflags);
716 
717 /**
718  * mhi_queue_buf - Send or receive raw buffers from client device over MHI
719  *                 channel
720  * @mhi_dev: Device associated with the channels
721  * @dir: DMA direction for the channel
722  * @buf: Buffer for holding the data
723  * @len: Buffer length
724  * @mflags: MHI transfer flags used for the transfer
725  */
726 int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir,
727 		  void *buf, size_t len, enum mhi_flags mflags);
728 
729 /**
730  * mhi_queue_skb - Send or receive SKBs from client device over MHI channel
731  * @mhi_dev: Device associated with the channels
732  * @dir: DMA direction for the channel
733  * @skb: Buffer for holding SKBs
734  * @len: Buffer length
735  * @mflags: MHI transfer flags used for the transfer
736  */
737 int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir,
738 		  struct sk_buff *skb, size_t len, enum mhi_flags mflags);
739 
740 #endif /* _MHI_H_ */
741