1 #include <linux/gfp.h>
2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/swapfile.h>
7 #include <linux/swapops.h>
8 #include <linux/kmemleak.h>
9 #include <linux/sched/task.h>
10
11 #include <asm/set_memory.h>
12 #include <asm/e820/api.h>
13 #include <asm/init.h>
14 #include <asm/page.h>
15 #include <asm/page_types.h>
16 #include <asm/sections.h>
17 #include <asm/setup.h>
18 #include <asm/tlbflush.h>
19 #include <asm/tlb.h>
20 #include <asm/proto.h>
21 #include <asm/dma.h> /* for MAX_DMA_PFN */
22 #include <asm/microcode.h>
23 #include <asm/kaslr.h>
24 #include <asm/hypervisor.h>
25 #include <asm/cpufeature.h>
26 #include <asm/pti.h>
27 #include <asm/text-patching.h>
28 #include <asm/memtype.h>
29
30 /*
31 * We need to define the tracepoints somewhere, and tlb.c
32 * is only compied when SMP=y.
33 */
34 #define CREATE_TRACE_POINTS
35 #include <trace/events/tlb.h>
36
37 #include "mm_internal.h"
38
39 /*
40 * Tables translating between page_cache_type_t and pte encoding.
41 *
42 * The default values are defined statically as minimal supported mode;
43 * WC and WT fall back to UC-. pat_init() updates these values to support
44 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
45 * for the details. Note, __early_ioremap() used during early boot-time
46 * takes pgprot_t (pte encoding) and does not use these tables.
47 *
48 * Index into __cachemode2pte_tbl[] is the cachemode.
49 *
50 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
51 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
52 */
53 static uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
54 [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
55 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
56 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
57 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
58 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
59 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
60 };
61
cachemode2protval(enum page_cache_mode pcm)62 unsigned long cachemode2protval(enum page_cache_mode pcm)
63 {
64 if (likely(pcm == 0))
65 return 0;
66 return __cachemode2pte_tbl[pcm];
67 }
68 EXPORT_SYMBOL(cachemode2protval);
69
70 static uint8_t __pte2cachemode_tbl[8] = {
71 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
72 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
73 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
74 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
75 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
76 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
77 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
78 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
79 };
80
81 /*
82 * Check that the write-protect PAT entry is set for write-protect.
83 * To do this without making assumptions how PAT has been set up (Xen has
84 * another layout than the kernel), translate the _PAGE_CACHE_MODE_WP cache
85 * mode via the __cachemode2pte_tbl[] into protection bits (those protection
86 * bits will select a cache mode of WP or better), and then translate the
87 * protection bits back into the cache mode using __pte2cm_idx() and the
88 * __pte2cachemode_tbl[] array. This will return the really used cache mode.
89 */
x86_has_pat_wp(void)90 bool x86_has_pat_wp(void)
91 {
92 uint16_t prot = __cachemode2pte_tbl[_PAGE_CACHE_MODE_WP];
93
94 return __pte2cachemode_tbl[__pte2cm_idx(prot)] == _PAGE_CACHE_MODE_WP;
95 }
96
pgprot2cachemode(pgprot_t pgprot)97 enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
98 {
99 unsigned long masked;
100
101 masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
102 if (likely(masked == 0))
103 return 0;
104 return __pte2cachemode_tbl[__pte2cm_idx(masked)];
105 }
106
107 static unsigned long __initdata pgt_buf_start;
108 static unsigned long __initdata pgt_buf_end;
109 static unsigned long __initdata pgt_buf_top;
110
111 static unsigned long min_pfn_mapped;
112
113 static bool __initdata can_use_brk_pgt = true;
114
115 /*
116 * Pages returned are already directly mapped.
117 *
118 * Changing that is likely to break Xen, see commit:
119 *
120 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
121 *
122 * for detailed information.
123 */
alloc_low_pages(unsigned int num)124 __ref void *alloc_low_pages(unsigned int num)
125 {
126 unsigned long pfn;
127 int i;
128
129 if (after_bootmem) {
130 unsigned int order;
131
132 order = get_order((unsigned long)num << PAGE_SHIFT);
133 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);
134 }
135
136 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
137 unsigned long ret = 0;
138
139 if (min_pfn_mapped < max_pfn_mapped) {
140 ret = memblock_find_in_range(
141 min_pfn_mapped << PAGE_SHIFT,
142 max_pfn_mapped << PAGE_SHIFT,
143 PAGE_SIZE * num , PAGE_SIZE);
144 }
145 if (ret)
146 memblock_reserve(ret, PAGE_SIZE * num);
147 else if (can_use_brk_pgt)
148 ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE));
149
150 if (!ret)
151 panic("alloc_low_pages: can not alloc memory");
152
153 pfn = ret >> PAGE_SHIFT;
154 } else {
155 pfn = pgt_buf_end;
156 pgt_buf_end += num;
157 }
158
159 for (i = 0; i < num; i++) {
160 void *adr;
161
162 adr = __va((pfn + i) << PAGE_SHIFT);
163 clear_page(adr);
164 }
165
166 return __va(pfn << PAGE_SHIFT);
167 }
168
169 /*
170 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
171 * With KASLR memory randomization, depending on the machine e820 memory
172 * and the PUD alignment. We may need twice more pages when KASLR memory
173 * randomization is enabled.
174 */
175 #ifndef CONFIG_RANDOMIZE_MEMORY
176 #define INIT_PGD_PAGE_COUNT 6
177 #else
178 #define INIT_PGD_PAGE_COUNT 12
179 #endif
180 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
181 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
early_alloc_pgt_buf(void)182 void __init early_alloc_pgt_buf(void)
183 {
184 unsigned long tables = INIT_PGT_BUF_SIZE;
185 phys_addr_t base;
186
187 base = __pa(extend_brk(tables, PAGE_SIZE));
188
189 pgt_buf_start = base >> PAGE_SHIFT;
190 pgt_buf_end = pgt_buf_start;
191 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
192 }
193
194 int after_bootmem;
195
196 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
197
198 struct map_range {
199 unsigned long start;
200 unsigned long end;
201 unsigned page_size_mask;
202 };
203
204 static int page_size_mask;
205
206 /*
207 * Save some of cr4 feature set we're using (e.g. Pentium 4MB
208 * enable and PPro Global page enable), so that any CPU's that boot
209 * up after us can get the correct flags. Invoked on the boot CPU.
210 */
cr4_set_bits_and_update_boot(unsigned long mask)211 static inline void cr4_set_bits_and_update_boot(unsigned long mask)
212 {
213 mmu_cr4_features |= mask;
214 if (trampoline_cr4_features)
215 *trampoline_cr4_features = mmu_cr4_features;
216 cr4_set_bits(mask);
217 }
218
probe_page_size_mask(void)219 static void __init probe_page_size_mask(void)
220 {
221 /*
222 * For pagealloc debugging, identity mapping will use small pages.
223 * This will simplify cpa(), which otherwise needs to support splitting
224 * large pages into small in interrupt context, etc.
225 */
226 if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
227 page_size_mask |= 1 << PG_LEVEL_2M;
228 else
229 direct_gbpages = 0;
230
231 /* Enable PSE if available */
232 if (boot_cpu_has(X86_FEATURE_PSE))
233 cr4_set_bits_and_update_boot(X86_CR4_PSE);
234
235 /* Enable PGE if available */
236 __supported_pte_mask &= ~_PAGE_GLOBAL;
237 if (boot_cpu_has(X86_FEATURE_PGE)) {
238 cr4_set_bits_and_update_boot(X86_CR4_PGE);
239 __supported_pte_mask |= _PAGE_GLOBAL;
240 }
241
242 /* By the default is everything supported: */
243 __default_kernel_pte_mask = __supported_pte_mask;
244 /* Except when with PTI where the kernel is mostly non-Global: */
245 if (cpu_feature_enabled(X86_FEATURE_PTI))
246 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
247
248 /* Enable 1 GB linear kernel mappings if available: */
249 if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
250 printk(KERN_INFO "Using GB pages for direct mapping\n");
251 page_size_mask |= 1 << PG_LEVEL_1G;
252 } else {
253 direct_gbpages = 0;
254 }
255 }
256
setup_pcid(void)257 static void setup_pcid(void)
258 {
259 if (!IS_ENABLED(CONFIG_X86_64))
260 return;
261
262 if (!boot_cpu_has(X86_FEATURE_PCID))
263 return;
264
265 if (boot_cpu_has(X86_FEATURE_PGE)) {
266 /*
267 * This can't be cr4_set_bits_and_update_boot() -- the
268 * trampoline code can't handle CR4.PCIDE and it wouldn't
269 * do any good anyway. Despite the name,
270 * cr4_set_bits_and_update_boot() doesn't actually cause
271 * the bits in question to remain set all the way through
272 * the secondary boot asm.
273 *
274 * Instead, we brute-force it and set CR4.PCIDE manually in
275 * start_secondary().
276 */
277 cr4_set_bits(X86_CR4_PCIDE);
278
279 /*
280 * INVPCID's single-context modes (2/3) only work if we set
281 * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable
282 * on systems that have X86_CR4_PCIDE clear, or that have
283 * no INVPCID support at all.
284 */
285 if (boot_cpu_has(X86_FEATURE_INVPCID))
286 setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE);
287 } else {
288 /*
289 * flush_tlb_all(), as currently implemented, won't work if
290 * PCID is on but PGE is not. Since that combination
291 * doesn't exist on real hardware, there's no reason to try
292 * to fully support it, but it's polite to avoid corrupting
293 * data if we're on an improperly configured VM.
294 */
295 setup_clear_cpu_cap(X86_FEATURE_PCID);
296 }
297 }
298
299 #ifdef CONFIG_X86_32
300 #define NR_RANGE_MR 3
301 #else /* CONFIG_X86_64 */
302 #define NR_RANGE_MR 5
303 #endif
304
save_mr(struct map_range * mr,int nr_range,unsigned long start_pfn,unsigned long end_pfn,unsigned long page_size_mask)305 static int __meminit save_mr(struct map_range *mr, int nr_range,
306 unsigned long start_pfn, unsigned long end_pfn,
307 unsigned long page_size_mask)
308 {
309 if (start_pfn < end_pfn) {
310 if (nr_range >= NR_RANGE_MR)
311 panic("run out of range for init_memory_mapping\n");
312 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
313 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
314 mr[nr_range].page_size_mask = page_size_mask;
315 nr_range++;
316 }
317
318 return nr_range;
319 }
320
321 /*
322 * adjust the page_size_mask for small range to go with
323 * big page size instead small one if nearby are ram too.
324 */
adjust_range_page_size_mask(struct map_range * mr,int nr_range)325 static void __ref adjust_range_page_size_mask(struct map_range *mr,
326 int nr_range)
327 {
328 int i;
329
330 for (i = 0; i < nr_range; i++) {
331 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
332 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
333 unsigned long start = round_down(mr[i].start, PMD_SIZE);
334 unsigned long end = round_up(mr[i].end, PMD_SIZE);
335
336 #ifdef CONFIG_X86_32
337 if ((end >> PAGE_SHIFT) > max_low_pfn)
338 continue;
339 #endif
340
341 if (memblock_is_region_memory(start, end - start))
342 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
343 }
344 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
345 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
346 unsigned long start = round_down(mr[i].start, PUD_SIZE);
347 unsigned long end = round_up(mr[i].end, PUD_SIZE);
348
349 if (memblock_is_region_memory(start, end - start))
350 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
351 }
352 }
353 }
354
page_size_string(struct map_range * mr)355 static const char *page_size_string(struct map_range *mr)
356 {
357 static const char str_1g[] = "1G";
358 static const char str_2m[] = "2M";
359 static const char str_4m[] = "4M";
360 static const char str_4k[] = "4k";
361
362 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
363 return str_1g;
364 /*
365 * 32-bit without PAE has a 4M large page size.
366 * PG_LEVEL_2M is misnamed, but we can at least
367 * print out the right size in the string.
368 */
369 if (IS_ENABLED(CONFIG_X86_32) &&
370 !IS_ENABLED(CONFIG_X86_PAE) &&
371 mr->page_size_mask & (1<<PG_LEVEL_2M))
372 return str_4m;
373
374 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
375 return str_2m;
376
377 return str_4k;
378 }
379
split_mem_range(struct map_range * mr,int nr_range,unsigned long start,unsigned long end)380 static int __meminit split_mem_range(struct map_range *mr, int nr_range,
381 unsigned long start,
382 unsigned long end)
383 {
384 unsigned long start_pfn, end_pfn, limit_pfn;
385 unsigned long pfn;
386 int i;
387
388 limit_pfn = PFN_DOWN(end);
389
390 /* head if not big page alignment ? */
391 pfn = start_pfn = PFN_DOWN(start);
392 #ifdef CONFIG_X86_32
393 /*
394 * Don't use a large page for the first 2/4MB of memory
395 * because there are often fixed size MTRRs in there
396 * and overlapping MTRRs into large pages can cause
397 * slowdowns.
398 */
399 if (pfn == 0)
400 end_pfn = PFN_DOWN(PMD_SIZE);
401 else
402 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
403 #else /* CONFIG_X86_64 */
404 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
405 #endif
406 if (end_pfn > limit_pfn)
407 end_pfn = limit_pfn;
408 if (start_pfn < end_pfn) {
409 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
410 pfn = end_pfn;
411 }
412
413 /* big page (2M) range */
414 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
415 #ifdef CONFIG_X86_32
416 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
417 #else /* CONFIG_X86_64 */
418 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
419 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
420 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
421 #endif
422
423 if (start_pfn < end_pfn) {
424 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
425 page_size_mask & (1<<PG_LEVEL_2M));
426 pfn = end_pfn;
427 }
428
429 #ifdef CONFIG_X86_64
430 /* big page (1G) range */
431 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
432 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
433 if (start_pfn < end_pfn) {
434 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
435 page_size_mask &
436 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
437 pfn = end_pfn;
438 }
439
440 /* tail is not big page (1G) alignment */
441 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
442 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
443 if (start_pfn < end_pfn) {
444 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
445 page_size_mask & (1<<PG_LEVEL_2M));
446 pfn = end_pfn;
447 }
448 #endif
449
450 /* tail is not big page (2M) alignment */
451 start_pfn = pfn;
452 end_pfn = limit_pfn;
453 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
454
455 if (!after_bootmem)
456 adjust_range_page_size_mask(mr, nr_range);
457
458 /* try to merge same page size and continuous */
459 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
460 unsigned long old_start;
461 if (mr[i].end != mr[i+1].start ||
462 mr[i].page_size_mask != mr[i+1].page_size_mask)
463 continue;
464 /* move it */
465 old_start = mr[i].start;
466 memmove(&mr[i], &mr[i+1],
467 (nr_range - 1 - i) * sizeof(struct map_range));
468 mr[i--].start = old_start;
469 nr_range--;
470 }
471
472 for (i = 0; i < nr_range; i++)
473 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
474 mr[i].start, mr[i].end - 1,
475 page_size_string(&mr[i]));
476
477 return nr_range;
478 }
479
480 struct range pfn_mapped[E820_MAX_ENTRIES];
481 int nr_pfn_mapped;
482
add_pfn_range_mapped(unsigned long start_pfn,unsigned long end_pfn)483 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
484 {
485 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
486 nr_pfn_mapped, start_pfn, end_pfn);
487 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
488
489 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
490
491 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
492 max_low_pfn_mapped = max(max_low_pfn_mapped,
493 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
494 }
495
pfn_range_is_mapped(unsigned long start_pfn,unsigned long end_pfn)496 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
497 {
498 int i;
499
500 for (i = 0; i < nr_pfn_mapped; i++)
501 if ((start_pfn >= pfn_mapped[i].start) &&
502 (end_pfn <= pfn_mapped[i].end))
503 return true;
504
505 return false;
506 }
507
508 /*
509 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
510 * This runs before bootmem is initialized and gets pages directly from
511 * the physical memory. To access them they are temporarily mapped.
512 */
init_memory_mapping(unsigned long start,unsigned long end,pgprot_t prot)513 unsigned long __ref init_memory_mapping(unsigned long start,
514 unsigned long end, pgprot_t prot)
515 {
516 struct map_range mr[NR_RANGE_MR];
517 unsigned long ret = 0;
518 int nr_range, i;
519
520 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
521 start, end - 1);
522
523 memset(mr, 0, sizeof(mr));
524 nr_range = split_mem_range(mr, 0, start, end);
525
526 for (i = 0; i < nr_range; i++)
527 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
528 mr[i].page_size_mask,
529 prot);
530
531 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
532
533 return ret >> PAGE_SHIFT;
534 }
535
536 /*
537 * We need to iterate through the E820 memory map and create direct mappings
538 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
539 * create direct mappings for all pfns from [0 to max_low_pfn) and
540 * [4GB to max_pfn) because of possible memory holes in high addresses
541 * that cannot be marked as UC by fixed/variable range MTRRs.
542 * Depending on the alignment of E820 ranges, this may possibly result
543 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
544 *
545 * init_mem_mapping() calls init_range_memory_mapping() with big range.
546 * That range would have hole in the middle or ends, and only ram parts
547 * will be mapped in init_range_memory_mapping().
548 */
init_range_memory_mapping(unsigned long r_start,unsigned long r_end)549 static unsigned long __init init_range_memory_mapping(
550 unsigned long r_start,
551 unsigned long r_end)
552 {
553 unsigned long start_pfn, end_pfn;
554 unsigned long mapped_ram_size = 0;
555 int i;
556
557 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
558 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
559 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
560 if (start >= end)
561 continue;
562
563 /*
564 * if it is overlapping with brk pgt, we need to
565 * alloc pgt buf from memblock instead.
566 */
567 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
568 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
569 init_memory_mapping(start, end, PAGE_KERNEL);
570 mapped_ram_size += end - start;
571 can_use_brk_pgt = true;
572 }
573
574 return mapped_ram_size;
575 }
576
get_new_step_size(unsigned long step_size)577 static unsigned long __init get_new_step_size(unsigned long step_size)
578 {
579 /*
580 * Initial mapped size is PMD_SIZE (2M).
581 * We can not set step_size to be PUD_SIZE (1G) yet.
582 * In worse case, when we cross the 1G boundary, and
583 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
584 * to map 1G range with PTE. Hence we use one less than the
585 * difference of page table level shifts.
586 *
587 * Don't need to worry about overflow in the top-down case, on 32bit,
588 * when step_size is 0, round_down() returns 0 for start, and that
589 * turns it into 0x100000000ULL.
590 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
591 * needs to be taken into consideration by the code below.
592 */
593 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
594 }
595
596 /**
597 * memory_map_top_down - Map [map_start, map_end) top down
598 * @map_start: start address of the target memory range
599 * @map_end: end address of the target memory range
600 *
601 * This function will setup direct mapping for memory range
602 * [map_start, map_end) in top-down. That said, the page tables
603 * will be allocated at the end of the memory, and we map the
604 * memory in top-down.
605 */
memory_map_top_down(unsigned long map_start,unsigned long map_end)606 static void __init memory_map_top_down(unsigned long map_start,
607 unsigned long map_end)
608 {
609 unsigned long real_end, start, last_start;
610 unsigned long step_size;
611 unsigned long addr;
612 unsigned long mapped_ram_size = 0;
613
614 /* xen has big range in reserved near end of ram, skip it at first.*/
615 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
616 real_end = addr + PMD_SIZE;
617
618 /* step_size need to be small so pgt_buf from BRK could cover it */
619 step_size = PMD_SIZE;
620 max_pfn_mapped = 0; /* will get exact value next */
621 min_pfn_mapped = real_end >> PAGE_SHIFT;
622 last_start = start = real_end;
623
624 /*
625 * We start from the top (end of memory) and go to the bottom.
626 * The memblock_find_in_range() gets us a block of RAM from the
627 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
628 * for page table.
629 */
630 while (last_start > map_start) {
631 if (last_start > step_size) {
632 start = round_down(last_start - 1, step_size);
633 if (start < map_start)
634 start = map_start;
635 } else
636 start = map_start;
637 mapped_ram_size += init_range_memory_mapping(start,
638 last_start);
639 last_start = start;
640 min_pfn_mapped = last_start >> PAGE_SHIFT;
641 if (mapped_ram_size >= step_size)
642 step_size = get_new_step_size(step_size);
643 }
644
645 if (real_end < map_end)
646 init_range_memory_mapping(real_end, map_end);
647 }
648
649 /**
650 * memory_map_bottom_up - Map [map_start, map_end) bottom up
651 * @map_start: start address of the target memory range
652 * @map_end: end address of the target memory range
653 *
654 * This function will setup direct mapping for memory range
655 * [map_start, map_end) in bottom-up. Since we have limited the
656 * bottom-up allocation above the kernel, the page tables will
657 * be allocated just above the kernel and we map the memory
658 * in [map_start, map_end) in bottom-up.
659 */
memory_map_bottom_up(unsigned long map_start,unsigned long map_end)660 static void __init memory_map_bottom_up(unsigned long map_start,
661 unsigned long map_end)
662 {
663 unsigned long next, start;
664 unsigned long mapped_ram_size = 0;
665 /* step_size need to be small so pgt_buf from BRK could cover it */
666 unsigned long step_size = PMD_SIZE;
667
668 start = map_start;
669 min_pfn_mapped = start >> PAGE_SHIFT;
670
671 /*
672 * We start from the bottom (@map_start) and go to the top (@map_end).
673 * The memblock_find_in_range() gets us a block of RAM from the
674 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
675 * for page table.
676 */
677 while (start < map_end) {
678 if (step_size && map_end - start > step_size) {
679 next = round_up(start + 1, step_size);
680 if (next > map_end)
681 next = map_end;
682 } else {
683 next = map_end;
684 }
685
686 mapped_ram_size += init_range_memory_mapping(start, next);
687 start = next;
688
689 if (mapped_ram_size >= step_size)
690 step_size = get_new_step_size(step_size);
691 }
692 }
693
694 /*
695 * The real mode trampoline, which is required for bootstrapping CPUs
696 * occupies only a small area under the low 1MB. See reserve_real_mode()
697 * for details.
698 *
699 * If KASLR is disabled the first PGD entry of the direct mapping is copied
700 * to map the real mode trampoline.
701 *
702 * If KASLR is enabled, copy only the PUD which covers the low 1MB
703 * area. This limits the randomization granularity to 1GB for both 4-level
704 * and 5-level paging.
705 */
init_trampoline(void)706 static void __init init_trampoline(void)
707 {
708 #ifdef CONFIG_X86_64
709 if (!kaslr_memory_enabled())
710 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
711 else
712 init_trampoline_kaslr();
713 #endif
714 }
715
init_mem_mapping(void)716 void __init init_mem_mapping(void)
717 {
718 unsigned long end;
719
720 pti_check_boottime_disable();
721 probe_page_size_mask();
722 setup_pcid();
723
724 #ifdef CONFIG_X86_64
725 end = max_pfn << PAGE_SHIFT;
726 #else
727 end = max_low_pfn << PAGE_SHIFT;
728 #endif
729
730 /* the ISA range is always mapped regardless of memory holes */
731 init_memory_mapping(0, ISA_END_ADDRESS, PAGE_KERNEL);
732
733 /* Init the trampoline, possibly with KASLR memory offset */
734 init_trampoline();
735
736 /*
737 * If the allocation is in bottom-up direction, we setup direct mapping
738 * in bottom-up, otherwise we setup direct mapping in top-down.
739 */
740 if (memblock_bottom_up()) {
741 unsigned long kernel_end = __pa_symbol(_end);
742
743 /*
744 * we need two separate calls here. This is because we want to
745 * allocate page tables above the kernel. So we first map
746 * [kernel_end, end) to make memory above the kernel be mapped
747 * as soon as possible. And then use page tables allocated above
748 * the kernel to map [ISA_END_ADDRESS, kernel_end).
749 */
750 memory_map_bottom_up(kernel_end, end);
751 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
752 } else {
753 memory_map_top_down(ISA_END_ADDRESS, end);
754 }
755
756 #ifdef CONFIG_X86_64
757 if (max_pfn > max_low_pfn) {
758 /* can we preseve max_low_pfn ?*/
759 max_low_pfn = max_pfn;
760 }
761 #else
762 early_ioremap_page_table_range_init();
763 #endif
764
765 load_cr3(swapper_pg_dir);
766 __flush_tlb_all();
767
768 x86_init.hyper.init_mem_mapping();
769
770 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
771 }
772
773 /*
774 * Initialize an mm_struct to be used during poking and a pointer to be used
775 * during patching.
776 */
poking_init(void)777 void __init poking_init(void)
778 {
779 spinlock_t *ptl;
780 pte_t *ptep;
781
782 poking_mm = copy_init_mm();
783 BUG_ON(!poking_mm);
784
785 /*
786 * Randomize the poking address, but make sure that the following page
787 * will be mapped at the same PMD. We need 2 pages, so find space for 3,
788 * and adjust the address if the PMD ends after the first one.
789 */
790 poking_addr = TASK_UNMAPPED_BASE;
791 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
792 poking_addr += (kaslr_get_random_long("Poking") & PAGE_MASK) %
793 (TASK_SIZE - TASK_UNMAPPED_BASE - 3 * PAGE_SIZE);
794
795 if (((poking_addr + PAGE_SIZE) & ~PMD_MASK) == 0)
796 poking_addr += PAGE_SIZE;
797
798 /*
799 * We need to trigger the allocation of the page-tables that will be
800 * needed for poking now. Later, poking may be performed in an atomic
801 * section, which might cause allocation to fail.
802 */
803 ptep = get_locked_pte(poking_mm, poking_addr, &ptl);
804 BUG_ON(!ptep);
805 pte_unmap_unlock(ptep, ptl);
806 }
807
808 /*
809 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
810 * is valid. The argument is a physical page number.
811 *
812 * On x86, access has to be given to the first megabyte of RAM because that
813 * area traditionally contains BIOS code and data regions used by X, dosemu,
814 * and similar apps. Since they map the entire memory range, the whole range
815 * must be allowed (for mapping), but any areas that would otherwise be
816 * disallowed are flagged as being "zero filled" instead of rejected.
817 * Access has to be given to non-kernel-ram areas as well, these contain the
818 * PCI mmio resources as well as potential bios/acpi data regions.
819 */
devmem_is_allowed(unsigned long pagenr)820 int devmem_is_allowed(unsigned long pagenr)
821 {
822 if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE,
823 IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
824 != REGION_DISJOINT) {
825 /*
826 * For disallowed memory regions in the low 1MB range,
827 * request that the page be shown as all zeros.
828 */
829 if (pagenr < 256)
830 return 2;
831
832 return 0;
833 }
834
835 /*
836 * This must follow RAM test, since System RAM is considered a
837 * restricted resource under CONFIG_STRICT_IOMEM.
838 */
839 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
840 /* Low 1MB bypasses iomem restrictions. */
841 if (pagenr < 256)
842 return 1;
843
844 return 0;
845 }
846
847 return 1;
848 }
849
free_init_pages(const char * what,unsigned long begin,unsigned long end)850 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
851 {
852 unsigned long begin_aligned, end_aligned;
853
854 /* Make sure boundaries are page aligned */
855 begin_aligned = PAGE_ALIGN(begin);
856 end_aligned = end & PAGE_MASK;
857
858 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
859 begin = begin_aligned;
860 end = end_aligned;
861 }
862
863 if (begin >= end)
864 return;
865
866 /*
867 * If debugging page accesses then do not free this memory but
868 * mark them not present - any buggy init-section access will
869 * create a kernel page fault:
870 */
871 if (debug_pagealloc_enabled()) {
872 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
873 begin, end - 1);
874 /*
875 * Inform kmemleak about the hole in the memory since the
876 * corresponding pages will be unmapped.
877 */
878 kmemleak_free_part((void *)begin, end - begin);
879 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
880 } else {
881 /*
882 * We just marked the kernel text read only above, now that
883 * we are going to free part of that, we need to make that
884 * writeable and non-executable first.
885 */
886 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
887 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
888
889 free_reserved_area((void *)begin, (void *)end,
890 POISON_FREE_INITMEM, what);
891 }
892 }
893
894 /*
895 * begin/end can be in the direct map or the "high kernel mapping"
896 * used for the kernel image only. free_init_pages() will do the
897 * right thing for either kind of address.
898 */
free_kernel_image_pages(const char * what,void * begin,void * end)899 void free_kernel_image_pages(const char *what, void *begin, void *end)
900 {
901 unsigned long begin_ul = (unsigned long)begin;
902 unsigned long end_ul = (unsigned long)end;
903 unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT;
904
905 free_init_pages(what, begin_ul, end_ul);
906
907 /*
908 * PTI maps some of the kernel into userspace. For performance,
909 * this includes some kernel areas that do not contain secrets.
910 * Those areas might be adjacent to the parts of the kernel image
911 * being freed, which may contain secrets. Remove the "high kernel
912 * image mapping" for these freed areas, ensuring they are not even
913 * potentially vulnerable to Meltdown regardless of the specific
914 * optimizations PTI is currently using.
915 *
916 * The "noalias" prevents unmapping the direct map alias which is
917 * needed to access the freed pages.
918 *
919 * This is only valid for 64bit kernels. 32bit has only one mapping
920 * which can't be treated in this way for obvious reasons.
921 */
922 if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI))
923 set_memory_np_noalias(begin_ul, len_pages);
924 }
925
free_initmem(void)926 void __ref free_initmem(void)
927 {
928 e820__reallocate_tables();
929
930 mem_encrypt_free_decrypted_mem();
931
932 free_kernel_image_pages("unused kernel image (initmem)",
933 &__init_begin, &__init_end);
934 }
935
936 #ifdef CONFIG_BLK_DEV_INITRD
free_initrd_mem(unsigned long start,unsigned long end)937 void __init free_initrd_mem(unsigned long start, unsigned long end)
938 {
939 /*
940 * end could be not aligned, and We can not align that,
941 * decompresser could be confused by aligned initrd_end
942 * We already reserve the end partial page before in
943 * - i386_start_kernel()
944 * - x86_64_start_kernel()
945 * - relocate_initrd()
946 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
947 */
948 free_init_pages("initrd", start, PAGE_ALIGN(end));
949 }
950 #endif
951
952 /*
953 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
954 * and pass it to the MM layer - to help it set zone watermarks more
955 * accurately.
956 *
957 * Done on 64-bit systems only for the time being, although 32-bit systems
958 * might benefit from this as well.
959 */
memblock_find_dma_reserve(void)960 void __init memblock_find_dma_reserve(void)
961 {
962 #ifdef CONFIG_X86_64
963 u64 nr_pages = 0, nr_free_pages = 0;
964 unsigned long start_pfn, end_pfn;
965 phys_addr_t start_addr, end_addr;
966 int i;
967 u64 u;
968
969 /*
970 * Iterate over all memory ranges (free and reserved ones alike),
971 * to calculate the total number of pages in the first 16 MB of RAM:
972 */
973 nr_pages = 0;
974 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
975 start_pfn = min(start_pfn, MAX_DMA_PFN);
976 end_pfn = min(end_pfn, MAX_DMA_PFN);
977
978 nr_pages += end_pfn - start_pfn;
979 }
980
981 /*
982 * Iterate over free memory ranges to calculate the number of free
983 * pages in the DMA zone, while not counting potential partial
984 * pages at the beginning or the end of the range:
985 */
986 nr_free_pages = 0;
987 for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) {
988 start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN);
989 end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN);
990
991 if (start_pfn < end_pfn)
992 nr_free_pages += end_pfn - start_pfn;
993 }
994
995 set_dma_reserve(nr_pages - nr_free_pages);
996 #endif
997 }
998
zone_sizes_init(void)999 void __init zone_sizes_init(void)
1000 {
1001 unsigned long max_zone_pfns[MAX_NR_ZONES];
1002
1003 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
1004
1005 #ifdef CONFIG_ZONE_DMA
1006 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
1007 #endif
1008 #ifdef CONFIG_ZONE_DMA32
1009 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
1010 #endif
1011 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
1012 #ifdef CONFIG_HIGHMEM
1013 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
1014 #endif
1015
1016 free_area_init(max_zone_pfns);
1017 }
1018
1019 __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
1020 .loaded_mm = &init_mm,
1021 .next_asid = 1,
1022 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
1023 };
1024
update_cache_mode_entry(unsigned entry,enum page_cache_mode cache)1025 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
1026 {
1027 /* entry 0 MUST be WB (hardwired to speed up translations) */
1028 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
1029
1030 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
1031 __pte2cachemode_tbl[entry] = cache;
1032 }
1033
1034 #ifdef CONFIG_SWAP
max_swapfile_size(void)1035 unsigned long max_swapfile_size(void)
1036 {
1037 unsigned long pages;
1038
1039 pages = generic_max_swapfile_size();
1040
1041 if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) {
1042 /* Limit the swap file size to MAX_PA/2 for L1TF workaround */
1043 unsigned long long l1tf_limit = l1tf_pfn_limit();
1044 /*
1045 * We encode swap offsets also with 3 bits below those for pfn
1046 * which makes the usable limit higher.
1047 */
1048 #if CONFIG_PGTABLE_LEVELS > 2
1049 l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
1050 #endif
1051 pages = min_t(unsigned long long, l1tf_limit, pages);
1052 }
1053 return pages;
1054 }
1055 #endif
1056