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1  /*
2   * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
3   *
4   * Permission to use, copy, modify, and/or distribute this software for any
5   * purpose with or without fee is hereby granted, provided that the above
6   * copyright notice and this permission notice appear in all copies.
7   *
8   * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9   * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10   * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11   * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12   * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13   * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14   * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15   */
16  
17  #ifndef _WCN36XX_H_
18  #define _WCN36XX_H_
19  
20  #include <linux/completion.h>
21  #include <linux/printk.h>
22  #include <linux/spinlock.h>
23  #include <net/mac80211.h>
24  
25  #include "hal.h"
26  #include "smd.h"
27  #include "txrx.h"
28  #include "dxe.h"
29  #include "pmc.h"
30  #include "debug.h"
31  
32  #define WLAN_NV_FILE               "wlan/prima/WCNSS_qcom_wlan_nv.bin"
33  #define WCN36XX_AGGR_BUFFER_SIZE 64
34  
35  extern unsigned int wcn36xx_dbg_mask;
36  
37  enum wcn36xx_debug_mask {
38  	WCN36XX_DBG_DXE		= 0x00000001,
39  	WCN36XX_DBG_DXE_DUMP	= 0x00000002,
40  	WCN36XX_DBG_SMD		= 0x00000004,
41  	WCN36XX_DBG_SMD_DUMP	= 0x00000008,
42  	WCN36XX_DBG_RX		= 0x00000010,
43  	WCN36XX_DBG_RX_DUMP	= 0x00000020,
44  	WCN36XX_DBG_TX		= 0x00000040,
45  	WCN36XX_DBG_TX_DUMP	= 0x00000080,
46  	WCN36XX_DBG_HAL		= 0x00000100,
47  	WCN36XX_DBG_HAL_DUMP	= 0x00000200,
48  	WCN36XX_DBG_MAC		= 0x00000400,
49  	WCN36XX_DBG_BEACON	= 0x00000800,
50  	WCN36XX_DBG_BEACON_DUMP	= 0x00001000,
51  	WCN36XX_DBG_PMC		= 0x00002000,
52  	WCN36XX_DBG_PMC_DUMP	= 0x00004000,
53  	WCN36XX_DBG_TESTMODE		= 0x00008000,
54  	WCN36XX_DBG_TESTMODE_DUMP	= 0x00010000,
55  	WCN36XX_DBG_ANY		= 0xffffffff,
56  };
57  
58  #define wcn36xx_err(fmt, arg...)				\
59  	printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg)
60  
61  #define wcn36xx_warn(fmt, arg...)				\
62  	printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
63  
64  #define wcn36xx_info(fmt, arg...)		\
65  	printk(KERN_INFO pr_fmt(fmt), ##arg)
66  
67  #define wcn36xx_dbg(mask, fmt, arg...) do {			\
68  	if (wcn36xx_dbg_mask & mask)					\
69  		printk(KERN_DEBUG pr_fmt(fmt), ##arg);	\
70  } while (0)
71  
72  #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do {	\
73  	if (wcn36xx_dbg_mask & mask)					\
74  		print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str),	\
75  			       DUMP_PREFIX_OFFSET, 32, 1,	\
76  			       buf, len, false);		\
77  } while (0)
78  
79  enum wcn36xx_ampdu_state {
80  	WCN36XX_AMPDU_NONE,
81  	WCN36XX_AMPDU_INIT,
82  	WCN36XX_AMPDU_START,
83  	WCN36XX_AMPDU_OPERATIONAL,
84  };
85  
86  #define HW_VALUE_PHY_SHIFT 8
87  #define HW_VALUE_PHY(hw_value) ((hw_value) >> HW_VALUE_PHY_SHIFT)
88  #define HW_VALUE_CHANNEL(hw_value) ((hw_value) & 0xFF)
89  #define WCN36XX_HW_CHANNEL(__wcn)\
90  	HW_VALUE_CHANNEL(__wcn->hw->conf.chandef.chan->hw_value)
91  #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
92  #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
93  #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
94  #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
95  #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
96  
97  #define RF_UNKNOWN	0x0000
98  #define RF_IRIS_WCN3620	0x3620
99  #define RF_IRIS_WCN3660	0x3660
100  #define RF_IRIS_WCN3680	0x3680
101  
buff_to_be(u32 * buf,size_t len)102  static inline void buff_to_be(u32 *buf, size_t len)
103  {
104  	int i;
105  	for (i = 0; i < len; i++)
106  		buf[i] = cpu_to_be32(buf[i]);
107  }
108  
109  struct nv_data {
110  	int	is_valid;
111  	u8	table;
112  };
113  
114  /**
115   * struct wcn36xx_vif - holds VIF related fields
116   *
117   * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
118   * HW after first config_bss call and must be used in delete_bss and
119   * enter/exit_bmps.
120   */
121  struct wcn36xx_vif {
122  	struct list_head list;
123  	u8 dtim_period;
124  	enum ani_ed_type encrypt_type;
125  	bool is_joining;
126  	bool sta_assoc;
127  	struct wcn36xx_hal_mac_ssid ssid;
128  	enum wcn36xx_hal_bss_type bss_type;
129  
130  	/* Power management */
131  	enum wcn36xx_power_state pw_state;
132  
133  	u8 bss_index;
134  	/* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
135  	u8 self_sta_index;
136  	u8 self_dpu_desc_index;
137  	u8 self_ucast_dpu_sign;
138  
139  	struct list_head sta_list;
140  };
141  
142  /**
143   * struct wcn36xx_sta - holds STA related fields
144   *
145   * @tid: traffic ID that is used during AMPDU and in TX BD.
146   * @sta_index: STA index is returned from HW after config_sta call and is
147   * used in both SMD channel and TX BD.
148   * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
149   * call and is used in TX BD.
150   * @bss_sta_index: STA index is returned from HW after config_bss call and is
151   * used in both SMD channel and TX BD. See table bellow when it is used.
152   * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
153   * config_bss call and is used in TX BD.
154   * ______________________________________________
155   * |		  |	STA	|	AP	|
156   * |______________|_____________|_______________|
157   * |    TX BD     |bss_sta_index|   sta_index   |
158   * |______________|_____________|_______________|
159   * |all SMD calls |bss_sta_index|   sta_index	|
160   * |______________|_____________|_______________|
161   * |smd_delete_sta|  sta_index  |   sta_index	|
162   * |______________|_____________|_______________|
163   */
164  struct wcn36xx_sta {
165  	struct list_head list;
166  	struct wcn36xx_vif *vif;
167  	u16 aid;
168  	u16 tid;
169  	u8 sta_index;
170  	u8 dpu_desc_index;
171  	u8 ucast_dpu_sign;
172  	u8 bss_sta_index;
173  	u8 bss_dpu_desc_index;
174  	bool is_data_encrypted;
175  	/* Rates */
176  	struct wcn36xx_hal_supported_rates_v1 supported_rates;
177  
178  	spinlock_t ampdu_lock;		/* protects next two fields */
179  	enum wcn36xx_ampdu_state ampdu_state[16];
180  	int non_agg_frame_ct;
181  };
182  struct wcn36xx_dxe_ch;
183  struct wcn36xx {
184  	struct ieee80211_hw	*hw;
185  	struct device		*dev;
186  	struct list_head	vif_list;
187  
188  	const struct firmware	*nv;
189  
190  	u8			fw_revision;
191  	u8			fw_version;
192  	u8			fw_minor;
193  	u8			fw_major;
194  	u32			fw_feat_caps[WCN36XX_HAL_CAPS_SIZE];
195  	bool			is_pronto;
196  
197  	/* extra byte for the NULL termination */
198  	u8			crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
199  	u8			wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
200  
201  	bool		first_boot;
202  
203  	/* IRQs */
204  	int			tx_irq;
205  	int			rx_irq;
206  	void __iomem		*ccu_base;
207  	void __iomem		*dxe_base;
208  
209  	struct rpmsg_endpoint	*smd_channel;
210  
211  	struct qcom_smem_state  *tx_enable_state;
212  	unsigned		tx_enable_state_bit;
213  	struct qcom_smem_state	*tx_rings_empty_state;
214  	unsigned		tx_rings_empty_state_bit;
215  
216  	/* prevents concurrent FW reconfiguration */
217  	struct mutex		conf_mutex;
218  
219  	/*
220  	 * smd_buf must be protected with smd_mutex to garantee
221  	 * that all messages are sent one after another
222  	 */
223  	u8			*hal_buf;
224  	size_t			hal_rsp_len;
225  	struct mutex		hal_mutex;
226  	struct completion	hal_rsp_compl;
227  	struct workqueue_struct	*hal_ind_wq;
228  	struct work_struct	hal_ind_work;
229  	spinlock_t		hal_ind_lock;
230  	struct list_head	hal_ind_queue;
231  
232  	struct cfg80211_scan_request *scan_req;
233  	bool			sw_scan;
234  	u8			sw_scan_opchannel;
235  	bool			sw_scan_init;
236  	u8			sw_scan_channel;
237  	struct ieee80211_vif	*sw_scan_vif;
238  	struct mutex		scan_lock;
239  	bool			scan_aborted;
240  
241  	/* DXE channels */
242  	struct wcn36xx_dxe_ch	dxe_tx_l_ch;	/* TX low */
243  	struct wcn36xx_dxe_ch	dxe_tx_h_ch;	/* TX high */
244  	struct wcn36xx_dxe_ch	dxe_rx_l_ch;	/* RX low */
245  	struct wcn36xx_dxe_ch	dxe_rx_h_ch;	/* RX high */
246  
247  	/* For synchronization of DXE resources from BH, IRQ and WQ contexts */
248  	spinlock_t	dxe_lock;
249  	bool                    queues_stopped;
250  
251  	/* Memory pools */
252  	struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
253  	struct wcn36xx_dxe_mem_pool data_mem_pool;
254  
255  	struct sk_buff		*tx_ack_skb;
256  	struct timer_list	tx_ack_timer;
257  
258  	/* RF module */
259  	unsigned		rf_id;
260  
261  #ifdef CONFIG_WCN36XX_DEBUGFS
262  	/* Debug file system entry */
263  	struct wcn36xx_dfs_entry    dfs;
264  #endif /* CONFIG_WCN36XX_DEBUGFS */
265  
266  };
267  
wcn36xx_is_fw_version(struct wcn36xx * wcn,u8 major,u8 minor,u8 version,u8 revision)268  static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
269  					 u8 major,
270  					 u8 minor,
271  					 u8 version,
272  					 u8 revision)
273  {
274  	return (wcn->fw_major == major &&
275  		wcn->fw_minor == minor &&
276  		wcn->fw_version == version &&
277  		wcn->fw_revision == revision);
278  }
279  void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
280  void wcn36xx_set_default_rates_v1(struct wcn36xx_hal_supported_rates_v1 *rates);
281  
282  static inline
wcn36xx_priv_to_sta(struct wcn36xx_sta * sta_priv)283  struct ieee80211_sta *wcn36xx_priv_to_sta(struct wcn36xx_sta *sta_priv)
284  {
285  	return container_of((void *)sta_priv, struct ieee80211_sta, drv_priv);
286  }
287  
288  static inline
wcn36xx_vif_to_priv(struct ieee80211_vif * vif)289  struct wcn36xx_vif *wcn36xx_vif_to_priv(struct ieee80211_vif *vif)
290  {
291  	return (struct wcn36xx_vif *) vif->drv_priv;
292  }
293  
294  static inline
wcn36xx_priv_to_vif(struct wcn36xx_vif * vif_priv)295  struct ieee80211_vif *wcn36xx_priv_to_vif(struct wcn36xx_vif *vif_priv)
296  {
297  	return container_of((void *) vif_priv, struct ieee80211_vif, drv_priv);
298  }
299  
300  static inline
wcn36xx_sta_to_priv(struct ieee80211_sta * sta)301  struct wcn36xx_sta *wcn36xx_sta_to_priv(struct ieee80211_sta *sta)
302  {
303  	return (struct wcn36xx_sta *)sta->drv_priv;
304  }
305  
306  #endif	/* _WCN36XX_H_ */
307