1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright IBM Corp. 2000, 2009
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
5 * Jan Glauber <jang@linux.vnet.ibm.com>
6 */
7 #ifndef _CIO_QDIO_H
8 #define _CIO_QDIO_H
9
10 #include <asm/page.h>
11 #include <asm/schid.h>
12 #include <asm/debug.h>
13 #include "chsc.h"
14
15 #define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */
16 #define QDIO_BUSY_BIT_RETRY_DELAY 10 /* 10 milliseconds */
17 #define QDIO_BUSY_BIT_RETRIES 1000 /* = 10s retry time */
18
19 enum qdio_irq_states {
20 QDIO_IRQ_STATE_INACTIVE,
21 QDIO_IRQ_STATE_ESTABLISHED,
22 QDIO_IRQ_STATE_ACTIVE,
23 QDIO_IRQ_STATE_STOPPED,
24 QDIO_IRQ_STATE_CLEANUP,
25 QDIO_IRQ_STATE_ERR,
26 NR_QDIO_IRQ_STATES,
27 };
28
29 /* used as intparm in do_IO */
30 #define QDIO_DOING_ESTABLISH 1
31 #define QDIO_DOING_ACTIVATE 2
32 #define QDIO_DOING_CLEANUP 3
33
34 #define SLSB_STATE_NOT_INIT 0x0
35 #define SLSB_STATE_EMPTY 0x1
36 #define SLSB_STATE_PRIMED 0x2
37 #define SLSB_STATE_PENDING 0x3
38 #define SLSB_STATE_HALTED 0xe
39 #define SLSB_STATE_ERROR 0xf
40 #define SLSB_TYPE_INPUT 0x0
41 #define SLSB_TYPE_OUTPUT 0x20
42 #define SLSB_OWNER_PROG 0x80
43 #define SLSB_OWNER_CU 0x40
44
45 #define SLSB_P_INPUT_NOT_INIT \
46 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */
47 #define SLSB_P_INPUT_ACK \
48 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */
49 #define SLSB_CU_INPUT_EMPTY \
50 (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */
51 #define SLSB_P_INPUT_PRIMED \
52 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */
53 #define SLSB_P_INPUT_HALTED \
54 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */
55 #define SLSB_P_INPUT_ERROR \
56 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */
57 #define SLSB_P_OUTPUT_NOT_INIT \
58 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
59 #define SLSB_P_OUTPUT_EMPTY \
60 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */
61 #define SLSB_P_OUTPUT_PENDING \
62 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING) /* 0xa3 */
63 #define SLSB_CU_OUTPUT_PRIMED \
64 (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */
65 #define SLSB_P_OUTPUT_HALTED \
66 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */
67 #define SLSB_P_OUTPUT_ERROR \
68 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */
69
70 #define SLSB_ERROR_DURING_LOOKUP 0xff
71
72 /* additional CIWs returned by extended Sense-ID */
73 #define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
74 #define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
75
76 /* flags for st qdio sch data */
77 #define CHSC_FLAG_QDIO_CAPABILITY 0x80
78 #define CHSC_FLAG_VALIDITY 0x40
79
80 /* SIGA flags */
81 #define QDIO_SIGA_WRITE 0x00
82 #define QDIO_SIGA_READ 0x01
83 #define QDIO_SIGA_SYNC 0x02
84 #define QDIO_SIGA_WRITEM 0x03
85 #define QDIO_SIGA_WRITEQ 0x04
86 #define QDIO_SIGA_QEBSM_FLAG 0x80
87
do_sqbs(u64 token,unsigned char state,int queue,int * start,int * count)88 static inline int do_sqbs(u64 token, unsigned char state, int queue,
89 int *start, int *count)
90 {
91 register unsigned long _ccq asm ("0") = *count;
92 register unsigned long _token asm ("1") = token;
93 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
94
95 asm volatile(
96 " .insn rsy,0xeb000000008A,%1,0,0(%2)"
97 : "+d" (_ccq), "+d" (_queuestart)
98 : "d" ((unsigned long)state), "d" (_token)
99 : "memory", "cc");
100 *count = _ccq & 0xff;
101 *start = _queuestart & 0xff;
102
103 return (_ccq >> 32) & 0xff;
104 }
105
do_eqbs(u64 token,unsigned char * state,int queue,int * start,int * count,int ack)106 static inline int do_eqbs(u64 token, unsigned char *state, int queue,
107 int *start, int *count, int ack)
108 {
109 register unsigned long _ccq asm ("0") = *count;
110 register unsigned long _token asm ("1") = token;
111 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
112 unsigned long _state = (unsigned long)ack << 63;
113
114 asm volatile(
115 " .insn rrf,0xB99c0000,%1,%2,0,0"
116 : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
117 : "d" (_token)
118 : "memory", "cc");
119 *count = _ccq & 0xff;
120 *start = _queuestart & 0xff;
121 *state = _state & 0xff;
122
123 return (_ccq >> 32) & 0xff;
124 }
125
126 struct qdio_irq;
127
128 struct siga_flag {
129 u8 input:1;
130 u8 output:1;
131 u8 sync:1;
132 u8 sync_after_ai:1;
133 u8 sync_out_after_pci:1;
134 u8:3;
135 } __attribute__ ((packed));
136
137 struct qdio_dev_perf_stat {
138 unsigned int adapter_int;
139 unsigned int qdio_int;
140 unsigned int pci_request_int;
141
142 unsigned int tasklet_inbound;
143 unsigned int tasklet_inbound_resched;
144 unsigned int tasklet_inbound_resched2;
145 unsigned int tasklet_outbound;
146
147 unsigned int siga_read;
148 unsigned int siga_write;
149 unsigned int siga_sync;
150
151 unsigned int inbound_call;
152 unsigned int inbound_handler;
153 unsigned int stop_polling;
154 unsigned int inbound_queue_full;
155 unsigned int outbound_call;
156 unsigned int outbound_handler;
157 unsigned int outbound_queue_full;
158 unsigned int fast_requeue;
159 unsigned int target_full;
160 unsigned int eqbs;
161 unsigned int eqbs_partial;
162 unsigned int sqbs;
163 unsigned int sqbs_partial;
164 unsigned int int_discarded;
165 } ____cacheline_aligned;
166
167 struct qdio_queue_perf_stat {
168 /* Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128. */
169 unsigned int nr_sbals[8];
170 unsigned int nr_sbal_error;
171 unsigned int nr_sbal_nop;
172 unsigned int nr_sbal_total;
173 };
174
175 enum qdio_irq_poll_states {
176 QDIO_IRQ_DISABLED,
177 };
178
179 struct qdio_input_q {
180 /* Batch of SBALs that we processed while polling the queue: */
181 unsigned int batch_start;
182 unsigned int batch_count;
183 };
184
185 struct qdio_output_q {
186 /* PCIs are enabled for the queue */
187 int pci_out_enabled;
188 /* cq: use asynchronous output buffers */
189 int use_cq;
190 /* cq: aobs used for particual SBAL */
191 struct qaob **aobs;
192 /* cq: sbal state related to asynchronous operation */
193 struct qdio_outbuf_state *sbal_state;
194 /* timer to check for more outbound work */
195 struct timer_list timer;
196 };
197
198 /*
199 * Note on cache alignment: grouped slsb and write mostly data at the beginning
200 * sbal[] is read-only and starts on a new cacheline followed by read mostly.
201 */
202 struct qdio_q {
203 struct slsb slsb;
204
205 union {
206 struct qdio_input_q in;
207 struct qdio_output_q out;
208 } u;
209
210 /*
211 * inbound: next buffer the program should check for
212 * outbound: next buffer to check if adapter processed it
213 */
214 int first_to_check;
215
216 /* number of buffers in use by the adapter */
217 atomic_t nr_buf_used;
218
219 /* error condition during a data transfer */
220 unsigned int qdio_error;
221
222 /* last scan of the queue */
223 u64 timestamp;
224
225 struct tasklet_struct tasklet;
226 struct qdio_queue_perf_stat q_stats;
227
228 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
229
230 /* queue number */
231 int nr;
232
233 /* bitmask of queue number */
234 int mask;
235
236 /* input or output queue */
237 int is_input_q;
238
239 /* upper-layer program handler */
240 qdio_handler_t (*handler);
241
242 struct qdio_irq *irq_ptr;
243 struct sl *sl;
244 /*
245 * A page is allocated under this pointer and used for slib and sl.
246 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
247 */
248 struct slib *slib;
249 } __attribute__ ((aligned(256)));
250
251 struct qdio_irq {
252 struct qib qib;
253 u32 *dsci; /* address of device state change indicator */
254 struct ccw_device *cdev;
255 struct list_head entry; /* list of thinint devices */
256 struct dentry *debugfs_dev;
257
258 unsigned long int_parm;
259 struct subchannel_id schid;
260 unsigned long sch_token; /* QEBSM facility */
261
262 enum qdio_irq_states state;
263
264 struct siga_flag siga_flag; /* siga sync information from qdioac */
265
266 int nr_input_qs;
267 int nr_output_qs;
268
269 struct ccw1 ccw;
270 struct ciw equeue;
271 struct ciw aqueue;
272
273 struct qdio_ssqd_desc ssqd_desc;
274 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
275
276 unsigned int scan_threshold; /* used SBALs before tasklet schedule */
277 int perf_stat_enabled;
278
279 struct qdr *qdr;
280 unsigned long chsc_page;
281
282 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
283 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
284 unsigned int max_input_qs;
285 unsigned int max_output_qs;
286
287 void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
288 unsigned long poll_state;
289
290 debug_info_t *debug_area;
291 struct mutex setup_mutex;
292 struct qdio_dev_perf_stat perf_stat;
293 };
294
295 /* helper functions */
296 #define queue_type(q) q->irq_ptr->qib.qfmt
297 #define SCH_NO(q) (q->irq_ptr->schid.sch_no)
298
299 #define is_thinint_irq(irq) \
300 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
301 css_general_characteristics.aif_osa)
302
303 #define qperf(__qdev, __attr) ((__qdev)->perf_stat.(__attr))
304
305 #define QDIO_PERF_STAT_INC(__irq, __attr) \
306 ({ \
307 struct qdio_irq *qdev = __irq; \
308 if (qdev->perf_stat_enabled) \
309 (qdev->perf_stat.__attr)++; \
310 })
311
312 #define qperf_inc(__q, __attr) QDIO_PERF_STAT_INC((__q)->irq_ptr, __attr)
313
account_sbals_error(struct qdio_q * q,int count)314 static inline void account_sbals_error(struct qdio_q *q, int count)
315 {
316 q->q_stats.nr_sbal_error += count;
317 q->q_stats.nr_sbal_total += count;
318 }
319
320 /* the highest iqdio queue is used for multicast */
multicast_outbound(struct qdio_q * q)321 static inline int multicast_outbound(struct qdio_q *q)
322 {
323 return (q->irq_ptr->nr_output_qs > 1) &&
324 (q->nr == q->irq_ptr->nr_output_qs - 1);
325 }
326
327 #define pci_out_supported(irq) ((irq)->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
328 #define is_qebsm(q) (q->irq_ptr->sch_token != 0)
329
330 #define need_siga_in(q) (q->irq_ptr->siga_flag.input)
331 #define need_siga_out(q) (q->irq_ptr->siga_flag.output)
332 #define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync))
333 #define need_siga_sync_after_ai(q) \
334 (unlikely(q->irq_ptr->siga_flag.sync_after_ai))
335 #define need_siga_sync_out_after_pci(q) \
336 (unlikely(q->irq_ptr->siga_flag.sync_out_after_pci))
337
338 #define for_each_input_queue(irq_ptr, q, i) \
339 for (i = 0; i < irq_ptr->nr_input_qs && \
340 ({ q = irq_ptr->input_qs[i]; 1; }); i++)
341 #define for_each_output_queue(irq_ptr, q, i) \
342 for (i = 0; i < irq_ptr->nr_output_qs && \
343 ({ q = irq_ptr->output_qs[i]; 1; }); i++)
344
345 #define add_buf(bufnr, inc) QDIO_BUFNR((bufnr) + (inc))
346 #define next_buf(bufnr) add_buf(bufnr, 1)
347 #define sub_buf(bufnr, dec) QDIO_BUFNR((bufnr) - (dec))
348 #define prev_buf(bufnr) sub_buf(bufnr, 1)
349
350 #define queue_irqs_enabled(q) \
351 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0)
352 #define queue_irqs_disabled(q) \
353 (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0)
354
355 extern u64 last_ai_time;
356
357 /* prototypes for thin interrupt */
358 int qdio_establish_thinint(struct qdio_irq *irq_ptr);
359 void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
360 void tiqdio_add_device(struct qdio_irq *irq_ptr);
361 void tiqdio_remove_device(struct qdio_irq *irq_ptr);
362 void tiqdio_inbound_processing(unsigned long q);
363 int qdio_thinint_init(void);
364 void qdio_thinint_exit(void);
365 int test_nonshared_ind(struct qdio_irq *);
366
367 /* prototypes for setup */
368 void qdio_inbound_processing(unsigned long data);
369 void qdio_outbound_processing(unsigned long data);
370 void qdio_outbound_timer(struct timer_list *t);
371 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
372 struct irb *irb);
373 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
374 int nr_output_qs);
375 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
376 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
377 struct subchannel_id *schid,
378 struct qdio_ssqd_desc *data);
379 int qdio_setup_irq(struct qdio_irq *irq_ptr, struct qdio_initialize *init_data);
380 void qdio_shutdown_irq(struct qdio_irq *irq);
381 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr);
382 void qdio_free_queues(struct qdio_irq *irq_ptr);
383 void qdio_free_async_data(struct qdio_irq *irq_ptr);
384 int qdio_setup_init(void);
385 void qdio_setup_exit(void);
386 int qdio_enable_async_operation(struct qdio_output_q *q);
387 void qdio_disable_async_operation(struct qdio_output_q *q);
388 struct qaob *qdio_allocate_aob(void);
389
390 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
391 unsigned char *state);
392 #endif /* _CIO_QDIO_H */
393