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1 /*
2  * Copyright (c) 2021 Huawei Device Co., Ltd.
3  *
4  * HDF is dual licensed: you can use it either under the terms of
5  * the GPL, or the BSD license, at your option.
6  * See the LICENSE file in the root of this repository for complete details.
7  */
8 
9 #ifndef MIPI_CSI_CORE_H
10 #define MIPI_CSI_CORE_H
11 
12 #include "hdf_base.h"
13 #include "hdf_device.h"
14 #include "hdf_device_desc.h"
15 #include "hdf_object.h"
16 #include "mipi_csi_if.h"
17 #include "osal_mutex.h"
18 #include "osal_spinlock.h"
19 
20 #ifdef __cplusplus
21 #if __cplusplus
22 extern "C" {
23 #endif
24 #endif /* __cplusplus */
25 
26 
27 #define MAX_CNTLR_CNT         2
28 #define COMBO_DEV_MAX_NUM     2
29 #define MIPI_RX_MAX_DEV_NUM   2
30 
31 /**
32  * @brief Image size.
33  *
34  * @since 1.0
35  */
36 typedef struct {
37     /** Image width */
38     unsigned int width;
39     /** Image height */
40     unsigned int height;
41 } ImgSize;
42 
43 /**
44  * @brief LP, HS and escape mode switching timeout error.
45  *
46  * @since 1.0
47  */
48 typedef struct {
49     /** Clock1 Lane switching from LP to HS timeout */
50     unsigned int clk1FsmTimeoutErrCnt;
51     /** Clock0 Lane switching from LP to HS timeout */
52     unsigned int clk0FsmTimeoutErrCnt;
53     /** Data lane0 switching from LP to HS timeout */
54     unsigned int d0FsmTimeoutErrCnt;
55     /** Data lane1 switching from LP to HS timeout */
56     unsigned int d1FsmTimeoutErrCnt;
57     /** Data lane2 switching from LP to HS timeout */
58     unsigned int d2FsmTimeoutErrCnt;
59     /** Data lane3 switching from LP to HS timeout */
60     unsigned int d3FsmTimeoutErrCnt;
61 
62     /** Clock1 Lane switching to escape mode timed out */
63     unsigned int clk1FsmEscapeErrCnt;
64     /** Clock0 Lane switching to escape mode timed out */
65     unsigned int clk0FsmEscapeErrCnt;
66     /** Data lane0 switching to escape mode timed out */
67     unsigned int d0FsmEscapeErrCnt;
68     /** Data lane1 switching to escape mode timeout */
69     unsigned int d1FsmEscapeErrCnt;
70     /** Data lane2 switching to escape mode timeout */
71     unsigned int d2FsmEscapeErrCnt;
72     /** Data lane3 switching to escape mode timeout */
73     unsigned int d3FsmEscapeErrCnt;
74 } PhyErrIntCnt;
75 
76 /**
77  * @brief Errors generated during Mipi communication, including data packets,
78  * data frames and read-write control.
79  *
80  * @since 1.0
81  */
82 typedef struct {
83     /** Packet err.
84         Header has at least 2 errors and ECC cannot correct them */
85     unsigned int errEccDoubleCnt;
86     /** CRC redundancy check error count for vc3 channel data */
87     unsigned int vc3ErrCrcCnt;
88     /** CRC redundancy check error count for vc2 channel data */
89     unsigned int vc2ErrCrcCnt;
90     /** CRC redundancy check error count for Vc1 channel data */
91     unsigned int vc1ErrCrcCnt;
92     /** CRC redundancy check error count for vc0 channel data */
93     unsigned int vc0ErrCrcCnt;
94     /** ECC corrected error count for vc3 channel header */
95     unsigned int vc3ErrEccCorrectedCnt;
96     /** ECC corrected error count for vc2 channel header */
97     unsigned int vc2ErrEccCorrectedCnt;
98     /** ECC corrected error count for Vc1 channel header */
99     unsigned int vc1ErrEccCorrectedCnt;
100     /** ECC corrected error count for vc0 channel header */
101     unsigned int vc0ErrEccCorrectedCnt;
102     /** Frame sequence error count of vc3 */
103     unsigned int errIdVc3Cnt;
104     /** Frame sequence error count of vc2 */
105     unsigned int errIdVc2Cnt;
106     /** Frame sequence error count of Vc1 */
107     unsigned int errIdVc1Cnt;
108     /** Frame sequence error count or vc0 */
109     unsigned int errIdVc0Cnt;
110 
111     /** Frame err.
112         Count of data types not supported by vc3 channel */
113     unsigned int errFrameDataVc3Cnt;
114     /** Count of data types not supported by vc2 channel */
115     unsigned int errFrameDataVc2Cnt;
116     /** Count of data types not supported by Vc1 channel */
117     unsigned int errFrameDataVc1Cnt;
118     /** Count of data types not supported by vc0 channel */
119     unsigned int errFrameDataVc0Cnt;
120     /** Frame sequence error count of vc3 */
121     unsigned int errFSeqVc3Cnt;
122     /** Frame sequence error count of vc2 */
123     unsigned int errFSeqVc2Cnt;
124     /** Frame sequence error count of Vc1 */
125     unsigned int errFSeqVc1Cnt;
126     /** Frame sequence error count or vc0 */
127     unsigned int errFSeqVc0Cnt;
128     /** Mismatch count of frame start and frame end short packets of vc3 channel */
129     unsigned int errFBndryMatchVc3Cnt;
130     /** Mismatch count of frame start and frame end short packets of vc2 channel */
131     unsigned int errFBndryMatchVc2Cnt;
132     /** Mismatch count of frame start and frame end short packets of Vc1 channel */
133     unsigned int errFBndryMatchVc1Cnt;
134     /** Count of mismatch between frame start and frame end short packets of vc0 channel */
135     unsigned int errFBndryMatchVc0Cnt;
136 
137     /** Ctrl err.
138         Mipi read data FIFO raw interrupt count */
139     unsigned int dataFifoRderrCnt;
140     /** Mipi read command FIFO raw interrupt count */
141     unsigned int cmdFifoRderrCnt;
142     /** Mipi write data FIFO raw interrupt count */
143     unsigned int dataFifoWrerrCnt;
144     /** Mipi write command FIFO raw interrupt count */
145     unsigned int cmdFifoWrerrCnt;
146 } MipiErrIntCnt;
147 
148 /**
149  * @brief LVDS internal read or write interrupt error.
150  *
151  * @since 1.0
152  */
153 typedef struct {
154     /** CMD_ FIFO register read error interrupt count */
155     unsigned int cmdRdErrCnt;
156     /** CMD_ FIFO register write error interrupt count */
157     unsigned int cmdWrErrCnt;
158     /** Read line_ BUF error interrupt count */
159     unsigned int popErrCnt;
160     /** Synchronization error interrupt count of each lane during LVDS */
161     unsigned int lvdsStateErrCnt;
162     /** Link0 read FIFO error interrupt count */
163     unsigned int link0RdErrCnt;
164     /** Link0 write FIFO error interrupt count */
165     unsigned int link0WrErrCnt;
166 } LvdsErrIntCnt;
167 
168 /**
169  * @brief Internal FIFO alignment error.
170  *
171  * @since 1.0
172  */
173 typedef struct {
174     /** Lane3 FIFO overflow */
175     unsigned int lane3AlignErrCnt;
176     /** Lane2 FIFO overflow */
177     unsigned int lane2AlignErrCnt;
178     /** Lane1 FIFO overflow */
179     unsigned int lane1AlignErrCnt;
180     /** Lane0 FIFO overflow */
181     unsigned int lane0AlignErrCnt;
182     /** FIFO overflow */
183     unsigned int fifoFullErrCnt;
184 } AlignErrIntCnt;
185 
186 /**
187  * @brief Controller context parameter variable.
188  *
189  * @since 1.0
190  */
191 typedef struct {
192     /** Set by {@link MipiCsiSetHsMode} function */
193     LaneDivideMode laneDivideMode;
194     bool hsModeCfged;
195     /** The properties of different types of devices are set through the {@link MipiCsiSetComboDevAttr} function */
196     ComboDevAttr comboDevAttr[COMBO_DEV_MAX_NUM];
197     bool devValid[COMBO_DEV_MAX_NUM];
198     /** Whether the {@link MipiCsiSetComboDevAttr} function is called for parameter setting */
199     bool devCfged[COMBO_DEV_MAX_NUM];
200     unsigned int laneBitmap[COMBO_DEV_MAX_NUM];
201 } MipiDevCtx;
202 
203 /**
204  * @brief Mipi CSI controller attribute and method definition.
205  *
206  * @since 1.0
207  */
208 struct MipiCsiCntlr {
209     /** The services provided by this controller are sent out when the driver is bound to the HDF framework */
210     struct IDeviceIoService service;
211     /** The device side pointer is passed in when the driver binds to the HDF frame */
212     struct HdfDeviceObject *device;
213     /** device number */
214     unsigned int devNo;
215     /** All interfaces provided by the controller */
216     struct MipiCsiCntlrMethod *ops;
217     /** For all interfaces debugged by the controller, null is required when the driver is not implemented */
218     struct MipiCsiCntlrDebugMethod *debugs;
219     /** Controller context parameter variable */
220     MipiDevCtx ctx;
221     /** Lock when accessing controller context parameter variables */
222     OsalSpinlock ctxLock;
223     /** Lock when operating controller method */
224     struct OsalMutex lock;
225     /** Anonymous data pointer, used to store struct mipi_csi_device */
226     void *priv;
227 };
228 
229 /**
230  * @brief All interfaces provided by the MIPI-CSI controller.
231  *
232  * Refer to the corresponding interface declaration for function pointer description.
233  *
234  * @since 1.0
235  */
236 struct MipiCsiCntlrMethod {
237     int32_t (*setComboDevAttr)(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr);
238     int32_t (*setPhyCmvmode)(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode);
239     int32_t (*setExtDataType)(struct MipiCsiCntlr *cntlr, ExtDataType* dataType);
240     int32_t (*setHsMode)(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode);
241     int32_t (*enableClock)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
242     int32_t (*disableClock)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
243     int32_t (*resetRx)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
244     int32_t (*unresetRx)(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
245     int32_t (*enableSensorClock)(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
246     int32_t (*disableSensorClock)(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
247     int32_t (*resetSensor)(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
248     int32_t (*unresetSensor)(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
249     int32_t (*setDrvData)(struct MipiCsiCntlr *cntlr, void *drvData);
250 };
251 
252 /**
253  * @brief For all interfaces debugged by the MIPI-CSI controller, <b>NULL</b> is required when
254  * the driver is not implemented.
255  *
256  * Refer to the corresponding interface declaration for function pointer description.
257  *
258  * @since 1.0
259  */
260 struct MipiCsiCntlrDebugMethod {
261     void (*getMipiDevCtx)(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx);
262     void (*getPhyErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo);
263     void (*getMipiErrInt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo);
264     void (*getLvdsErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo);
265     void (*getAlignErrIntCnt)(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo);
266     void (*getPhyData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
267     void (*getPhyMipiLinkData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
268     void (*getPhyLvdsLinkData)(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
269     void (*getMipiImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
270     void (*getLvdsImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
271     void (*getLvdsLaneImgsizeStatis)(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize);
272 };
273 
274 int32_t MipiCsiRegisterCntlr(struct MipiCsiCntlr *cntlr, struct HdfDeviceObject *device);
275 void MipiCsiUnregisterCntlr(struct MipiCsiCntlr *cntlr);
276 
277 /**
278   * @brief Turn HdfDeviceObject to an MipiCsiCntlr.
279  *
280  * @param device Indicates a HdfDeviceObject.
281  *
282  * @return Retrns the pointer of the MipiCsiCntlr on success; returns NULL otherwise.
283  * @since 1.0
284  */
285 struct MipiCsiCntlr *MipiCsiCntlrFromDevice(const struct HdfDeviceObject *device);
286 
287 /**
288  * @brief Obtains the MIPI CSI device handle with a specified channel ID.
289  *
290  * @param id Indicates the MIPI CSI channel ID.
291  *
292  * @return Returns the MIPI CSI device if the operation is successful; returns <b>NULL</b> otherwise.
293  *
294  * @since 1.0
295  */
296 struct MipiCsiCntlr *MipiCsiCntlrGet(uint8_t id);
297 
298 /**
299  * @brief Releases the MIPI CSI device handle.
300  *
301  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
302  *
303  * @since 1.0
304  */
305 void MipiCsiCntlrPut(const struct MipiCsiCntlr *cntlr);
306 
307 /**
308  * @brief Set the parameters of Mipi, CMOS or LVDS camera to the controller.
309  *
310  * The parameters including working mode, image area, image depth, data rate and physical channel.
311  *
312  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
313  * @param pAttr Indicates the pointer to the attribute.
314  *
315  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
316  *
317  * @since 1.0
318  */
319 int32_t MipiCsiCntlrSetComboDevAttr(struct MipiCsiCntlr *cntlr, ComboDevAttr *pAttr);
320 
321 /**
322  * @brief Set common mode voltage mode.
323  *
324  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
325  * @param devno There are 2 device numbers in total, pointing to 0 or 1.
326  * @param cmvMode Common mode voltage mode parameters.
327  *
328  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
329  *
330  * @since 1.0
331  */
332 int32_t MipiCsiCntlrSetPhyCmvmode(struct MipiCsiCntlr *cntlr, uint8_t devno, PhyCmvMode cmvMode);
333 
334 /**
335  * @brief Reset sensor.
336  *
337  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
338  * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
339  *
340  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
341  *
342  * @since 1.0
343  */
344 int32_t MipiCsiCntlrResetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
345 
346 /**
347  * @brief Unreset sensor.
348  *
349  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
350  * @param snsResetSource The reset signal line number of sensor is called the reset source of sensor in software.
351  *
352  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
353  *
354  * @since 1.0
355  */
356 int32_t MipiCsiCntlrUnresetSensor(struct MipiCsiCntlr *cntlr, uint8_t snsResetSource);
357 
358 /**
359  * @brief Reset Mipi Rx.
360  *
361  * Different s32WorkingViNum have different enSnsType.
362  *
363  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
364  * @param comboDev MIPI RX or LVDS device type.
365  *
366  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
367  *
368  * @since 1.0
369  */
370 int32_t MipiCsiCntlrResetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
371 
372 /**
373  * @brief Uneset MIPI RX.
374  *
375  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
376  * @param comboDev MIPI RX or LVDS device type.
377  *
378  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
379  *
380  * @since 1.0
381  */
382 int32_t MipiCsiCntlrUnresetRx(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
383 
384 /**
385  * @brief Set the lane distribution of Mipi Rx.
386  *
387  * Select the specific mode according to the form of hardware connection.
388  *
389  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
390  * @param laneDivideMode Lane division mode parameters.
391  *
392  * @since 1.0
393  */
394 int32_t MipiCsiCntlrSetHsMode(struct MipiCsiCntlr *cntlr, LaneDivideMode laneDivideMode);
395 
396 /**
397  * @brief Enable Mipi clock.
398  *
399  * Decide whether to use Mipi or LVDS according to the ensnstype parameter
400  * passed by the upper layer function.
401  *
402  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
403  * @param comboDev MIPI RX or LVDS device type.
404  *
405  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
406  *
407  * @since 1.0
408  */
409 int32_t MipiCsiCntlrEnableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
410 
411 /**
412  * @brief Disable the clock of Mipi device.
413  *
414  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
415  * @param comboDev MIPI RX or LVDS device type.
416  *
417  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
418  *
419  * @since 1.0
420  */
421 int32_t MipiCsiCntlrDisableClock(struct MipiCsiCntlr *cntlr, uint8_t comboDev);
422 
423 /**
424  * @brief Enable the sensor clock on Mipi.
425  *
426  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
427  * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
428  *
429  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
430  *
431  * @since 1.0
432  */
433 int32_t MipiCsiCntlrEnableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
434 
435 /**
436  * @brief Disable the sensor clock.
437  *
438  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
439  * @param snsClkSource The clock signal line number of sensor, which is called the clock source of sensor in software.
440  *
441  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
442  *
443  * @since 1.0
444  */
445 int32_t MipiCsiCntlrDisableSensorClock(struct MipiCsiCntlr *cntlr, uint8_t snsClkSource);
446 
447 /**
448  * @brief Set YUV and RAW data format and bit depth.
449  *
450  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
451  * @param dataType Pointer to image data format.
452  *
453  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
454  *
455  * @since 1.0
456  */
457 int32_t MipiCsiCntlrSetExtDataType(struct MipiCsiCntlr *cntlr, ExtDataType* dataType);
458 
459 /**
460  * @brief Sets additional parameters for a MIPI CSI device.
461  *
462  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
463  * @param drvData Indicates the pointer to the additional parameters.
464  *
465  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
466  *
467  * @since 1.0
468  */
469 int32_t MipiCsiCntlrSetDrvData(struct MipiCsiCntlr *cntlr, void *drvData);
470 
471 /**
472  * @brief Get controller context parameter variable for debugging.
473  *
474  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
475  * @param ctx Controller context parameter variable.
476  *
477  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
478  *
479  * @since 1.0
480  */
481 int32_t MipiCsiDebugGetMipiDevCtx(struct MipiCsiCntlr *cntlr, MipiDevCtx *ctx);
482 
483 /**
484  * @brief Get mode switching timeout error for debugging.
485  *
486  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
487  * @param phyId Indicates PHY index.
488  * @param errInfo Indicates mode switching timeout error.
489  *
490  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
491  *
492  * @since 1.0
493  */
494 int32_t MipiCsiDebugGetPhyErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, PhyErrIntCnt *errInfo);
495 
496 /**
497  * @brief Get errors generated during Mipi communication for debugging.
498  *
499  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
500  * @param phyId Indicates PHY index.
501  * @param errInfo Indicates Mipi communication error.
502  *
503  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
504  *
505  * @since 1.0
506  */
507 int32_t MipiCsiDebugGetMipiErrInt(struct MipiCsiCntlr *cntlr, unsigned int phyId, MipiErrIntCnt *errInfo);
508 
509 /**
510  * @brief Get LVDS internal read or write interrupt error for debugging.
511  *
512  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
513  * @param phyId Indicates PHY index.
514  * @param errInfo Indicates LVDS read or write interrupt error.
515  *
516  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
517  *
518  * @since 1.0
519  */
520 int32_t MipiCsiDebugGetLvdsErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, LvdsErrIntCnt *errInfo);
521 
522 /**
523  * @brief Get internal FIFO alignment error for debugging.
524  *
525  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
526  * @param phyId Indicates PHY index.
527  * @param errInfo Indicates FIFO alignment error.
528  *
529  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
530  *
531  * @since 1.0
532  */
533 int32_t MipiCsiDebugGetAlignErrIntCnt(struct MipiCsiCntlr *cntlr, unsigned int phyId, AlignErrIntCnt *errInfo);
534 
535 /**
536  * @brief Get PHY data for debugging.
537  *
538  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
539  * @param phyId Indicates PHY index.
540  * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
541  * @param laneData Indicates a single PHY data.
542  *
543  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
544  *
545  * @since 1.0
546  */
547 int32_t MipiCsiDebugGetPhyData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
548 
549 /**
550  * @brief Get MIPI data for debugging.
551  *
552  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
553  * @param phyId Indicates PHY index.
554  * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
555  * @param laneData Indicates a single MIPI data.
556  *
557  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
558  *
559  * @since 1.0
560  */
561 int32_t MipiCsiDebugGetPhyMipiLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
562 
563 /**
564  * @brief Get LVDS data for debugging.
565  *
566  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
567  * @param phyId Indicates PHY index.
568  * @param laneId Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
569  * @param laneData Indicates a single LVDS data.
570  *
571  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
572  *
573  * @since 1.0
574  */
575 int32_t MipiCsiDebugGetPhyLvdsLinkData(struct MipiCsiCntlr *cntlr, int phyId, int laneId, unsigned int *laneData);
576 
577 /**
578  * @brief Get image size of MIPI for debugging.
579  *
580  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
581  * @param devno There are 2 device numbers in total, pointing to 0 or 1.
582  * @param vc Indicates virtual channel subscript.
583  * @param pSize Pointer to image size.
584  *
585  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
586  *
587  * @since 1.0
588  */
589 int32_t MipiCsiDebugGetMipiImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
590 
591 /**
592  * @brief Get image size of LVDS for debugging.
593  *
594  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
595  * @param devno There are 2 device numbers in total, pointing to 0 or 1.
596  * @param vc Indicates virtual channel subscript.
597  * @param pSize Pointer to image size.
598  *
599  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
600  *
601  * @since 1.0
602  */
603 int32_t MipiCsiDebugGetLvdsImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short vc, ImgSize *pSize);
604 
605 /**
606  * @brief Get image size of LVDS-Lane for debugging.
607  *
608  * @param cntlr Indicates the MIPI CSI device obtained via {@link MipiCsiOpen}.
609  * @param devno There are 2 device numbers in total, pointing to 0 or 1.
610  * @param lane Indicates lane index, and the value range is 0 to <b>COMBO_MAX_LANE_NUM-1</b>.
611  * @param pSize Pointer to image size.
612  *
613  * @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
614  *
615  * @since 1.0
616  */
617 int32_t MipiCsiDebugGetLvdsLaneImgsizeStatis(struct MipiCsiCntlr *cntlr, uint8_t devno, short lane, ImgSize *pSize);
618 
619 #ifdef __cplusplus
620 #if __cplusplus
621 }
622 #endif
623 #endif /* __cplusplus */
624 
625 #endif
626