1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2019-2020 Linaro Ltd.
5 */
6
7 #include <linux/types.h>
8 #include <linux/bits.h>
9 #include <linux/bitfield.h>
10 #include <linux/refcount.h>
11 #include <linux/scatterlist.h>
12 #include <linux/dma-direction.h>
13
14 #include "gsi.h"
15 #include "gsi_private.h"
16 #include "gsi_trans.h"
17 #include "ipa_gsi.h"
18 #include "ipa_data.h"
19 #include "ipa_cmd.h"
20
21 /**
22 * DOC: GSI Transactions
23 *
24 * A GSI transaction abstracts the behavior of a GSI channel by representing
25 * everything about a related group of IPA commands in a single structure.
26 * (A "command" in this sense is either a data transfer or an IPA immediate
27 * command.) Most details of interaction with the GSI hardware are managed
28 * by the GSI transaction core, allowing users to simply describe commands
29 * to be performed. When a transaction has completed a callback function
30 * (dependent on the type of endpoint associated with the channel) allows
31 * cleanup of resources associated with the transaction.
32 *
33 * To perform a command (or set of them), a user of the GSI transaction
34 * interface allocates a transaction, indicating the number of TREs required
35 * (one per command). If sufficient TREs are available, they are reserved
36 * for use in the transaction and the allocation succeeds. This way
37 * exhaustion of the available TREs in a channel ring is detected
38 * as early as possible. All resources required to complete a transaction
39 * are allocated at transaction allocation time.
40 *
41 * Commands performed as part of a transaction are represented in an array
42 * of Linux scatterlist structures. This array is allocated with the
43 * transaction, and its entries are initialized using standard scatterlist
44 * functions (such as sg_set_buf() or skb_to_sgvec()).
45 *
46 * Once a transaction's scatterlist structures have been initialized, the
47 * transaction is committed. The caller is responsible for mapping buffers
48 * for DMA if necessary, and this should be done *before* allocating
49 * the transaction. Between a successful allocation and commit of a
50 * transaction no errors should occur.
51 *
52 * Committing transfers ownership of the entire transaction to the GSI
53 * transaction core. The GSI transaction code formats the content of
54 * the scatterlist array into the channel ring buffer and informs the
55 * hardware that new TREs are available to process.
56 *
57 * The last TRE in each transaction is marked to interrupt the AP when the
58 * GSI hardware has completed it. Because transfers described by TREs are
59 * performed strictly in order, signaling the completion of just the last
60 * TRE in the transaction is sufficient to indicate the full transaction
61 * is complete.
62 *
63 * When a transaction is complete, ipa_gsi_trans_complete() is called by the
64 * GSI code into the IPA layer, allowing it to perform any final cleanup
65 * required before the transaction is freed.
66 */
67
68 /* Hardware values representing a transfer element type */
69 enum gsi_tre_type {
70 GSI_RE_XFER = 0x2,
71 GSI_RE_IMMD_CMD = 0x3,
72 };
73
74 /* An entry in a channel ring */
75 struct gsi_tre {
76 __le64 addr; /* DMA address */
77 __le16 len_opcode; /* length in bytes or enum IPA_CMD_* */
78 __le16 reserved;
79 __le32 flags; /* TRE_FLAGS_* */
80 };
81
82 /* gsi_tre->flags mask values (in CPU byte order) */
83 #define TRE_FLAGS_CHAIN_FMASK GENMASK(0, 0)
84 #define TRE_FLAGS_IEOT_FMASK GENMASK(9, 9)
85 #define TRE_FLAGS_BEI_FMASK GENMASK(10, 10)
86 #define TRE_FLAGS_TYPE_FMASK GENMASK(23, 16)
87
gsi_trans_pool_init(struct gsi_trans_pool * pool,size_t size,u32 count,u32 max_alloc)88 int gsi_trans_pool_init(struct gsi_trans_pool *pool, size_t size, u32 count,
89 u32 max_alloc)
90 {
91 void *virt;
92
93 #ifdef IPA_VALIDATE
94 if (!size || size % 8)
95 return -EINVAL;
96 if (count < max_alloc)
97 return -EINVAL;
98 if (!max_alloc)
99 return -EINVAL;
100 #endif /* IPA_VALIDATE */
101
102 /* By allocating a few extra entries in our pool (one less
103 * than the maximum number that will be requested in a
104 * single allocation), we can always satisfy requests without
105 * ever worrying about straddling the end of the pool array.
106 * If there aren't enough entries starting at the free index,
107 * we just allocate free entries from the beginning of the pool.
108 */
109 virt = kcalloc(count + max_alloc - 1, size, GFP_KERNEL);
110 if (!virt)
111 return -ENOMEM;
112
113 pool->base = virt;
114 /* If the allocator gave us any extra memory, use it */
115 pool->count = ksize(pool->base) / size;
116 pool->free = 0;
117 pool->max_alloc = max_alloc;
118 pool->size = size;
119 pool->addr = 0; /* Only used for DMA pools */
120
121 return 0;
122 }
123
gsi_trans_pool_exit(struct gsi_trans_pool * pool)124 void gsi_trans_pool_exit(struct gsi_trans_pool *pool)
125 {
126 kfree(pool->base);
127 memset(pool, 0, sizeof(*pool));
128 }
129
130 /* Allocate the requested number of (zeroed) entries from the pool */
131 /* Home-grown DMA pool. This way we can preallocate and use the tre_count
132 * to guarantee allocations will succeed. Even though we specify max_alloc
133 * (and it can be more than one), we only allow allocation of a single
134 * element from a DMA pool.
135 */
gsi_trans_pool_init_dma(struct device * dev,struct gsi_trans_pool * pool,size_t size,u32 count,u32 max_alloc)136 int gsi_trans_pool_init_dma(struct device *dev, struct gsi_trans_pool *pool,
137 size_t size, u32 count, u32 max_alloc)
138 {
139 size_t total_size;
140 dma_addr_t addr;
141 void *virt;
142
143 #ifdef IPA_VALIDATE
144 if (!size || size % 8)
145 return -EINVAL;
146 if (count < max_alloc)
147 return -EINVAL;
148 if (!max_alloc)
149 return -EINVAL;
150 #endif /* IPA_VALIDATE */
151
152 /* Don't let allocations cross a power-of-two boundary */
153 size = __roundup_pow_of_two(size);
154 total_size = (count + max_alloc - 1) * size;
155
156 /* The allocator will give us a power-of-2 number of pages
157 * sufficient to satisfy our request. Round up our requested
158 * size to avoid any unused space in the allocation. This way
159 * gsi_trans_pool_exit_dma() can assume the total allocated
160 * size is exactly (count * size).
161 */
162 total_size = get_order(total_size) << PAGE_SHIFT;
163
164 virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL);
165 if (!virt)
166 return -ENOMEM;
167
168 pool->base = virt;
169 pool->count = total_size / size;
170 pool->free = 0;
171 pool->size = size;
172 pool->max_alloc = max_alloc;
173 pool->addr = addr;
174
175 return 0;
176 }
177
gsi_trans_pool_exit_dma(struct device * dev,struct gsi_trans_pool * pool)178 void gsi_trans_pool_exit_dma(struct device *dev, struct gsi_trans_pool *pool)
179 {
180 size_t total_size = pool->count * pool->size;
181
182 dma_free_coherent(dev, total_size, pool->base, pool->addr);
183 memset(pool, 0, sizeof(*pool));
184 }
185
186 /* Return the byte offset of the next free entry in the pool */
gsi_trans_pool_alloc_common(struct gsi_trans_pool * pool,u32 count)187 static u32 gsi_trans_pool_alloc_common(struct gsi_trans_pool *pool, u32 count)
188 {
189 u32 offset;
190
191 /* assert(count > 0); */
192 /* assert(count <= pool->max_alloc); */
193
194 /* Allocate from beginning if wrap would occur */
195 if (count > pool->count - pool->free)
196 pool->free = 0;
197
198 offset = pool->free * pool->size;
199 pool->free += count;
200 memset(pool->base + offset, 0, count * pool->size);
201
202 return offset;
203 }
204
205 /* Allocate a contiguous block of zeroed entries from a pool */
gsi_trans_pool_alloc(struct gsi_trans_pool * pool,u32 count)206 void *gsi_trans_pool_alloc(struct gsi_trans_pool *pool, u32 count)
207 {
208 return pool->base + gsi_trans_pool_alloc_common(pool, count);
209 }
210
211 /* Allocate a single zeroed entry from a DMA pool */
gsi_trans_pool_alloc_dma(struct gsi_trans_pool * pool,dma_addr_t * addr)212 void *gsi_trans_pool_alloc_dma(struct gsi_trans_pool *pool, dma_addr_t *addr)
213 {
214 u32 offset = gsi_trans_pool_alloc_common(pool, 1);
215
216 *addr = pool->addr + offset;
217
218 return pool->base + offset;
219 }
220
221 /* Return the pool element that immediately follows the one given.
222 * This only works done if elements are allocated one at a time.
223 */
gsi_trans_pool_next(struct gsi_trans_pool * pool,void * element)224 void *gsi_trans_pool_next(struct gsi_trans_pool *pool, void *element)
225 {
226 void *end = pool->base + pool->count * pool->size;
227
228 /* assert(element >= pool->base); */
229 /* assert(element < end); */
230 /* assert(pool->max_alloc == 1); */
231 element += pool->size;
232
233 return element < end ? element : pool->base;
234 }
235
236 /* Map a given ring entry index to the transaction associated with it */
gsi_channel_trans_map(struct gsi_channel * channel,u32 index,struct gsi_trans * trans)237 static void gsi_channel_trans_map(struct gsi_channel *channel, u32 index,
238 struct gsi_trans *trans)
239 {
240 /* Note: index *must* be used modulo the ring count here */
241 channel->trans_info.map[index % channel->tre_ring.count] = trans;
242 }
243
244 /* Return the transaction mapped to a given ring entry */
245 struct gsi_trans *
gsi_channel_trans_mapped(struct gsi_channel * channel,u32 index)246 gsi_channel_trans_mapped(struct gsi_channel *channel, u32 index)
247 {
248 /* Note: index *must* be used modulo the ring count here */
249 return channel->trans_info.map[index % channel->tre_ring.count];
250 }
251
252 /* Return the oldest completed transaction for a channel (or null) */
gsi_channel_trans_complete(struct gsi_channel * channel)253 struct gsi_trans *gsi_channel_trans_complete(struct gsi_channel *channel)
254 {
255 return list_first_entry_or_null(&channel->trans_info.complete,
256 struct gsi_trans, links);
257 }
258
259 /* Move a transaction from the allocated list to the pending list */
gsi_trans_move_pending(struct gsi_trans * trans)260 static void gsi_trans_move_pending(struct gsi_trans *trans)
261 {
262 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
263 struct gsi_trans_info *trans_info = &channel->trans_info;
264
265 spin_lock_bh(&trans_info->spinlock);
266
267 list_move_tail(&trans->links, &trans_info->pending);
268
269 spin_unlock_bh(&trans_info->spinlock);
270 }
271
272 /* Move a transaction and all of its predecessors from the pending list
273 * to the completed list.
274 */
gsi_trans_move_complete(struct gsi_trans * trans)275 void gsi_trans_move_complete(struct gsi_trans *trans)
276 {
277 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
278 struct gsi_trans_info *trans_info = &channel->trans_info;
279 struct list_head list;
280
281 spin_lock_bh(&trans_info->spinlock);
282
283 /* Move this transaction and all predecessors to completed list */
284 list_cut_position(&list, &trans_info->pending, &trans->links);
285 list_splice_tail(&list, &trans_info->complete);
286
287 spin_unlock_bh(&trans_info->spinlock);
288 }
289
290 /* Move a transaction from the completed list to the polled list */
gsi_trans_move_polled(struct gsi_trans * trans)291 void gsi_trans_move_polled(struct gsi_trans *trans)
292 {
293 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
294 struct gsi_trans_info *trans_info = &channel->trans_info;
295
296 spin_lock_bh(&trans_info->spinlock);
297
298 list_move_tail(&trans->links, &trans_info->polled);
299
300 spin_unlock_bh(&trans_info->spinlock);
301 }
302
303 /* Reserve some number of TREs on a channel. Returns true if successful */
304 static bool
gsi_trans_tre_reserve(struct gsi_trans_info * trans_info,u32 tre_count)305 gsi_trans_tre_reserve(struct gsi_trans_info *trans_info, u32 tre_count)
306 {
307 int avail = atomic_read(&trans_info->tre_avail);
308 int new;
309
310 do {
311 new = avail - (int)tre_count;
312 if (unlikely(new < 0))
313 return false;
314 } while (!atomic_try_cmpxchg(&trans_info->tre_avail, &avail, new));
315
316 return true;
317 }
318
319 /* Release previously-reserved TRE entries to a channel */
320 static void
gsi_trans_tre_release(struct gsi_trans_info * trans_info,u32 tre_count)321 gsi_trans_tre_release(struct gsi_trans_info *trans_info, u32 tre_count)
322 {
323 atomic_add(tre_count, &trans_info->tre_avail);
324 }
325
326 /* Allocate a GSI transaction on a channel */
gsi_channel_trans_alloc(struct gsi * gsi,u32 channel_id,u32 tre_count,enum dma_data_direction direction)327 struct gsi_trans *gsi_channel_trans_alloc(struct gsi *gsi, u32 channel_id,
328 u32 tre_count,
329 enum dma_data_direction direction)
330 {
331 struct gsi_channel *channel = &gsi->channel[channel_id];
332 struct gsi_trans_info *trans_info;
333 struct gsi_trans *trans;
334
335 /* assert(tre_count <= gsi_channel_trans_tre_max(gsi, channel_id)); */
336
337 trans_info = &channel->trans_info;
338
339 /* We reserve the TREs now, but consume them at commit time.
340 * If there aren't enough available, we're done.
341 */
342 if (!gsi_trans_tre_reserve(trans_info, tre_count))
343 return NULL;
344
345 /* Allocate and initialize non-zero fields in the the transaction */
346 trans = gsi_trans_pool_alloc(&trans_info->pool, 1);
347 trans->gsi = gsi;
348 trans->channel_id = channel_id;
349 trans->tre_count = tre_count;
350 init_completion(&trans->completion);
351
352 /* Allocate the scatterlist and (if requested) info entries. */
353 trans->sgl = gsi_trans_pool_alloc(&trans_info->sg_pool, tre_count);
354 sg_init_marker(trans->sgl, tre_count);
355
356 trans->direction = direction;
357
358 spin_lock_bh(&trans_info->spinlock);
359
360 list_add_tail(&trans->links, &trans_info->alloc);
361
362 spin_unlock_bh(&trans_info->spinlock);
363
364 refcount_set(&trans->refcount, 1);
365
366 return trans;
367 }
368
369 /* Free a previously-allocated transaction */
gsi_trans_free(struct gsi_trans * trans)370 void gsi_trans_free(struct gsi_trans *trans)
371 {
372 refcount_t *refcount = &trans->refcount;
373 struct gsi_trans_info *trans_info;
374 bool last;
375
376 /* We must hold the lock to release the last reference */
377 if (refcount_dec_not_one(refcount))
378 return;
379
380 trans_info = &trans->gsi->channel[trans->channel_id].trans_info;
381
382 spin_lock_bh(&trans_info->spinlock);
383
384 /* Reference might have been added before we got the lock */
385 last = refcount_dec_and_test(refcount);
386 if (last)
387 list_del(&trans->links);
388
389 spin_unlock_bh(&trans_info->spinlock);
390
391 if (!last)
392 return;
393
394 ipa_gsi_trans_release(trans);
395
396 /* Releasing the reserved TREs implicitly frees the sgl[] and
397 * (if present) info[] arrays, plus the transaction itself.
398 */
399 gsi_trans_tre_release(trans_info, trans->tre_count);
400 }
401
402 /* Add an immediate command to a transaction */
gsi_trans_cmd_add(struct gsi_trans * trans,void * buf,u32 size,dma_addr_t addr,enum dma_data_direction direction,enum ipa_cmd_opcode opcode)403 void gsi_trans_cmd_add(struct gsi_trans *trans, void *buf, u32 size,
404 dma_addr_t addr, enum dma_data_direction direction,
405 enum ipa_cmd_opcode opcode)
406 {
407 struct ipa_cmd_info *info;
408 u32 which = trans->used++;
409 struct scatterlist *sg;
410
411 /* assert(which < trans->tre_count); */
412
413 /* Commands are quite different from data transfer requests.
414 * Their payloads come from a pool whose memory is allocated
415 * using dma_alloc_coherent(). We therefore do *not* map them
416 * for DMA (unlike what we do for pages and skbs).
417 *
418 * When a transaction completes, the SGL is normally unmapped.
419 * A command transaction has direction DMA_NONE, which tells
420 * gsi_trans_complete() to skip the unmapping step.
421 *
422 * The only things we use directly in a command scatter/gather
423 * entry are the DMA address and length. We still need the SG
424 * table flags to be maintained though, so assign a NULL page
425 * pointer for that purpose.
426 */
427 sg = &trans->sgl[which];
428 sg_assign_page(sg, NULL);
429 sg_dma_address(sg) = addr;
430 sg_dma_len(sg) = size;
431
432 info = &trans->info[which];
433 info->opcode = opcode;
434 info->direction = direction;
435 }
436
437 /* Add a page transfer to a transaction. It will fill the only TRE. */
gsi_trans_page_add(struct gsi_trans * trans,struct page * page,u32 size,u32 offset)438 int gsi_trans_page_add(struct gsi_trans *trans, struct page *page, u32 size,
439 u32 offset)
440 {
441 struct scatterlist *sg = &trans->sgl[0];
442 int ret;
443
444 /* assert(trans->tre_count == 1); */
445 /* assert(!trans->used); */
446
447 sg_set_page(sg, page, size, offset);
448 ret = dma_map_sg(trans->gsi->dev, sg, 1, trans->direction);
449 if (!ret)
450 return -ENOMEM;
451
452 trans->used++; /* Transaction now owns the (DMA mapped) page */
453
454 return 0;
455 }
456
457 /* Add an SKB transfer to a transaction. No other TREs will be used. */
gsi_trans_skb_add(struct gsi_trans * trans,struct sk_buff * skb)458 int gsi_trans_skb_add(struct gsi_trans *trans, struct sk_buff *skb)
459 {
460 struct scatterlist *sg = &trans->sgl[0];
461 u32 used;
462 int ret;
463
464 /* assert(trans->tre_count == 1); */
465 /* assert(!trans->used); */
466
467 /* skb->len will not be 0 (checked early) */
468 ret = skb_to_sgvec(skb, sg, 0, skb->len);
469 if (ret < 0)
470 return ret;
471 used = ret;
472
473 ret = dma_map_sg(trans->gsi->dev, sg, used, trans->direction);
474 if (!ret)
475 return -ENOMEM;
476
477 trans->used += used; /* Transaction now owns the (DMA mapped) skb */
478
479 return 0;
480 }
481
482 /* Compute the length/opcode value to use for a TRE */
gsi_tre_len_opcode(enum ipa_cmd_opcode opcode,u32 len)483 static __le16 gsi_tre_len_opcode(enum ipa_cmd_opcode opcode, u32 len)
484 {
485 return opcode == IPA_CMD_NONE ? cpu_to_le16((u16)len)
486 : cpu_to_le16((u16)opcode);
487 }
488
489 /* Compute the flags value to use for a given TRE */
gsi_tre_flags(bool last_tre,bool bei,enum ipa_cmd_opcode opcode)490 static __le32 gsi_tre_flags(bool last_tre, bool bei, enum ipa_cmd_opcode opcode)
491 {
492 enum gsi_tre_type tre_type;
493 u32 tre_flags;
494
495 tre_type = opcode == IPA_CMD_NONE ? GSI_RE_XFER : GSI_RE_IMMD_CMD;
496 tre_flags = u32_encode_bits(tre_type, TRE_FLAGS_TYPE_FMASK);
497
498 /* Last TRE contains interrupt flags */
499 if (last_tre) {
500 /* All transactions end in a transfer completion interrupt */
501 tre_flags |= TRE_FLAGS_IEOT_FMASK;
502 /* Don't interrupt when outbound commands are acknowledged */
503 if (bei)
504 tre_flags |= TRE_FLAGS_BEI_FMASK;
505 } else { /* All others indicate there's more to come */
506 tre_flags |= TRE_FLAGS_CHAIN_FMASK;
507 }
508
509 return cpu_to_le32(tre_flags);
510 }
511
gsi_trans_tre_fill(struct gsi_tre * dest_tre,dma_addr_t addr,u32 len,bool last_tre,bool bei,enum ipa_cmd_opcode opcode)512 static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr,
513 u32 len, bool last_tre, bool bei,
514 enum ipa_cmd_opcode opcode)
515 {
516 struct gsi_tre tre;
517
518 tre.addr = cpu_to_le64(addr);
519 tre.len_opcode = gsi_tre_len_opcode(opcode, len);
520 tre.reserved = 0;
521 tre.flags = gsi_tre_flags(last_tre, bei, opcode);
522
523 /* ARM64 can write 16 bytes as a unit with a single instruction.
524 * Doing the assignment this way is an attempt to make that happen.
525 */
526 *dest_tre = tre;
527 }
528
529 /**
530 * __gsi_trans_commit() - Common GSI transaction commit code
531 * @trans: Transaction to commit
532 * @ring_db: Whether to tell the hardware about these queued transfers
533 *
534 * Formats channel ring TRE entries based on the content of the scatterlist.
535 * Maps a transaction pointer to the last ring entry used for the transaction,
536 * so it can be recovered when it completes. Moves the transaction to the
537 * pending list. Finally, updates the channel ring pointer and optionally
538 * rings the doorbell.
539 */
__gsi_trans_commit(struct gsi_trans * trans,bool ring_db)540 static void __gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
541 {
542 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
543 struct gsi_ring *ring = &channel->tre_ring;
544 enum ipa_cmd_opcode opcode = IPA_CMD_NONE;
545 bool bei = channel->toward_ipa;
546 struct ipa_cmd_info *info;
547 struct gsi_tre *dest_tre;
548 struct scatterlist *sg;
549 u32 byte_count = 0;
550 u32 avail;
551 u32 i;
552
553 /* assert(trans->used > 0); */
554
555 /* Consume the entries. If we cross the end of the ring while
556 * filling them we'll switch to the beginning to finish.
557 * If there is no info array we're doing a simple data
558 * transfer request, whose opcode is IPA_CMD_NONE.
559 */
560 info = trans->info ? &trans->info[0] : NULL;
561 avail = ring->count - ring->index % ring->count;
562 dest_tre = gsi_ring_virt(ring, ring->index);
563 for_each_sg(trans->sgl, sg, trans->used, i) {
564 bool last_tre = i == trans->used - 1;
565 dma_addr_t addr = sg_dma_address(sg);
566 u32 len = sg_dma_len(sg);
567
568 byte_count += len;
569 if (!avail--)
570 dest_tre = gsi_ring_virt(ring, 0);
571 if (info)
572 opcode = info++->opcode;
573
574 gsi_trans_tre_fill(dest_tre, addr, len, last_tre, bei, opcode);
575 dest_tre++;
576 }
577 ring->index += trans->used;
578
579 if (channel->toward_ipa) {
580 /* We record TX bytes when they are sent */
581 trans->len = byte_count;
582 trans->trans_count = channel->trans_count;
583 trans->byte_count = channel->byte_count;
584 channel->trans_count++;
585 channel->byte_count += byte_count;
586 }
587
588 /* Associate the last TRE with the transaction */
589 gsi_channel_trans_map(channel, ring->index - 1, trans);
590
591 gsi_trans_move_pending(trans);
592
593 /* Ring doorbell if requested, or if all TREs are allocated */
594 if (ring_db || !atomic_read(&channel->trans_info.tre_avail)) {
595 /* Report what we're handing off to hardware for TX channels */
596 if (channel->toward_ipa)
597 gsi_channel_tx_queued(channel);
598 gsi_channel_doorbell(channel);
599 }
600 }
601
602 /* Commit a GSI transaction */
gsi_trans_commit(struct gsi_trans * trans,bool ring_db)603 void gsi_trans_commit(struct gsi_trans *trans, bool ring_db)
604 {
605 if (trans->used)
606 __gsi_trans_commit(trans, ring_db);
607 else
608 gsi_trans_free(trans);
609 }
610
611 /* Commit a GSI transaction and wait for it to complete */
gsi_trans_commit_wait(struct gsi_trans * trans)612 void gsi_trans_commit_wait(struct gsi_trans *trans)
613 {
614 if (!trans->used)
615 goto out_trans_free;
616
617 refcount_inc(&trans->refcount);
618
619 __gsi_trans_commit(trans, true);
620
621 wait_for_completion(&trans->completion);
622
623 out_trans_free:
624 gsi_trans_free(trans);
625 }
626
627 /* Commit a GSI transaction and wait for it to complete, with timeout */
gsi_trans_commit_wait_timeout(struct gsi_trans * trans,unsigned long timeout)628 int gsi_trans_commit_wait_timeout(struct gsi_trans *trans,
629 unsigned long timeout)
630 {
631 unsigned long timeout_jiffies = msecs_to_jiffies(timeout);
632 unsigned long remaining = 1; /* In case of empty transaction */
633
634 if (!trans->used)
635 goto out_trans_free;
636
637 refcount_inc(&trans->refcount);
638
639 __gsi_trans_commit(trans, true);
640
641 remaining = wait_for_completion_timeout(&trans->completion,
642 timeout_jiffies);
643 out_trans_free:
644 gsi_trans_free(trans);
645
646 return remaining ? 0 : -ETIMEDOUT;
647 }
648
649 /* Process the completion of a transaction; called while polling */
gsi_trans_complete(struct gsi_trans * trans)650 void gsi_trans_complete(struct gsi_trans *trans)
651 {
652 /* If the entire SGL was mapped when added, unmap it now */
653 if (trans->direction != DMA_NONE)
654 dma_unmap_sg(trans->gsi->dev, trans->sgl, trans->used,
655 trans->direction);
656
657 ipa_gsi_trans_complete(trans);
658
659 complete(&trans->completion);
660
661 gsi_trans_free(trans);
662 }
663
664 /* Cancel a channel's pending transactions */
gsi_channel_trans_cancel_pending(struct gsi_channel * channel)665 void gsi_channel_trans_cancel_pending(struct gsi_channel *channel)
666 {
667 struct gsi_trans_info *trans_info = &channel->trans_info;
668 struct gsi_trans *trans;
669 bool cancelled;
670
671 /* channel->gsi->mutex is held by caller */
672 spin_lock_bh(&trans_info->spinlock);
673
674 cancelled = !list_empty(&trans_info->pending);
675 list_for_each_entry(trans, &trans_info->pending, links)
676 trans->cancelled = true;
677
678 list_splice_tail_init(&trans_info->pending, &trans_info->complete);
679
680 spin_unlock_bh(&trans_info->spinlock);
681
682 /* Schedule NAPI polling to complete the cancelled transactions */
683 if (cancelled)
684 napi_schedule(&channel->napi);
685 }
686
687 /* Issue a command to read a single byte from a channel */
gsi_trans_read_byte(struct gsi * gsi,u32 channel_id,dma_addr_t addr)688 int gsi_trans_read_byte(struct gsi *gsi, u32 channel_id, dma_addr_t addr)
689 {
690 struct gsi_channel *channel = &gsi->channel[channel_id];
691 struct gsi_ring *ring = &channel->tre_ring;
692 struct gsi_trans_info *trans_info;
693 struct gsi_tre *dest_tre;
694
695 trans_info = &channel->trans_info;
696
697 /* First reserve the TRE, if possible */
698 if (!gsi_trans_tre_reserve(trans_info, 1))
699 return -EBUSY;
700
701 /* Now fill the the reserved TRE and tell the hardware */
702
703 dest_tre = gsi_ring_virt(ring, ring->index);
704 gsi_trans_tre_fill(dest_tre, addr, 1, true, false, IPA_CMD_NONE);
705
706 ring->index++;
707 gsi_channel_doorbell(channel);
708
709 return 0;
710 }
711
712 /* Mark a gsi_trans_read_byte() request done */
gsi_trans_read_byte_done(struct gsi * gsi,u32 channel_id)713 void gsi_trans_read_byte_done(struct gsi *gsi, u32 channel_id)
714 {
715 struct gsi_channel *channel = &gsi->channel[channel_id];
716
717 gsi_trans_tre_release(&channel->trans_info, 1);
718 }
719
720 /* Initialize a channel's GSI transaction info */
gsi_channel_trans_init(struct gsi * gsi,u32 channel_id)721 int gsi_channel_trans_init(struct gsi *gsi, u32 channel_id)
722 {
723 struct gsi_channel *channel = &gsi->channel[channel_id];
724 struct gsi_trans_info *trans_info;
725 u32 tre_max;
726 int ret;
727
728 /* Ensure the size of a channel element is what's expected */
729 BUILD_BUG_ON(sizeof(struct gsi_tre) != GSI_RING_ELEMENT_SIZE);
730
731 /* The map array is used to determine what transaction is associated
732 * with a TRE that the hardware reports has completed. We need one
733 * map entry per TRE.
734 */
735 trans_info = &channel->trans_info;
736 trans_info->map = kcalloc(channel->tre_count, sizeof(*trans_info->map),
737 GFP_KERNEL);
738 if (!trans_info->map)
739 return -ENOMEM;
740
741 /* We can't use more TREs than there are available in the ring.
742 * This limits the number of transactions that can be oustanding.
743 * Worst case is one TRE per transaction (but we actually limit
744 * it to something a little less than that). We allocate resources
745 * for transactions (including transaction structures) based on
746 * this maximum number.
747 */
748 tre_max = gsi_channel_tre_max(channel->gsi, channel_id);
749
750 /* Transactions are allocated one at a time. */
751 ret = gsi_trans_pool_init(&trans_info->pool, sizeof(struct gsi_trans),
752 tre_max, 1);
753 if (ret)
754 goto err_kfree;
755
756 /* A transaction uses a scatterlist array to represent the data
757 * transfers implemented by the transaction. Each scatterlist
758 * element is used to fill a single TRE when the transaction is
759 * committed. So we need as many scatterlist elements as the
760 * maximum number of TREs that can be outstanding.
761 *
762 * All TREs in a transaction must fit within the channel's TLV FIFO.
763 * A transaction on a channel can allocate as many TREs as that but
764 * no more.
765 */
766 ret = gsi_trans_pool_init(&trans_info->sg_pool,
767 sizeof(struct scatterlist),
768 tre_max, channel->tlv_count);
769 if (ret)
770 goto err_trans_pool_exit;
771
772 /* Finally, the tre_avail field is what ultimately limits the number
773 * of outstanding transactions and their resources. A transaction
774 * allocation succeeds only if the TREs available are sufficient for
775 * what the transaction might need. Transaction resource pools are
776 * sized based on the maximum number of outstanding TREs, so there
777 * will always be resources available if there are TREs available.
778 */
779 atomic_set(&trans_info->tre_avail, tre_max);
780
781 spin_lock_init(&trans_info->spinlock);
782 INIT_LIST_HEAD(&trans_info->alloc);
783 INIT_LIST_HEAD(&trans_info->pending);
784 INIT_LIST_HEAD(&trans_info->complete);
785 INIT_LIST_HEAD(&trans_info->polled);
786
787 return 0;
788
789 err_trans_pool_exit:
790 gsi_trans_pool_exit(&trans_info->pool);
791 err_kfree:
792 kfree(trans_info->map);
793
794 dev_err(gsi->dev, "error %d initializing channel %u transactions\n",
795 ret, channel_id);
796
797 return ret;
798 }
799
800 /* Inverse of gsi_channel_trans_init() */
gsi_channel_trans_exit(struct gsi_channel * channel)801 void gsi_channel_trans_exit(struct gsi_channel *channel)
802 {
803 struct gsi_trans_info *trans_info = &channel->trans_info;
804
805 gsi_trans_pool_exit(&trans_info->sg_pool);
806 gsi_trans_pool_exit(&trans_info->pool);
807 kfree(trans_info->map);
808 }
809