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1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 //	    Rander Wang <rander.wang@intel.com>
11 //          Keyon Jie <yang.jie@linux.intel.com>
12 //
13 
14 /*
15  * Hardware interface for generic Intel audio DSP HDA IP
16  */
17 
18 #include <sound/hdaudio_ext.h>
19 #include <sound/hda_register.h>
20 
21 #include <linux/acpi.h>
22 #include <linux/module.h>
23 #include <linux/soundwire/sdw.h>
24 #include <linux/soundwire/sdw_intel.h>
25 #include <sound/intel-nhlt.h>
26 #include <sound/sof.h>
27 #include <sound/sof/xtensa.h>
28 #include "../sof-audio.h"
29 #include "../ops.h"
30 #include "hda.h"
31 
32 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
33 #include <sound/soc-acpi-intel-match.h>
34 #endif
35 
36 /* platform specific devices */
37 #include "shim.h"
38 
39 #define EXCEPT_MAX_HDR_SIZE	0x400
40 #define HDA_EXT_ROM_STATUS_SIZE 8
41 
42 static const struct sof_intel_dsp_desc
get_chip_info(struct snd_sof_pdata * pdata)43 	*get_chip_info(struct snd_sof_pdata *pdata)
44 {
45 	const struct sof_dev_desc *desc = pdata->desc;
46 	const struct sof_intel_dsp_desc *chip_info;
47 
48 	chip_info = desc->chip_info;
49 
50 	return chip_info;
51 }
52 
53 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
54 
55 /*
56  * The default for SoundWire clock stop quirks is to power gate the IP
57  * and do a Bus Reset, this will need to be modified when the DSP
58  * needs to remain in D0i3 so that the Master does not lose context
59  * and enumeration is not required on clock restart
60  */
61 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
62 module_param(sdw_clock_stop_quirks, int, 0444);
63 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
64 
sdw_params_stream(struct device * dev,struct sdw_intel_stream_params_data * params_data)65 static int sdw_params_stream(struct device *dev,
66 			     struct sdw_intel_stream_params_data *params_data)
67 {
68 	struct snd_sof_dev *sdev = dev_get_drvdata(dev);
69 	struct snd_soc_dai *d = params_data->dai;
70 	struct sof_ipc_dai_config config;
71 	struct sof_ipc_reply reply;
72 	int link_id = params_data->link_id;
73 	int alh_stream_id = params_data->alh_stream_id;
74 	int ret;
75 	u32 size = sizeof(config);
76 
77 	memset(&config, 0, size);
78 	config.hdr.size = size;
79 	config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
80 	config.type = SOF_DAI_INTEL_ALH;
81 	config.dai_index = (link_id << 8) | (d->id);
82 	config.alh.stream_id = alh_stream_id;
83 
84 	/* send message to DSP */
85 	ret = sof_ipc_tx_message(sdev->ipc,
86 				 config.hdr.cmd, &config, size, &reply,
87 				 sizeof(reply));
88 	if (ret < 0) {
89 		dev_err(sdev->dev,
90 			"error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n",
91 			link_id, d->id, alh_stream_id);
92 	}
93 
94 	return ret;
95 }
96 
sdw_free_stream(struct device * dev,struct sdw_intel_stream_free_data * free_data)97 static int sdw_free_stream(struct device *dev,
98 			   struct sdw_intel_stream_free_data *free_data)
99 {
100 	struct snd_sof_dev *sdev = dev_get_drvdata(dev);
101 	struct snd_soc_dai *d = free_data->dai;
102 	struct sof_ipc_dai_config config;
103 	struct sof_ipc_reply reply;
104 	int link_id = free_data->link_id;
105 	int ret;
106 	u32 size = sizeof(config);
107 
108 	memset(&config, 0, size);
109 	config.hdr.size = size;
110 	config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
111 	config.type = SOF_DAI_INTEL_ALH;
112 	config.dai_index = (link_id << 8) | d->id;
113 	config.alh.stream_id = 0xFFFF; /* invalid value on purpose */
114 
115 	/* send message to DSP */
116 	ret = sof_ipc_tx_message(sdev->ipc,
117 				 config.hdr.cmd, &config, size, &reply,
118 				 sizeof(reply));
119 	if (ret < 0) {
120 		dev_err(sdev->dev,
121 			"error: failed to free stream for link %d dai->id %d\n",
122 			link_id, d->id);
123 	}
124 
125 	return ret;
126 }
127 
128 static const struct sdw_intel_ops sdw_callback = {
129 	.params_stream = sdw_params_stream,
130 	.free_stream = sdw_free_stream,
131 };
132 
hda_sdw_int_enable(struct snd_sof_dev * sdev,bool enable)133 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
134 {
135 	sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
136 }
137 
hda_sdw_acpi_scan(struct snd_sof_dev * sdev)138 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
139 {
140 	struct sof_intel_hda_dev *hdev;
141 	acpi_handle handle;
142 	int ret;
143 
144 	handle = ACPI_HANDLE(sdev->dev);
145 
146 	/* save ACPI info for the probe step */
147 	hdev = sdev->pdata->hw_pdata;
148 
149 	ret = sdw_intel_acpi_scan(handle, &hdev->info);
150 	if (ret < 0)
151 		return -EINVAL;
152 
153 	return 0;
154 }
155 
hda_sdw_probe(struct snd_sof_dev * sdev)156 static int hda_sdw_probe(struct snd_sof_dev *sdev)
157 {
158 	struct sof_intel_hda_dev *hdev;
159 	struct sdw_intel_res res;
160 	void *sdw;
161 
162 	hdev = sdev->pdata->hw_pdata;
163 
164 	memset(&res, 0, sizeof(res));
165 
166 	res.mmio_base = sdev->bar[HDA_DSP_BAR];
167 	res.irq = sdev->ipc_irq;
168 	res.handle = hdev->info.handle;
169 	res.parent = sdev->dev;
170 	res.ops = &sdw_callback;
171 	res.dev = sdev->dev;
172 	res.clock_stop_quirks = sdw_clock_stop_quirks;
173 
174 	/*
175 	 * ops and arg fields are not populated for now,
176 	 * they will be needed when the DAI callbacks are
177 	 * provided
178 	 */
179 
180 	/* we could filter links here if needed, e.g for quirks */
181 	res.count = hdev->info.count;
182 	res.link_mask = hdev->info.link_mask;
183 
184 	sdw = sdw_intel_probe(&res);
185 	if (!sdw) {
186 		dev_err(sdev->dev, "error: SoundWire probe failed\n");
187 		return -EINVAL;
188 	}
189 
190 	/* save context */
191 	hdev->sdw = sdw;
192 
193 	return 0;
194 }
195 
hda_sdw_startup(struct snd_sof_dev * sdev)196 int hda_sdw_startup(struct snd_sof_dev *sdev)
197 {
198 	struct sof_intel_hda_dev *hdev;
199 
200 	hdev = sdev->pdata->hw_pdata;
201 
202 	if (!hdev->sdw)
203 		return 0;
204 
205 	return sdw_intel_startup(hdev->sdw);
206 }
207 
hda_sdw_exit(struct snd_sof_dev * sdev)208 static int hda_sdw_exit(struct snd_sof_dev *sdev)
209 {
210 	struct sof_intel_hda_dev *hdev;
211 
212 	hdev = sdev->pdata->hw_pdata;
213 
214 	hda_sdw_int_enable(sdev, false);
215 
216 	if (hdev->sdw)
217 		sdw_intel_exit(hdev->sdw);
218 	hdev->sdw = NULL;
219 
220 	return 0;
221 }
222 
hda_dsp_check_sdw_irq(struct snd_sof_dev * sdev)223 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
224 {
225 	struct sof_intel_hda_dev *hdev;
226 	bool ret = false;
227 	u32 irq_status;
228 
229 	hdev = sdev->pdata->hw_pdata;
230 
231 	if (!hdev->sdw)
232 		return ret;
233 
234 	/* store status */
235 	irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
236 
237 	/* invalid message ? */
238 	if (irq_status == 0xffffffff)
239 		goto out;
240 
241 	/* SDW message ? */
242 	if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
243 		ret = true;
244 
245 out:
246 	return ret;
247 }
248 
hda_dsp_sdw_thread(int irq,void * context)249 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
250 {
251 	return sdw_intel_thread(irq, context);
252 }
253 
hda_sdw_check_wakeen_irq(struct snd_sof_dev * sdev)254 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
255 {
256 	struct sof_intel_hda_dev *hdev;
257 
258 	hdev = sdev->pdata->hw_pdata;
259 	if (hdev->sdw &&
260 	    snd_sof_dsp_read(sdev, HDA_DSP_BAR,
261 			     HDA_DSP_REG_SNDW_WAKE_STS))
262 		return true;
263 
264 	return false;
265 }
266 
hda_sdw_process_wakeen(struct snd_sof_dev * sdev)267 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
268 {
269 	struct sof_intel_hda_dev *hdev;
270 
271 	hdev = sdev->pdata->hw_pdata;
272 	if (!hdev->sdw)
273 		return;
274 
275 	sdw_intel_process_wakeen_event(hdev->sdw);
276 }
277 
278 #endif
279 
280 /*
281  * Debug
282  */
283 
284 struct hda_dsp_msg_code {
285 	u32 code;
286 	const char *msg;
287 };
288 
289 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
290 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
291 module_param_named(use_msi, hda_use_msi, bool, 0444);
292 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
293 #endif
294 
295 static char *hda_model;
296 module_param(hda_model, charp, 0444);
297 MODULE_PARM_DESC(hda_model, "Use the given HDA board model.");
298 
299 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
300 static int hda_dmic_num = -1;
301 module_param_named(dmic_num, hda_dmic_num, int, 0444);
302 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
303 
304 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
305 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
306 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
307 #endif
308 
309 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
310 	{HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
311 	{HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
312 	{HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
313 	{HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
314 	{HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
315 	{HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
316 	{HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
317 	{HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
318 	{HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
319 	{HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
320 	{HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
321 	{HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
322 	{HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
323 	{HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
324 	{HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
325 	{HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
326 	{HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
327 	{HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
328 	{HDA_DSP_ROM_NULL_FW_ENTRY,	"error: null FW entry point"},
329 };
330 
hda_dsp_get_status_skl(struct snd_sof_dev * sdev)331 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
332 {
333 	u32 status;
334 	int i;
335 
336 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
337 				  HDA_ADSP_FW_STATUS_SKL);
338 
339 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
340 		if (status == hda_dsp_rom_msg[i].code) {
341 			dev_err(sdev->dev, "%s - code %8.8x\n",
342 				hda_dsp_rom_msg[i].msg, status);
343 			return;
344 		}
345 	}
346 
347 	/* not for us, must be generic sof message */
348 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
349 }
350 
hda_dsp_get_status(struct snd_sof_dev * sdev)351 static void hda_dsp_get_status(struct snd_sof_dev *sdev)
352 {
353 	u32 status;
354 	int i;
355 
356 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
357 				  HDA_DSP_SRAM_REG_ROM_STATUS);
358 
359 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
360 		if (status == hda_dsp_rom_msg[i].code) {
361 			dev_err(sdev->dev, "%s - code %8.8x\n",
362 				hda_dsp_rom_msg[i].msg, status);
363 			return;
364 		}
365 	}
366 
367 	/* not for us, must be generic sof message */
368 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
369 }
370 
hda_dsp_get_registers(struct snd_sof_dev * sdev,struct sof_ipc_dsp_oops_xtensa * xoops,struct sof_ipc_panic_info * panic_info,u32 * stack,size_t stack_words)371 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
372 				  struct sof_ipc_dsp_oops_xtensa *xoops,
373 				  struct sof_ipc_panic_info *panic_info,
374 				  u32 *stack, size_t stack_words)
375 {
376 	u32 offset = sdev->dsp_oops_offset;
377 
378 	/* first read registers */
379 	sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
380 
381 	/* note: variable AR register array is not read */
382 
383 	/* then get panic info */
384 	if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
385 		dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
386 			xoops->arch_hdr.totalsize);
387 		return;
388 	}
389 	offset += xoops->arch_hdr.totalsize;
390 	sof_block_read(sdev, sdev->mmio_bar, offset,
391 		       panic_info, sizeof(*panic_info));
392 
393 	/* then get the stack */
394 	offset += sizeof(*panic_info);
395 	sof_block_read(sdev, sdev->mmio_bar, offset, stack,
396 		       stack_words * sizeof(u32));
397 }
398 
hda_dsp_dump_skl(struct snd_sof_dev * sdev,u32 flags)399 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
400 {
401 	struct sof_ipc_dsp_oops_xtensa xoops;
402 	struct sof_ipc_panic_info panic_info;
403 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
404 	u32 status, panic;
405 
406 	/* try APL specific status message types first */
407 	hda_dsp_get_status_skl(sdev);
408 
409 	/* now try generic SOF status messages */
410 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
411 				  HDA_ADSP_ERROR_CODE_SKL);
412 
413 	/*TODO: Check: there is no define in spec, but it is used in the code*/
414 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
415 				 HDA_ADSP_ERROR_CODE_SKL + 0x4);
416 
417 	if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
418 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
419 				      HDA_DSP_STACK_DUMP_SIZE);
420 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
421 				   stack, HDA_DSP_STACK_DUMP_SIZE);
422 	} else {
423 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
424 			status, panic);
425 		hda_dsp_get_status_skl(sdev);
426 	}
427 }
428 
429 /* dump the first 8 dwords representing the extended ROM status */
hda_dsp_dump_ext_rom_status(struct snd_sof_dev * sdev)430 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev)
431 {
432 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
433 	char msg[128];
434 	int len = 0;
435 	u32 value;
436 	int i;
437 
438 	for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) {
439 		value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_ROM_STATUS + i * 0x4);
440 		len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
441 	}
442 
443 	sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
444 			   "extended rom status: %s", msg);
445 
446 }
447 
hda_dsp_dump(struct snd_sof_dev * sdev,u32 flags)448 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
449 {
450 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
451 	struct sof_ipc_dsp_oops_xtensa xoops;
452 	struct sof_ipc_panic_info panic_info;
453 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
454 	u32 status, panic;
455 
456 	/* try APL specific status message types first */
457 	hda_dsp_get_status(sdev);
458 
459 	/* now try generic SOF status messages */
460 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
461 				  HDA_DSP_SRAM_REG_FW_STATUS);
462 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
463 
464 	if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
465 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
466 				      HDA_DSP_STACK_DUMP_SIZE);
467 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
468 				   stack, HDA_DSP_STACK_DUMP_SIZE);
469 	} else {
470 		sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
471 				   "status = 0x%8.8x panic = 0x%8.8x\n",
472 				   status, panic);
473 
474 		hda_dsp_dump_ext_rom_status(sdev);
475 		hda_dsp_get_status(sdev);
476 	}
477 }
478 
hda_ipc_irq_dump(struct snd_sof_dev * sdev)479 void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
480 {
481 	struct hdac_bus *bus = sof_to_bus(sdev);
482 	u32 adspis;
483 	u32 intsts;
484 	u32 intctl;
485 	u32 ppsts;
486 	u8 rirbsts;
487 
488 	/* read key IRQ stats and config registers */
489 	adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
490 	intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
491 	intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
492 	ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
493 	rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
494 
495 	dev_err(sdev->dev,
496 		"error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
497 		intsts, intctl, rirbsts);
498 	dev_err(sdev->dev,
499 		"error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
500 		ppsts, adspis);
501 }
502 
hda_ipc_dump(struct snd_sof_dev * sdev)503 void hda_ipc_dump(struct snd_sof_dev *sdev)
504 {
505 	u32 hipcie;
506 	u32 hipct;
507 	u32 hipcctl;
508 
509 	hda_ipc_irq_dump(sdev);
510 
511 	/* read IPC status */
512 	hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
513 	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
514 	hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
515 
516 	/* dump the IPC regs */
517 	/* TODO: parse the raw msg */
518 	dev_err(sdev->dev,
519 		"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
520 		hipcie, hipct, hipcctl);
521 }
522 
hda_init(struct snd_sof_dev * sdev)523 static int hda_init(struct snd_sof_dev *sdev)
524 {
525 	struct hda_bus *hbus;
526 	struct hdac_bus *bus;
527 	struct pci_dev *pci = to_pci_dev(sdev->dev);
528 	int ret;
529 
530 	hbus = sof_to_hbus(sdev);
531 	bus = sof_to_bus(sdev);
532 
533 	/* HDA bus init */
534 	sof_hda_bus_init(bus, &pci->dev);
535 
536 	bus->use_posbuf = 1;
537 	bus->bdl_pos_adj = 0;
538 	bus->sync_write = 1;
539 
540 	mutex_init(&hbus->prepare_mutex);
541 	hbus->pci = pci;
542 	hbus->mixer_assigned = -1;
543 	hbus->modelname = hda_model;
544 
545 	/* initialise hdac bus */
546 	bus->addr = pci_resource_start(pci, 0);
547 #if IS_ENABLED(CONFIG_PCI)
548 	bus->remap_addr = pci_ioremap_bar(pci, 0);
549 #endif
550 	if (!bus->remap_addr) {
551 		dev_err(bus->dev, "error: ioremap error\n");
552 		return -ENXIO;
553 	}
554 
555 	/* HDA base */
556 	sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
557 
558 	/* init i915 and HDMI codecs */
559 	ret = hda_codec_i915_init(sdev);
560 	if (ret < 0)
561 		dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
562 
563 	/* get controller capabilities */
564 	ret = hda_dsp_ctrl_get_caps(sdev);
565 	if (ret < 0)
566 		dev_err(sdev->dev, "error: get caps error\n");
567 
568 	return ret;
569 }
570 
571 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
572 
check_nhlt_dmic(struct snd_sof_dev * sdev)573 static int check_nhlt_dmic(struct snd_sof_dev *sdev)
574 {
575 	struct nhlt_acpi_table *nhlt;
576 	int dmic_num;
577 
578 	nhlt = intel_nhlt_init(sdev->dev);
579 	if (nhlt) {
580 		dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
581 		intel_nhlt_free(nhlt);
582 		if (dmic_num >= 1 && dmic_num <= 4)
583 			return dmic_num;
584 	}
585 
586 	return 0;
587 }
588 
fixup_tplg_name(struct snd_sof_dev * sdev,const char * sof_tplg_filename,const char * idisp_str,const char * dmic_str)589 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
590 				   const char *sof_tplg_filename,
591 				   const char *idisp_str,
592 				   const char *dmic_str)
593 {
594 	const char *tplg_filename = NULL;
595 	char *filename;
596 	char *split_ext;
597 
598 	filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
599 	if (!filename)
600 		return NULL;
601 
602 	/* this assumes a .tplg extension */
603 	split_ext = strsep(&filename, ".");
604 	if (split_ext) {
605 		tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
606 					       "%s%s%s.tplg",
607 					       split_ext, idisp_str, dmic_str);
608 		if (!tplg_filename)
609 			return NULL;
610 	}
611 	return tplg_filename;
612 }
613 
614 #endif
615 
hda_init_caps(struct snd_sof_dev * sdev)616 static int hda_init_caps(struct snd_sof_dev *sdev)
617 {
618 	struct hdac_bus *bus = sof_to_bus(sdev);
619 	struct snd_sof_pdata *pdata = sdev->pdata;
620 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
621 	struct hdac_ext_link *hlink;
622 #endif
623 	struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
624 	u32 link_mask;
625 	int ret = 0;
626 
627 	device_disable_async_suspend(bus->dev);
628 
629 	/* check if dsp is there */
630 	if (bus->ppcap)
631 		dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
632 
633 	/* Init HDA controller after i915 init */
634 	ret = hda_dsp_ctrl_init_chip(sdev, true);
635 	if (ret < 0) {
636 		dev_err(bus->dev, "error: init chip failed with ret: %d\n",
637 			ret);
638 		return ret;
639 	}
640 
641 	/* scan SoundWire capabilities exposed by DSDT */
642 	ret = hda_sdw_acpi_scan(sdev);
643 	if (ret < 0) {
644 		dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n");
645 		goto skip_soundwire;
646 	}
647 
648 	link_mask = hdev->info.link_mask;
649 	if (!link_mask) {
650 		dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
651 		goto skip_soundwire;
652 	}
653 
654 	/*
655 	 * probe/allocate SoundWire resources.
656 	 * The hardware configuration takes place in hda_sdw_startup
657 	 * after power rails are enabled.
658 	 * It's entirely possible to have a mix of I2S/DMIC/SoundWire
659 	 * devices, so we allocate the resources in all cases.
660 	 */
661 	ret = hda_sdw_probe(sdev);
662 	if (ret < 0) {
663 		dev_err(sdev->dev, "error: SoundWire probe error\n");
664 		return ret;
665 	}
666 
667 skip_soundwire:
668 
669 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
670 	if (bus->mlcap)
671 		snd_hdac_ext_bus_get_ml_capabilities(bus);
672 
673 	/* create codec instances */
674 	hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
675 
676 	if (!HDA_IDISP_CODEC(bus->codec_mask))
677 		hda_codec_i915_display_power(sdev, false);
678 
679 	/*
680 	 * we are done probing so decrement link counts
681 	 */
682 	list_for_each_entry(hlink, &bus->hlink_list, list)
683 		snd_hdac_ext_bus_link_put(bus, hlink);
684 #endif
685 	return 0;
686 }
687 
hda_dsp_interrupt_handler(int irq,void * context)688 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
689 {
690 	struct snd_sof_dev *sdev = context;
691 
692 	/*
693 	 * Get global interrupt status. It includes all hardware interrupt
694 	 * sources in the Intel HD Audio controller.
695 	 */
696 	if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
697 	    SOF_HDA_INTSTS_GIS) {
698 
699 		/* disable GIE interrupt */
700 		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
701 					SOF_HDA_INTCTL,
702 					SOF_HDA_INT_GLOBAL_EN,
703 					0);
704 
705 		return IRQ_WAKE_THREAD;
706 	}
707 
708 	return IRQ_NONE;
709 }
710 
hda_dsp_interrupt_thread(int irq,void * context)711 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
712 {
713 	struct snd_sof_dev *sdev = context;
714 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
715 
716 	/* deal with streams and controller first */
717 	if (hda_dsp_check_stream_irq(sdev))
718 		hda_dsp_stream_threaded_handler(irq, sdev);
719 
720 	if (hda_dsp_check_ipc_irq(sdev))
721 		sof_ops(sdev)->irq_thread(irq, sdev);
722 
723 	if (hda_dsp_check_sdw_irq(sdev))
724 		hda_dsp_sdw_thread(irq, hdev->sdw);
725 
726 	if (hda_sdw_check_wakeen_irq(sdev))
727 		hda_sdw_process_wakeen(sdev);
728 
729 	/* enable GIE interrupt */
730 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
731 				SOF_HDA_INTCTL,
732 				SOF_HDA_INT_GLOBAL_EN,
733 				SOF_HDA_INT_GLOBAL_EN);
734 
735 	return IRQ_HANDLED;
736 }
737 
hda_dsp_probe(struct snd_sof_dev * sdev)738 int hda_dsp_probe(struct snd_sof_dev *sdev)
739 {
740 	struct pci_dev *pci = to_pci_dev(sdev->dev);
741 	struct sof_intel_hda_dev *hdev;
742 	struct hdac_bus *bus;
743 	const struct sof_intel_dsp_desc *chip;
744 	int ret = 0;
745 
746 	/*
747 	 * detect DSP by checking class/subclass/prog-id information
748 	 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
749 	 * class=04 subclass 01 prog-if 00: DSP is present
750 	 *   (and may be required e.g. for DMIC or SSP support)
751 	 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
752 	 */
753 	if (pci->class == 0x040300) {
754 		dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
755 		return -ENODEV;
756 	} else if (pci->class != 0x040100 && pci->class != 0x040380) {
757 		dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
758 		return -ENODEV;
759 	}
760 	dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
761 
762 	chip = get_chip_info(sdev->pdata);
763 	if (!chip) {
764 		dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
765 			pci->device);
766 		ret = -EIO;
767 		goto err;
768 	}
769 
770 	hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
771 	if (!hdev)
772 		return -ENOMEM;
773 	sdev->pdata->hw_pdata = hdev;
774 	hdev->desc = chip;
775 
776 	hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
777 						       PLATFORM_DEVID_NONE,
778 						       NULL, 0);
779 	if (IS_ERR(hdev->dmic_dev)) {
780 		dev_err(sdev->dev, "error: failed to create DMIC device\n");
781 		return PTR_ERR(hdev->dmic_dev);
782 	}
783 
784 	/*
785 	 * use position update IPC if either it is forced
786 	 * or we don't have other choice
787 	 */
788 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
789 	hdev->no_ipc_position = 0;
790 #else
791 	hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
792 #endif
793 
794 	/* set up HDA base */
795 	bus = sof_to_bus(sdev);
796 	ret = hda_init(sdev);
797 	if (ret < 0)
798 		goto hdac_bus_unmap;
799 
800 	/* DSP base */
801 #if IS_ENABLED(CONFIG_PCI)
802 	sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
803 #endif
804 	if (!sdev->bar[HDA_DSP_BAR]) {
805 		dev_err(sdev->dev, "error: ioremap error\n");
806 		ret = -ENXIO;
807 		goto hdac_bus_unmap;
808 	}
809 
810 	sdev->mmio_bar = HDA_DSP_BAR;
811 	sdev->mailbox_bar = HDA_DSP_BAR;
812 
813 	/* allow 64bit DMA address if supported by H/W */
814 	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
815 		dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
816 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
817 	} else {
818 		dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
819 		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
820 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
821 	}
822 
823 	/* init streams */
824 	ret = hda_dsp_stream_init(sdev);
825 	if (ret < 0) {
826 		dev_err(sdev->dev, "error: failed to init streams\n");
827 		/*
828 		 * not all errors are due to memory issues, but trying
829 		 * to free everything does not harm
830 		 */
831 		goto free_streams;
832 	}
833 
834 	/*
835 	 * register our IRQ
836 	 * let's try to enable msi firstly
837 	 * if it fails, use legacy interrupt mode
838 	 * TODO: support msi multiple vectors
839 	 */
840 	if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
841 		dev_info(sdev->dev, "use msi interrupt mode\n");
842 		sdev->ipc_irq = pci_irq_vector(pci, 0);
843 		/* initialised to "false" by kzalloc() */
844 		sdev->msi_enabled = true;
845 	}
846 
847 	if (!sdev->msi_enabled) {
848 		dev_info(sdev->dev, "use legacy interrupt mode\n");
849 		/*
850 		 * in IO-APIC mode, hda->irq and ipc_irq are using the same
851 		 * irq number of pci->irq
852 		 */
853 		sdev->ipc_irq = pci->irq;
854 	}
855 
856 	dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
857 	ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
858 				   hda_dsp_interrupt_thread,
859 				   IRQF_SHARED, "AudioDSP", sdev);
860 	if (ret < 0) {
861 		dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
862 			sdev->ipc_irq);
863 		goto free_irq_vector;
864 	}
865 
866 	pci_set_master(pci);
867 	synchronize_irq(pci->irq);
868 
869 	/*
870 	 * clear TCSEL to clear playback on some HD Audio
871 	 * codecs. PCI TCSEL is defined in the Intel manuals.
872 	 */
873 	snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
874 
875 	/* init HDA capabilities */
876 	ret = hda_init_caps(sdev);
877 	if (ret < 0)
878 		goto free_ipc_irq;
879 
880 	/* enable ppcap interrupt */
881 	hda_dsp_ctrl_ppcap_enable(sdev, true);
882 	hda_dsp_ctrl_ppcap_int_enable(sdev, true);
883 
884 	/* set default mailbox offset for FW ready message */
885 	sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
886 
887 	INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
888 
889 	return 0;
890 
891 free_ipc_irq:
892 	free_irq(sdev->ipc_irq, sdev);
893 free_irq_vector:
894 	if (sdev->msi_enabled)
895 		pci_free_irq_vectors(pci);
896 free_streams:
897 	hda_dsp_stream_free(sdev);
898 /* dsp_unmap: not currently used */
899 	iounmap(sdev->bar[HDA_DSP_BAR]);
900 hdac_bus_unmap:
901 	platform_device_unregister(hdev->dmic_dev);
902 	iounmap(bus->remap_addr);
903 	hda_codec_i915_exit(sdev);
904 err:
905 	return ret;
906 }
907 
hda_dsp_remove(struct snd_sof_dev * sdev)908 int hda_dsp_remove(struct snd_sof_dev *sdev)
909 {
910 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
911 	struct hdac_bus *bus = sof_to_bus(sdev);
912 	struct pci_dev *pci = to_pci_dev(sdev->dev);
913 	const struct sof_intel_dsp_desc *chip = hda->desc;
914 
915 	/* cancel any attempt for DSP D0I3 */
916 	cancel_delayed_work_sync(&hda->d0i3_work);
917 
918 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
919 	/* codec removal, invoke bus_device_remove */
920 	snd_hdac_ext_bus_device_remove(bus);
921 #endif
922 
923 	hda_sdw_exit(sdev);
924 
925 	if (!IS_ERR_OR_NULL(hda->dmic_dev))
926 		platform_device_unregister(hda->dmic_dev);
927 
928 	/* disable DSP IRQ */
929 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
930 				SOF_HDA_PPCTL_PIE, 0);
931 
932 	/* disable CIE and GIE interrupts */
933 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
934 				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
935 
936 	/* disable cores */
937 	if (chip)
938 		hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
939 
940 	/* disable DSP */
941 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
942 				SOF_HDA_PPCTL_GPROCEN, 0);
943 
944 	free_irq(sdev->ipc_irq, sdev);
945 	if (sdev->msi_enabled)
946 		pci_free_irq_vectors(pci);
947 
948 	hda_dsp_stream_free(sdev);
949 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
950 	snd_hdac_link_free_all(bus);
951 #endif
952 
953 	iounmap(sdev->bar[HDA_DSP_BAR]);
954 	iounmap(bus->remap_addr);
955 
956 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
957 	snd_hdac_ext_bus_exit(bus);
958 #endif
959 	hda_codec_i915_exit(sdev);
960 
961 	return 0;
962 }
963 
964 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
hda_generic_machine_select(struct snd_sof_dev * sdev)965 static int hda_generic_machine_select(struct snd_sof_dev *sdev)
966 {
967 	struct hdac_bus *bus = sof_to_bus(sdev);
968 	struct snd_soc_acpi_mach_params *mach_params;
969 	struct snd_soc_acpi_mach *hda_mach;
970 	struct snd_sof_pdata *pdata = sdev->pdata;
971 	const char *tplg_filename;
972 	const char *idisp_str;
973 	const char *dmic_str;
974 	int dmic_num = 0;
975 	int codec_num = 0;
976 	int i;
977 
978 	/* codec detection */
979 	if (!bus->codec_mask) {
980 		dev_info(bus->dev, "no hda codecs found!\n");
981 	} else {
982 		dev_info(bus->dev, "hda codecs found, mask %lx\n",
983 			 bus->codec_mask);
984 
985 		for (i = 0; i < HDA_MAX_CODECS; i++) {
986 			if (bus->codec_mask & (1 << i))
987 				codec_num++;
988 		}
989 
990 		/*
991 		 * If no machine driver is found, then:
992 		 *
993 		 * generic hda machine driver can handle:
994 		 *  - one HDMI codec, and/or
995 		 *  - one external HDAudio codec
996 		 */
997 		if (!pdata->machine && codec_num <= 2) {
998 			hda_mach = snd_soc_acpi_intel_hda_machines;
999 
1000 			/* topology: use the info from hda_machines */
1001 			pdata->tplg_filename =
1002 				hda_mach->sof_tplg_filename;
1003 
1004 			dev_info(bus->dev, "using HDA machine driver %s now\n",
1005 				 hda_mach->drv_name);
1006 
1007 			if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
1008 				idisp_str = "-idisp";
1009 			else
1010 				idisp_str = "";
1011 
1012 			/* first check NHLT for DMICs */
1013 			dmic_num = check_nhlt_dmic(sdev);
1014 
1015 			/* allow for module parameter override */
1016 			if (hda_dmic_num != -1)
1017 				dmic_num = hda_dmic_num;
1018 
1019 			switch (dmic_num) {
1020 			case 1:
1021 				dmic_str = "-1ch";
1022 				break;
1023 			case 2:
1024 				dmic_str = "-2ch";
1025 				break;
1026 			case 3:
1027 				dmic_str = "-3ch";
1028 				break;
1029 			case 4:
1030 				dmic_str = "-4ch";
1031 				break;
1032 			default:
1033 				dmic_num = 0;
1034 				dmic_str = "";
1035 				break;
1036 			}
1037 
1038 			tplg_filename = pdata->tplg_filename;
1039 			tplg_filename = fixup_tplg_name(sdev, tplg_filename,
1040 							idisp_str, dmic_str);
1041 			if (!tplg_filename)
1042 				return -EINVAL;
1043 
1044 			dev_info(bus->dev,
1045 				 "DMICs detected in NHLT tables: %d\n",
1046 				 dmic_num);
1047 
1048 			pdata->machine = hda_mach;
1049 			pdata->tplg_filename = tplg_filename;
1050 		}
1051 	}
1052 
1053 	/* used by hda machine driver to create dai links */
1054 	if (pdata->machine) {
1055 		mach_params = (struct snd_soc_acpi_mach_params *)
1056 			&pdata->machine->mach_params;
1057 		mach_params->codec_mask = bus->codec_mask;
1058 		mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
1059 		mach_params->dmic_num = dmic_num;
1060 	}
1061 
1062 	return 0;
1063 }
1064 #else
hda_generic_machine_select(struct snd_sof_dev * sdev)1065 static int hda_generic_machine_select(struct snd_sof_dev *sdev)
1066 {
1067 	return 0;
1068 }
1069 #endif
1070 
1071 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
1072 /* Check if all Slaves defined on the link can be found */
link_slaves_found(struct snd_sof_dev * sdev,const struct snd_soc_acpi_link_adr * link,struct sdw_intel_ctx * sdw)1073 static bool link_slaves_found(struct snd_sof_dev *sdev,
1074 			      const struct snd_soc_acpi_link_adr *link,
1075 			      struct sdw_intel_ctx *sdw)
1076 {
1077 	struct hdac_bus *bus = sof_to_bus(sdev);
1078 	struct sdw_intel_slave_id *ids = sdw->ids;
1079 	int num_slaves = sdw->num_slaves;
1080 	unsigned int part_id, link_id, unique_id, mfg_id;
1081 	int i, j;
1082 
1083 	for (i = 0; i < link->num_adr; i++) {
1084 		u64 adr = link->adr_d[i].adr;
1085 
1086 		mfg_id = SDW_MFG_ID(adr);
1087 		part_id = SDW_PART_ID(adr);
1088 		link_id = SDW_DISCO_LINK_ID(adr);
1089 		for (j = 0; j < num_slaves; j++) {
1090 			if (ids[j].link_id != link_id ||
1091 			    ids[j].id.part_id != part_id ||
1092 			    ids[j].id.mfg_id != mfg_id)
1093 				continue;
1094 			/*
1095 			 * we have to check unique id
1096 			 * if there is more than one
1097 			 * Slave on the link
1098 			 */
1099 			unique_id = SDW_UNIQUE_ID(adr);
1100 			if (link->num_adr == 1 ||
1101 			    ids[j].id.unique_id == SDW_IGNORED_UNIQUE_ID ||
1102 			    ids[j].id.unique_id == unique_id) {
1103 				dev_dbg(bus->dev,
1104 					"found %x at link %d\n",
1105 					part_id, link_id);
1106 				break;
1107 			}
1108 		}
1109 		if (j == num_slaves) {
1110 			dev_dbg(bus->dev,
1111 				"Slave %x not found\n",
1112 				part_id);
1113 			return false;
1114 		}
1115 	}
1116 	return true;
1117 }
1118 
hda_sdw_machine_select(struct snd_sof_dev * sdev)1119 static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1120 {
1121 	struct snd_sof_pdata *pdata = sdev->pdata;
1122 	const struct snd_soc_acpi_link_adr *link;
1123 	struct hdac_bus *bus = sof_to_bus(sdev);
1124 	struct snd_soc_acpi_mach *mach;
1125 	struct sof_intel_hda_dev *hdev;
1126 	u32 link_mask;
1127 	int i;
1128 
1129 	hdev = pdata->hw_pdata;
1130 	link_mask = hdev->info.link_mask;
1131 
1132 	/*
1133 	 * Select SoundWire machine driver if needed using the
1134 	 * alternate tables. This case deals with SoundWire-only
1135 	 * machines, for mixed cases with I2C/I2S the detection relies
1136 	 * on the HID list.
1137 	 */
1138 	if (link_mask && !pdata->machine) {
1139 		for (mach = pdata->desc->alt_machines;
1140 		     mach && mach->link_mask; mach++) {
1141 			/*
1142 			 * On some platforms such as Up Extreme all links
1143 			 * are enabled but only one link can be used by
1144 			 * external codec. Instead of exact match of two masks,
1145 			 * first check whether link_mask of mach is subset of
1146 			 * link_mask supported by hw and then go on searching
1147 			 * link_adr
1148 			 */
1149 			if (~link_mask & mach->link_mask)
1150 				continue;
1151 
1152 			/* No need to match adr if there is no links defined */
1153 			if (!mach->links)
1154 				break;
1155 
1156 			link = mach->links;
1157 			for (i = 0; i < hdev->info.count && link->num_adr;
1158 			     i++, link++) {
1159 				/*
1160 				 * Try next machine if any expected Slaves
1161 				 * are not found on this link.
1162 				 */
1163 				if (!link_slaves_found(sdev, link, hdev->sdw))
1164 					break;
1165 			}
1166 			/* Found if all Slaves are checked */
1167 			if (i == hdev->info.count || !link->num_adr)
1168 				break;
1169 		}
1170 		if (mach && mach->link_mask) {
1171 			dev_dbg(bus->dev,
1172 				"SoundWire machine driver %s topology %s\n",
1173 				mach->drv_name,
1174 				mach->sof_tplg_filename);
1175 			pdata->machine = mach;
1176 			mach->mach_params.links = mach->links;
1177 			mach->mach_params.link_mask = mach->link_mask;
1178 			mach->mach_params.platform = dev_name(sdev->dev);
1179 			pdata->fw_filename = mach->sof_fw_filename;
1180 			pdata->tplg_filename = mach->sof_tplg_filename;
1181 		} else {
1182 			dev_info(sdev->dev,
1183 				 "No SoundWire machine driver found\n");
1184 		}
1185 	}
1186 
1187 	return 0;
1188 }
1189 #else
hda_sdw_machine_select(struct snd_sof_dev * sdev)1190 static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1191 {
1192 	return 0;
1193 }
1194 #endif
1195 
hda_set_mach_params(const struct snd_soc_acpi_mach * mach,struct device * dev)1196 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach,
1197 			 struct device *dev)
1198 {
1199 	struct snd_soc_acpi_mach_params *mach_params;
1200 
1201 	mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params;
1202 	mach_params->platform = dev_name(dev);
1203 }
1204 
hda_machine_select(struct snd_sof_dev * sdev)1205 void hda_machine_select(struct snd_sof_dev *sdev)
1206 {
1207 	struct snd_sof_pdata *sof_pdata = sdev->pdata;
1208 	const struct sof_dev_desc *desc = sof_pdata->desc;
1209 	struct snd_soc_acpi_mach *mach;
1210 
1211 	mach = snd_soc_acpi_find_machine(desc->machines);
1212 	if (mach) {
1213 		/*
1214 		 * If tplg file name is overridden, use it instead of
1215 		 * the one set in mach table
1216 		 */
1217 		if (!sof_pdata->tplg_filename)
1218 			sof_pdata->tplg_filename = mach->sof_tplg_filename;
1219 
1220 		sof_pdata->machine = mach;
1221 
1222 		if (mach->link_mask) {
1223 			mach->mach_params.links = mach->links;
1224 			mach->mach_params.link_mask = mach->link_mask;
1225 		}
1226 	}
1227 
1228 	/*
1229 	 * If I2S fails, try SoundWire
1230 	 */
1231 	hda_sdw_machine_select(sdev);
1232 
1233 	/*
1234 	 * Choose HDA generic machine driver if mach is NULL.
1235 	 * Otherwise, set certain mach params.
1236 	 */
1237 	hda_generic_machine_select(sdev);
1238 
1239 	if (!sof_pdata->machine)
1240 		dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
1241 }
1242 
1243 MODULE_LICENSE("Dual BSD/GPL");
1244 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
1245 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
1246 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
1247 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT);
1248