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1 /*
2  * Copyright 2018 Collabora Ltd.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * on the rights to use, copy, modify, merge, publish, distribute, sub
8  * license, and/or sell copies of the Software, and to permit persons to whom
9  * the Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef ZINK_STATE_H
25 #define ZINK_STATE_H
26 
27 #include <vulkan/vulkan.h>
28 
29 #include "pipe/p_state.h"
30 #include "util/set.h"
31 
32 struct zink_vertex_elements_hw_state {
33    uint32_t hash;
34    uint32_t num_bindings, num_attribs;
35    union {
36       VkVertexInputAttributeDescription attribs[PIPE_MAX_ATTRIBS];
37       VkVertexInputAttributeDescription2EXT dynattribs[PIPE_MAX_ATTRIBS];
38    };
39    union {
40       struct {
41          VkVertexInputBindingDivisorDescriptionEXT divisors[PIPE_MAX_ATTRIBS];
42          VkVertexInputBindingDescription bindings[PIPE_MAX_ATTRIBS]; // combination of element_state and stride
43          uint8_t divisors_present;
44       } b;
45       VkVertexInputBindingDescription2EXT dynbindings[PIPE_MAX_ATTRIBS];
46    };
47 };
48 
49 struct zink_vertex_elements_state {
50    struct {
51       uint32_t binding;
52       VkVertexInputRate inputRate;
53    } bindings[PIPE_MAX_ATTRIBS];
54    uint32_t divisor[PIPE_MAX_ATTRIBS];
55    uint8_t binding_map[PIPE_MAX_ATTRIBS];
56    uint32_t min_stride[PIPE_MAX_ATTRIBS]; //for dynamic_state1
57    uint32_t decomposed_attrs;
58    unsigned decomposed_attrs_size;
59    uint32_t decomposed_attrs_without_w;
60    unsigned decomposed_attrs_without_w_size;
61    struct zink_vertex_elements_hw_state hw_state;
62 };
63 
64 struct zink_vertex_state {
65    struct pipe_vertex_state b;
66    struct zink_vertex_elements_state velems;
67    struct set masks;
68 };
69 
70 struct zink_rasterizer_hw_state {
71    unsigned polygon_mode : 2; //VkPolygonMode
72    unsigned line_mode : 2; //VkLineRasterizationModeEXT
73    unsigned depth_clip:1;
74    unsigned pv_last:1;
75    unsigned line_stipple_enable:1;
76    unsigned force_persample_interp:1;
77    unsigned clip_halfz:1;
78 };
79 #define ZINK_RAST_HW_STATE_SIZE 9
80 
81 
82 struct zink_rasterizer_state {
83    struct pipe_rasterizer_state base;
84    bool offset_point, offset_line, offset_tri;
85    float offset_units, offset_clamp, offset_scale;
86    float line_width;
87    VkFrontFace front_face;
88    VkCullModeFlags cull_mode;
89    struct zink_rasterizer_hw_state hw_state;
90 };
91 
92 struct zink_blend_state {
93    uint32_t hash;
94    VkPipelineColorBlendAttachmentState attachments[PIPE_MAX_COLOR_BUFS];
95 
96    VkBool32 logicop_enable;
97    VkLogicOp logicop_func;
98 
99    VkBool32 alpha_to_coverage;
100    VkBool32 alpha_to_one;
101 
102    bool need_blend_constants;
103    bool dual_src_blend;
104 };
105 
106 struct zink_depth_stencil_alpha_hw_state {
107    VkBool32 depth_test;
108    VkCompareOp depth_compare_op;
109 
110    VkBool32 depth_bounds_test;
111    float min_depth_bounds, max_depth_bounds;
112 
113    VkBool32 stencil_test;
114    VkStencilOpState stencil_front;
115    VkStencilOpState stencil_back;
116 
117    VkBool32 depth_write;
118 };
119 
120 struct zink_depth_stencil_alpha_state {
121    struct pipe_depth_stencil_alpha_state base;
122    struct zink_depth_stencil_alpha_hw_state hw_state;
123 };
124 
125 #ifdef __cplusplus
126 extern "C" {
127 #endif
128 
129 void
130 zink_context_state_init(struct pipe_context *pctx);
131 
132 
133 struct pipe_vertex_state *
134 zink_create_vertex_state(struct pipe_screen *pscreen,
135                           struct pipe_vertex_buffer *buffer,
136                           const struct pipe_vertex_element *elements,
137                           unsigned num_elements,
138                           struct pipe_resource *indexbuf,
139                           uint32_t full_velem_mask);
140 void
141 zink_vertex_state_destroy(struct pipe_screen *pscreen, struct pipe_vertex_state *vstate);
142 struct pipe_vertex_state *
143 zink_cache_create_vertex_state(struct pipe_screen *pscreen,
144                                struct pipe_vertex_buffer *buffer,
145                                const struct pipe_vertex_element *elements,
146                                unsigned num_elements,
147                                struct pipe_resource *indexbuf,
148                                uint32_t full_velem_mask);
149 void
150 zink_cache_vertex_state_destroy(struct pipe_screen *pscreen, struct pipe_vertex_state *vstate);
151 
152 const struct zink_vertex_elements_hw_state *
153 zink_vertex_state_mask(struct pipe_vertex_state *vstate, uint32_t partial_velem_mask, bool have_EXT_vertex_input_dynamic_state);
154 
155 #ifdef __cplusplus
156 }
157 #endif
158 
159 #endif
160