1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
3 *
4 * Author: Felix Fietkau <nbd@nbd.name>
5 * Lorenzo Bianconi <lorenzo@kernel.org>
6 * Sean Wang <sean.wang@mediatek.com>
7 */
8
9 #include <linux/kernel.h>
10 #include <linux/iopoll.h>
11 #include <linux/module.h>
12
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/sdio_ids.h>
15 #include <linux/mmc/sdio_func.h>
16
17 #include "../trace.h"
18 #include "mt7615.h"
19 #include "sdio.h"
20 #include "mac.h"
21
mt7663s_refill_sched_quota(struct mt76_dev * dev,u32 * data)22 static int mt7663s_refill_sched_quota(struct mt76_dev *dev, u32 *data)
23 {
24 u32 ple_ac_data_quota[] = {
25 FIELD_GET(TXQ_CNT_L, data[4]), /* VO */
26 FIELD_GET(TXQ_CNT_H, data[3]), /* VI */
27 FIELD_GET(TXQ_CNT_L, data[3]), /* BE */
28 FIELD_GET(TXQ_CNT_H, data[2]), /* BK */
29 };
30 u32 pse_ac_data_quota[] = {
31 FIELD_GET(TXQ_CNT_H, data[1]), /* VO */
32 FIELD_GET(TXQ_CNT_L, data[1]), /* VI */
33 FIELD_GET(TXQ_CNT_H, data[0]), /* BE */
34 FIELD_GET(TXQ_CNT_L, data[0]), /* BK */
35 };
36 u32 pse_mcu_quota = FIELD_GET(TXQ_CNT_L, data[2]);
37 u32 pse_data_quota = 0, ple_data_quota = 0;
38 struct mt76_sdio *sdio = &dev->sdio;
39 int i;
40
41 for (i = 0; i < ARRAY_SIZE(pse_ac_data_quota); i++) {
42 pse_data_quota += pse_ac_data_quota[i];
43 ple_data_quota += ple_ac_data_quota[i];
44 }
45
46 if (!pse_data_quota && !ple_data_quota && !pse_mcu_quota)
47 return 0;
48
49 mutex_lock(&sdio->sched.lock);
50 sdio->sched.pse_mcu_quota += pse_mcu_quota;
51 sdio->sched.pse_data_quota += pse_data_quota;
52 sdio->sched.ple_data_quota += ple_data_quota;
53 mutex_unlock(&sdio->sched.lock);
54
55 return pse_data_quota + ple_data_quota + pse_mcu_quota;
56 }
57
mt7663s_build_rx_skb(void * data,int data_len,int buf_len)58 static struct sk_buff *mt7663s_build_rx_skb(void *data, int data_len,
59 int buf_len)
60 {
61 int len = min_t(int, data_len, MT_SKB_HEAD_LEN);
62 struct sk_buff *skb;
63
64 skb = alloc_skb(len, GFP_KERNEL);
65 if (!skb)
66 return NULL;
67
68 skb_put_data(skb, data, len);
69 if (data_len > len) {
70 struct page *page;
71
72 data += len;
73 page = virt_to_head_page(data);
74 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
75 page, data - page_address(page),
76 data_len - len, buf_len);
77 get_page(page);
78 }
79
80 return skb;
81 }
82
mt7663s_rx_run_queue(struct mt76_dev * dev,enum mt76_rxq_id qid,struct mt76s_intr * intr)83 static int mt7663s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid,
84 struct mt76s_intr *intr)
85 {
86 struct mt76_queue *q = &dev->q_rx[qid];
87 struct mt76_sdio *sdio = &dev->sdio;
88 int len = 0, err, i;
89 struct page *page;
90 u8 *buf;
91
92 for (i = 0; i < intr->rx.num[qid]; i++)
93 len += round_up(intr->rx.len[qid][i] + 4, 4);
94
95 if (!len)
96 return 0;
97
98 if (len > sdio->func->cur_blksize)
99 len = roundup(len, sdio->func->cur_blksize);
100
101 page = __dev_alloc_pages(GFP_KERNEL, get_order(len));
102 if (!page)
103 return -ENOMEM;
104
105 buf = page_address(page);
106
107 sdio_claim_host(sdio->func);
108 err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len);
109 sdio_release_host(sdio->func);
110
111 if (err < 0) {
112 dev_err(dev->dev, "sdio read data failed:%d\n", err);
113 put_page(page);
114 return err;
115 }
116
117 for (i = 0; i < intr->rx.num[qid]; i++) {
118 int index = (q->head + i) % q->ndesc;
119 struct mt76_queue_entry *e = &q->entry[index];
120
121 len = intr->rx.len[qid][i];
122 e->skb = mt7663s_build_rx_skb(buf, len, round_up(len + 4, 4));
123 if (!e->skb)
124 break;
125
126 buf += round_up(len + 4, 4);
127 if (q->queued + i + 1 == q->ndesc)
128 break;
129 }
130 put_page(page);
131
132 spin_lock_bh(&q->lock);
133 q->head = (q->head + i) % q->ndesc;
134 q->queued += i;
135 spin_unlock_bh(&q->lock);
136
137 return i;
138 }
139
mt7663s_tx_pick_quota(struct mt76_sdio * sdio,enum mt76_txq_id qid,int buf_sz,int * pse_size,int * ple_size)140 static int mt7663s_tx_pick_quota(struct mt76_sdio *sdio, enum mt76_txq_id qid,
141 int buf_sz, int *pse_size, int *ple_size)
142 {
143 int pse_sz;
144
145 pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit, MT_PSE_PAGE_SZ);
146
147 if (qid == MT_TXQ_MCU) {
148 if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz)
149 return -EBUSY;
150 } else {
151 if (sdio->sched.pse_data_quota < *pse_size + pse_sz ||
152 sdio->sched.ple_data_quota < *ple_size + 1)
153 return -EBUSY;
154
155 *ple_size = *ple_size + 1;
156 }
157 *pse_size = *pse_size + pse_sz;
158
159 return 0;
160 }
161
mt7663s_tx_update_quota(struct mt76_sdio * sdio,enum mt76_txq_id qid,int pse_size,int ple_size)162 static void mt7663s_tx_update_quota(struct mt76_sdio *sdio, enum mt76_txq_id qid,
163 int pse_size, int ple_size)
164 {
165 mutex_lock(&sdio->sched.lock);
166 if (qid == MT_TXQ_MCU) {
167 sdio->sched.pse_mcu_quota -= pse_size;
168 } else {
169 sdio->sched.pse_data_quota -= pse_size;
170 sdio->sched.ple_data_quota -= ple_size;
171 }
172 mutex_unlock(&sdio->sched.lock);
173 }
174
__mt7663s_xmit_queue(struct mt76_dev * dev,u8 * data,int len)175 static int __mt7663s_xmit_queue(struct mt76_dev *dev, u8 *data, int len)
176 {
177 struct mt76_sdio *sdio = &dev->sdio;
178 int err;
179
180 if (len > sdio->func->cur_blksize)
181 len = roundup(len, sdio->func->cur_blksize);
182
183 sdio_claim_host(sdio->func);
184 err = sdio_writesb(sdio->func, MCR_WTDR1, data, len);
185 sdio_release_host(sdio->func);
186
187 if (err)
188 dev_err(dev->dev, "sdio write failed: %d\n", err);
189
190 return err;
191 }
192
mt7663s_tx_run_queue(struct mt76_dev * dev,enum mt76_txq_id qid)193 static int mt7663s_tx_run_queue(struct mt76_dev *dev, enum mt76_txq_id qid)
194 {
195 int err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0;
196 struct mt76_queue *q = dev->q_tx[qid];
197 struct mt76_sdio *sdio = &dev->sdio;
198 u8 pad;
199
200 while (q->first != q->head) {
201 struct mt76_queue_entry *e = &q->entry[q->first];
202 struct sk_buff *iter;
203
204 smp_rmb();
205
206 if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) {
207 __skb_put_zero(e->skb, 4);
208 err = __mt7663s_xmit_queue(dev, e->skb->data,
209 e->skb->len);
210 if (err)
211 return err;
212
213 goto next;
214 }
215
216 pad = roundup(e->skb->len, 4) - e->skb->len;
217 if (len + e->skb->len + pad + 4 > MT76S_XMIT_BUF_SZ)
218 break;
219
220 if (mt7663s_tx_pick_quota(sdio, qid, e->buf_sz, &pse_sz,
221 &ple_sz))
222 break;
223
224 memcpy(sdio->xmit_buf[qid] + len, e->skb->data,
225 skb_headlen(e->skb));
226 len += skb_headlen(e->skb);
227 nframes++;
228
229 skb_walk_frags(e->skb, iter) {
230 memcpy(sdio->xmit_buf[qid] + len, iter->data,
231 iter->len);
232 len += iter->len;
233 nframes++;
234 }
235
236 if (unlikely(pad)) {
237 memset(sdio->xmit_buf[qid] + len, 0, pad);
238 len += pad;
239 }
240 next:
241 q->first = (q->first + 1) % q->ndesc;
242 e->done = true;
243 }
244
245 if (nframes) {
246 memset(sdio->xmit_buf[qid] + len, 0, 4);
247 err = __mt7663s_xmit_queue(dev, sdio->xmit_buf[qid], len + 4);
248 if (err)
249 return err;
250 }
251 mt7663s_tx_update_quota(sdio, qid, pse_sz, ple_sz);
252
253 return nframes;
254 }
255
mt7663s_tx_work(struct work_struct * work)256 void mt7663s_tx_work(struct work_struct *work)
257 {
258 struct mt76_sdio *sdio = container_of(work, struct mt76_sdio,
259 tx.xmit_work);
260 struct mt76_dev *dev = container_of(sdio, struct mt76_dev, sdio);
261 int i, nframes = 0;
262
263 for (i = 0; i < MT_TXQ_MCU_WA; i++) {
264 int ret;
265
266 ret = mt7663s_tx_run_queue(dev, i);
267 if (ret < 0)
268 break;
269
270 nframes += ret;
271 }
272 if (nframes)
273 queue_work(sdio->txrx_wq, &sdio->tx.xmit_work);
274
275 queue_work(sdio->txrx_wq, &sdio->tx.status_work);
276 }
277
mt7663s_rx_work(struct work_struct * work)278 void mt7663s_rx_work(struct work_struct *work)
279 {
280 struct mt76_sdio *sdio = container_of(work, struct mt76_sdio,
281 rx.recv_work);
282 struct mt76_dev *dev = container_of(sdio, struct mt76_dev, sdio);
283 struct mt76s_intr *intr = sdio->intr_data;
284 int nframes = 0, ret;
285
286 /* disable interrupt */
287 sdio_claim_host(sdio->func);
288 sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL);
289 ret = sdio_readsb(sdio->func, intr, MCR_WHISR, sizeof(*intr));
290 sdio_release_host(sdio->func);
291
292 if (ret < 0)
293 goto out;
294
295 trace_dev_irq(dev, intr->isr, 0);
296
297 if (intr->isr & WHIER_RX0_DONE_INT_EN) {
298 ret = mt7663s_rx_run_queue(dev, 0, intr);
299 if (ret > 0) {
300 queue_work(sdio->txrx_wq, &sdio->rx.net_work);
301 nframes += ret;
302 }
303 }
304
305 if (intr->isr & WHIER_RX1_DONE_INT_EN) {
306 ret = mt7663s_rx_run_queue(dev, 1, intr);
307 if (ret > 0) {
308 queue_work(sdio->txrx_wq, &sdio->rx.net_work);
309 nframes += ret;
310 }
311 }
312
313 if (mt7663s_refill_sched_quota(dev, intr->tx.wtqcr))
314 queue_work(sdio->txrx_wq, &sdio->tx.xmit_work);
315
316 if (nframes) {
317 queue_work(sdio->txrx_wq, &sdio->rx.recv_work);
318 return;
319 }
320 out:
321 /* enable interrupt */
322 sdio_claim_host(sdio->func);
323 sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL);
324 sdio_release_host(sdio->func);
325 }
326
mt7663s_sdio_irq(struct sdio_func * func)327 void mt7663s_sdio_irq(struct sdio_func *func)
328 {
329 struct mt7615_dev *dev = sdio_get_drvdata(func);
330 struct mt76_sdio *sdio = &dev->mt76.sdio;
331
332 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mt76.phy.state))
333 return;
334
335 queue_work(sdio->txrx_wq, &sdio->rx.recv_work);
336 }
337