1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
38 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
39 struct event_arg *ea);
40 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
43
44 /* SRB Extensions ---------------------------------------------------------- */
45
46 void
qla2x00_sp_timeout(struct timer_list * t)47 qla2x00_sp_timeout(struct timer_list *t)
48 {
49 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
50 struct srb_iocb *iocb;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55 }
56
qla2x00_sp_free(srb_t * sp)57 void qla2x00_sp_free(srb_t *sp)
58 {
59 struct srb_iocb *iocb = &sp->u.iocb_cmd;
60
61 del_timer(&iocb->timer);
62 qla2x00_rel_sp(sp);
63 }
64
qla2xxx_rel_done_warning(srb_t * sp,int res)65 void qla2xxx_rel_done_warning(srb_t *sp, int res)
66 {
67 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
68 }
69
qla2xxx_rel_free_warning(srb_t * sp)70 void qla2xxx_rel_free_warning(srb_t *sp)
71 {
72 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
qla24xx_abort_iocb_timeout(void * data)97 static void qla24xx_abort_iocb_timeout(void *data)
98 {
99 srb_t *sp = data;
100 struct srb_iocb *abt = &sp->u.iocb_cmd;
101 struct qla_qpair *qpair = sp->qpair;
102 u32 handle;
103 unsigned long flags;
104
105 if (sp->cmd_sp)
106 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
107 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
108 sp->cmd_sp->handle, sp->cmd_sp->type,
109 sp->handle, sp->type);
110 else
111 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
112 "Abort timeout 2 - hdl=%x, type=%x\n",
113 sp->handle, sp->type);
114
115 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
116 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
117 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
118 sp->cmd_sp))
119 qpair->req->outstanding_cmds[handle] = NULL;
120
121 /* removing the abort */
122 if (qpair->req->outstanding_cmds[handle] == sp) {
123 qpair->req->outstanding_cmds[handle] = NULL;
124 break;
125 }
126 }
127 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
128
129 if (sp->cmd_sp)
130 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
131
132 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
133 sp->done(sp, QLA_OS_TIMER_EXPIRED);
134 }
135
qla24xx_abort_sp_done(srb_t * sp,int res)136 static void qla24xx_abort_sp_done(srb_t *sp, int res)
137 {
138 struct srb_iocb *abt = &sp->u.iocb_cmd;
139
140 del_timer(&sp->u.iocb_cmd.timer);
141 if (sp->flags & SRB_WAKEUP_ON_COMP)
142 complete(&abt->u.abt.comp);
143 else
144 sp->free(sp);
145 }
146
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)147 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
148 {
149 scsi_qla_host_t *vha = cmd_sp->vha;
150 struct srb_iocb *abt_iocb;
151 srb_t *sp;
152 int rval = QLA_FUNCTION_FAILED;
153
154 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
155 GFP_ATOMIC);
156 if (!sp)
157 return rval;
158
159 abt_iocb = &sp->u.iocb_cmd;
160 sp->type = SRB_ABT_CMD;
161 sp->name = "abort";
162 sp->qpair = cmd_sp->qpair;
163 sp->cmd_sp = cmd_sp;
164 if (wait)
165 sp->flags = SRB_WAKEUP_ON_COMP;
166
167 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
168 init_completion(&abt_iocb->u.abt.comp);
169 /* FW can send 2 x ABTS's timeout/20s */
170 qla2x00_init_timer(sp, 42);
171
172 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
173 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
174
175 sp->done = qla24xx_abort_sp_done;
176
177 ql_dbg(ql_dbg_async, vha, 0x507c,
178 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
179 cmd_sp->type);
180
181 rval = qla2x00_start_sp(sp);
182 if (rval != QLA_SUCCESS) {
183 sp->free(sp);
184 return rval;
185 }
186
187 if (wait) {
188 wait_for_completion(&abt_iocb->u.abt.comp);
189 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
190 QLA_SUCCESS : QLA_FUNCTION_FAILED;
191 sp->free(sp);
192 }
193
194 return rval;
195 }
196
197 void
qla2x00_async_iocb_timeout(void * data)198 qla2x00_async_iocb_timeout(void *data)
199 {
200 srb_t *sp = data;
201 fc_port_t *fcport = sp->fcport;
202 struct srb_iocb *lio = &sp->u.iocb_cmd;
203 int rc, h;
204 unsigned long flags;
205
206 if (fcport) {
207 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
208 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
209 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
210
211 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
212 } else {
213 pr_info("Async-%s timeout - hdl=%x.\n",
214 sp->name, sp->handle);
215 }
216
217 switch (sp->type) {
218 case SRB_LOGIN_CMD:
219 rc = qla24xx_async_abort_cmd(sp, false);
220 if (rc) {
221 /* Retry as needed. */
222 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
223 lio->u.logio.data[1] =
224 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
225 QLA_LOGIO_LOGIN_RETRIED : 0;
226 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
227 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
228 h++) {
229 if (sp->qpair->req->outstanding_cmds[h] ==
230 sp) {
231 sp->qpair->req->outstanding_cmds[h] =
232 NULL;
233 break;
234 }
235 }
236 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
237 sp->done(sp, QLA_FUNCTION_TIMEOUT);
238 }
239 break;
240 case SRB_LOGOUT_CMD:
241 case SRB_CT_PTHRU_CMD:
242 case SRB_MB_IOCB:
243 case SRB_NACK_PLOGI:
244 case SRB_NACK_PRLI:
245 case SRB_NACK_LOGO:
246 case SRB_CTRL_VP:
247 default:
248 rc = qla24xx_async_abort_cmd(sp, false);
249 if (rc) {
250 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
251 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
252 h++) {
253 if (sp->qpair->req->outstanding_cmds[h] ==
254 sp) {
255 sp->qpair->req->outstanding_cmds[h] =
256 NULL;
257 break;
258 }
259 }
260 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
261 sp->done(sp, QLA_FUNCTION_TIMEOUT);
262 }
263 break;
264 }
265 }
266
qla2x00_async_login_sp_done(srb_t * sp,int res)267 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
268 {
269 struct scsi_qla_host *vha = sp->vha;
270 struct srb_iocb *lio = &sp->u.iocb_cmd;
271 struct event_arg ea;
272
273 ql_dbg(ql_dbg_disc, vha, 0x20dd,
274 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
275
276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
277
278 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
279 memset(&ea, 0, sizeof(ea));
280 ea.fcport = sp->fcport;
281 ea.data[0] = lio->u.logio.data[0];
282 ea.data[1] = lio->u.logio.data[1];
283 ea.iop[0] = lio->u.logio.iop[0];
284 ea.iop[1] = lio->u.logio.iop[1];
285 ea.sp = sp;
286 qla24xx_handle_plogi_done_event(vha, &ea);
287 }
288
289 sp->free(sp);
290 }
291
292 static inline bool
fcport_is_smaller(fc_port_t * fcport)293 fcport_is_smaller(fc_port_t *fcport)
294 {
295 if (wwn_to_u64(fcport->port_name) <
296 wwn_to_u64(fcport->vha->port_name))
297 return true;
298 else
299 return false;
300 }
301
302 static inline bool
fcport_is_bigger(fc_port_t * fcport)303 fcport_is_bigger(fc_port_t *fcport)
304 {
305 return !fcport_is_smaller(fcport);
306 }
307
308 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)309 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
310 uint16_t *data)
311 {
312 srb_t *sp;
313 struct srb_iocb *lio;
314 int rval = QLA_FUNCTION_FAILED;
315
316 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
317 fcport->loop_id == FC_NO_LOOP_ID) {
318 ql_log(ql_log_warn, vha, 0xffff,
319 "%s: %8phC - not sending command.\n",
320 __func__, fcport->port_name);
321 return rval;
322 }
323
324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
325 if (!sp)
326 goto done;
327
328 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
329 fcport->flags |= FCF_ASYNC_SENT;
330 fcport->logout_completed = 0;
331
332 sp->type = SRB_LOGIN_CMD;
333 sp->name = "login";
334 sp->gen1 = fcport->rscn_gen;
335 sp->gen2 = fcport->login_gen;
336
337 lio = &sp->u.iocb_cmd;
338 lio->timeout = qla2x00_async_iocb_timeout;
339 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
340
341 sp->done = qla2x00_async_login_sp_done;
342 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
343 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
344 else
345 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
346
347 if (NVME_TARGET(vha->hw, fcport))
348 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
349
350 ql_dbg(ql_dbg_disc, vha, 0x2072,
351 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
352 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
353 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
354 fcport->login_retry);
355
356 rval = qla2x00_start_sp(sp);
357 if (rval != QLA_SUCCESS) {
358 fcport->flags |= FCF_LOGIN_NEEDED;
359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
360 goto done_free_sp;
361 }
362
363 return rval;
364
365 done_free_sp:
366 sp->free(sp);
367 fcport->flags &= ~FCF_ASYNC_SENT;
368 done:
369 fcport->flags &= ~FCF_ASYNC_ACTIVE;
370 return rval;
371 }
372
qla2x00_async_logout_sp_done(srb_t * sp,int res)373 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
374 {
375 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
376 sp->fcport->login_gen++;
377 qlt_logo_completion_handler(sp->fcport, res);
378 sp->free(sp);
379 }
380
381 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)382 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
383 {
384 srb_t *sp;
385 struct srb_iocb *lio;
386 int rval = QLA_FUNCTION_FAILED;
387
388 fcport->flags |= FCF_ASYNC_SENT;
389 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
390 if (!sp)
391 goto done;
392
393 sp->type = SRB_LOGOUT_CMD;
394 sp->name = "logout";
395
396 lio = &sp->u.iocb_cmd;
397 lio->timeout = qla2x00_async_iocb_timeout;
398 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
399
400 sp->done = qla2x00_async_logout_sp_done;
401
402 ql_dbg(ql_dbg_disc, vha, 0x2070,
403 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
404 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
405 fcport->d_id.b.area, fcport->d_id.b.al_pa,
406 fcport->port_name);
407
408 rval = qla2x00_start_sp(sp);
409 if (rval != QLA_SUCCESS)
410 goto done_free_sp;
411 return rval;
412
413 done_free_sp:
414 sp->free(sp);
415 done:
416 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
417 return rval;
418 }
419
420 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)421 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
422 uint16_t *data)
423 {
424 fcport->flags &= ~FCF_ASYNC_ACTIVE;
425 /* Don't re-login in target mode */
426 if (!fcport->tgt_session)
427 qla2x00_mark_device_lost(vha, fcport, 1);
428 qlt_logo_completion_handler(fcport, data[0]);
429 }
430
qla2x00_async_prlo_sp_done(srb_t * sp,int res)431 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
432 {
433 struct srb_iocb *lio = &sp->u.iocb_cmd;
434 struct scsi_qla_host *vha = sp->vha;
435
436 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
437 if (!test_bit(UNLOADING, &vha->dpc_flags))
438 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
439 lio->u.logio.data);
440 sp->free(sp);
441 }
442
443 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)444 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
445 {
446 srb_t *sp;
447 struct srb_iocb *lio;
448 int rval;
449
450 rval = QLA_FUNCTION_FAILED;
451 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
452 if (!sp)
453 goto done;
454
455 sp->type = SRB_PRLO_CMD;
456 sp->name = "prlo";
457
458 lio = &sp->u.iocb_cmd;
459 lio->timeout = qla2x00_async_iocb_timeout;
460 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
461
462 sp->done = qla2x00_async_prlo_sp_done;
463
464 ql_dbg(ql_dbg_disc, vha, 0x2070,
465 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
466 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
467 fcport->d_id.b.area, fcport->d_id.b.al_pa);
468
469 rval = qla2x00_start_sp(sp);
470 if (rval != QLA_SUCCESS)
471 goto done_free_sp;
472
473 return rval;
474
475 done_free_sp:
476 sp->free(sp);
477 done:
478 fcport->flags &= ~FCF_ASYNC_ACTIVE;
479 return rval;
480 }
481
482 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)483 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
484 {
485 struct fc_port *fcport = ea->fcport;
486
487 ql_dbg(ql_dbg_disc, vha, 0x20d2,
488 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
489 __func__, fcport->port_name, fcport->disc_state,
490 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
491 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
492
493 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
494 ea->data[0]);
495
496 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
497 ql_dbg(ql_dbg_disc, vha, 0x2066,
498 "%s %8phC: adisc fail: post delete\n",
499 __func__, ea->fcport->port_name);
500 /* deleted = 0 & logout_on_delete = force fw cleanup */
501 fcport->deleted = 0;
502 fcport->logout_on_delete = 1;
503 qlt_schedule_sess_for_deletion(ea->fcport);
504 return;
505 }
506
507 if (ea->fcport->disc_state == DSC_DELETE_PEND)
508 return;
509
510 if (ea->sp->gen2 != ea->fcport->login_gen) {
511 /* target side must have changed it. */
512 ql_dbg(ql_dbg_disc, vha, 0x20d3,
513 "%s %8phC generation changed\n",
514 __func__, ea->fcport->port_name);
515 return;
516 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
517 qla_rscn_replay(fcport);
518 qlt_schedule_sess_for_deletion(fcport);
519 return;
520 }
521
522 __qla24xx_handle_gpdb_event(vha, ea);
523 }
524
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)525 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
526 {
527 struct qla_work_evt *e;
528
529 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
530 if (!e)
531 return QLA_FUNCTION_FAILED;
532
533 e->u.fcport.fcport = fcport;
534 fcport->flags |= FCF_ASYNC_ACTIVE;
535 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
536 return qla2x00_post_work(vha, e);
537 }
538
qla2x00_async_adisc_sp_done(srb_t * sp,int res)539 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
540 {
541 struct scsi_qla_host *vha = sp->vha;
542 struct event_arg ea;
543 struct srb_iocb *lio = &sp->u.iocb_cmd;
544
545 ql_dbg(ql_dbg_disc, vha, 0x2066,
546 "Async done-%s res %x %8phC\n",
547 sp->name, res, sp->fcport->port_name);
548
549 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
550
551 memset(&ea, 0, sizeof(ea));
552 ea.rc = res;
553 ea.data[0] = lio->u.logio.data[0];
554 ea.data[1] = lio->u.logio.data[1];
555 ea.iop[0] = lio->u.logio.iop[0];
556 ea.iop[1] = lio->u.logio.iop[1];
557 ea.fcport = sp->fcport;
558 ea.sp = sp;
559
560 qla24xx_handle_adisc_event(vha, &ea);
561
562 sp->free(sp);
563 }
564
565 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)566 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
567 uint16_t *data)
568 {
569 srb_t *sp;
570 struct srb_iocb *lio;
571 int rval = QLA_FUNCTION_FAILED;
572
573 if (IS_SESSION_DELETED(fcport)) {
574 ql_log(ql_log_warn, vha, 0xffff,
575 "%s: %8phC is being delete - not sending command.\n",
576 __func__, fcport->port_name);
577 fcport->flags &= ~FCF_ASYNC_ACTIVE;
578 return rval;
579 }
580
581 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
582 return rval;
583
584 fcport->flags |= FCF_ASYNC_SENT;
585 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
586 if (!sp)
587 goto done;
588
589 sp->type = SRB_ADISC_CMD;
590 sp->name = "adisc";
591
592 lio = &sp->u.iocb_cmd;
593 lio->timeout = qla2x00_async_iocb_timeout;
594 sp->gen1 = fcport->rscn_gen;
595 sp->gen2 = fcport->login_gen;
596 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
597
598 sp->done = qla2x00_async_adisc_sp_done;
599 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
600 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
601
602 ql_dbg(ql_dbg_disc, vha, 0x206f,
603 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
604 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
605
606 rval = qla2x00_start_sp(sp);
607 if (rval != QLA_SUCCESS)
608 goto done_free_sp;
609
610 return rval;
611
612 done_free_sp:
613 sp->free(sp);
614 done:
615 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
616 qla2x00_post_async_adisc_work(vha, fcport, data);
617 return rval;
618 }
619
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)620 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
621 {
622 struct qla_hw_data *ha = vha->hw;
623
624 if (IS_FWI2_CAPABLE(ha))
625 return loop_id > NPH_LAST_HANDLE;
626
627 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
628 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
629 }
630
631 /**
632 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
633 * @vha: adapter state pointer.
634 * @dev: port structure pointer.
635 *
636 * Returns:
637 * qla2x00 local function return status code.
638 *
639 * Context:
640 * Kernel context.
641 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)642 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
643 {
644 int rval;
645 struct qla_hw_data *ha = vha->hw;
646 unsigned long flags = 0;
647
648 rval = QLA_SUCCESS;
649
650 spin_lock_irqsave(&ha->vport_slock, flags);
651
652 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
653 if (dev->loop_id >= LOOPID_MAP_SIZE ||
654 qla2x00_is_reserved_id(vha, dev->loop_id)) {
655 dev->loop_id = FC_NO_LOOP_ID;
656 rval = QLA_FUNCTION_FAILED;
657 } else {
658 set_bit(dev->loop_id, ha->loop_id_map);
659 }
660 spin_unlock_irqrestore(&ha->vport_slock, flags);
661
662 if (rval == QLA_SUCCESS)
663 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
664 "Assigning new loopid=%x, portid=%x.\n",
665 dev->loop_id, dev->d_id.b24);
666 else
667 ql_log(ql_log_warn, dev->vha, 0x2087,
668 "No loop_id's available, portid=%x.\n",
669 dev->d_id.b24);
670
671 return rval;
672 }
673
qla2x00_clear_loop_id(fc_port_t * fcport)674 void qla2x00_clear_loop_id(fc_port_t *fcport)
675 {
676 struct qla_hw_data *ha = fcport->vha->hw;
677
678 if (fcport->loop_id == FC_NO_LOOP_ID ||
679 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
680 return;
681
682 clear_bit(fcport->loop_id, ha->loop_id_map);
683 fcport->loop_id = FC_NO_LOOP_ID;
684 }
685
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)686 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
687 struct event_arg *ea)
688 {
689 fc_port_t *fcport, *conflict_fcport;
690 struct get_name_list_extended *e;
691 u16 i, n, found = 0, loop_id;
692 port_id_t id;
693 u64 wwn;
694 u16 data[2];
695 u8 current_login_state, nvme_cls;
696
697 fcport = ea->fcport;
698 ql_dbg(ql_dbg_disc, vha, 0xffff,
699 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
700 __func__, fcport->port_name, fcport->disc_state,
701 fcport->fw_login_state, ea->rc,
702 fcport->login_gen, fcport->last_login_gen,
703 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
704
705 if (fcport->disc_state == DSC_DELETE_PEND)
706 return;
707
708 if (ea->rc) { /* rval */
709 if (fcport->login_retry == 0) {
710 ql_dbg(ql_dbg_disc, vha, 0x20de,
711 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
712 fcport->port_name, fcport->login_retry);
713 }
714 return;
715 }
716
717 if (fcport->last_rscn_gen != fcport->rscn_gen) {
718 qla_rscn_replay(fcport);
719 qlt_schedule_sess_for_deletion(fcport);
720 return;
721 } else if (fcport->last_login_gen != fcport->login_gen) {
722 ql_dbg(ql_dbg_disc, vha, 0x20e0,
723 "%s %8phC login gen changed\n",
724 __func__, fcport->port_name);
725 return;
726 }
727
728 n = ea->data[0] / sizeof(struct get_name_list_extended);
729
730 ql_dbg(ql_dbg_disc, vha, 0x20e1,
731 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
732 __func__, __LINE__, fcport->port_name, n,
733 fcport->d_id.b.domain, fcport->d_id.b.area,
734 fcport->d_id.b.al_pa, fcport->loop_id);
735
736 for (i = 0; i < n; i++) {
737 e = &vha->gnl.l[i];
738 wwn = wwn_to_u64(e->port_name);
739 id.b.domain = e->port_id[2];
740 id.b.area = e->port_id[1];
741 id.b.al_pa = e->port_id[0];
742 id.b.rsvd_1 = 0;
743
744 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
745 continue;
746
747 if (IS_SW_RESV_ADDR(id))
748 continue;
749
750 found = 1;
751
752 loop_id = le16_to_cpu(e->nport_handle);
753 loop_id = (loop_id & 0x7fff);
754 nvme_cls = e->current_login_state >> 4;
755 current_login_state = e->current_login_state & 0xf;
756
757 if (PRLI_PHASE(nvme_cls)) {
758 current_login_state = nvme_cls;
759 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
760 fcport->fc4_type |= FS_FC4TYPE_NVME;
761 } else if (PRLI_PHASE(current_login_state)) {
762 fcport->fc4_type |= FS_FC4TYPE_FCP;
763 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
764 }
765
766 ql_dbg(ql_dbg_disc, vha, 0x20e2,
767 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
768 __func__, fcport->port_name,
769 e->current_login_state, fcport->fw_login_state,
770 fcport->fc4_type, id.b24, fcport->d_id.b24,
771 loop_id, fcport->loop_id);
772
773 switch (fcport->disc_state) {
774 case DSC_DELETE_PEND:
775 case DSC_DELETED:
776 break;
777 default:
778 if ((id.b24 != fcport->d_id.b24 &&
779 fcport->d_id.b24 &&
780 fcport->loop_id != FC_NO_LOOP_ID) ||
781 (fcport->loop_id != FC_NO_LOOP_ID &&
782 fcport->loop_id != loop_id)) {
783 ql_dbg(ql_dbg_disc, vha, 0x20e3,
784 "%s %d %8phC post del sess\n",
785 __func__, __LINE__, fcport->port_name);
786 if (fcport->n2n_flag)
787 fcport->d_id.b24 = 0;
788 qlt_schedule_sess_for_deletion(fcport);
789 return;
790 }
791 break;
792 }
793
794 fcport->loop_id = loop_id;
795 if (fcport->n2n_flag)
796 fcport->d_id.b24 = id.b24;
797
798 wwn = wwn_to_u64(fcport->port_name);
799 qlt_find_sess_invalidate_other(vha, wwn,
800 id, loop_id, &conflict_fcport);
801
802 if (conflict_fcport) {
803 /*
804 * Another share fcport share the same loop_id &
805 * nport id. Conflict fcport needs to finish
806 * cleanup before this fcport can proceed to login.
807 */
808 conflict_fcport->conflict = fcport;
809 fcport->login_pause = 1;
810 }
811
812 switch (vha->hw->current_topology) {
813 default:
814 switch (current_login_state) {
815 case DSC_LS_PRLI_COMP:
816 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
817 vha, 0x20e4, "%s %d %8phC post gpdb\n",
818 __func__, __LINE__, fcport->port_name);
819
820 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
821 fcport->port_type = FCT_INITIATOR;
822 else
823 fcport->port_type = FCT_TARGET;
824 data[0] = data[1] = 0;
825 qla2x00_post_async_adisc_work(vha, fcport,
826 data);
827 break;
828 case DSC_LS_PORT_UNAVAIL:
829 default:
830 if (fcport->loop_id == FC_NO_LOOP_ID) {
831 qla2x00_find_new_loop_id(vha, fcport);
832 fcport->fw_login_state =
833 DSC_LS_PORT_UNAVAIL;
834 }
835 ql_dbg(ql_dbg_disc, vha, 0x20e5,
836 "%s %d %8phC\n", __func__, __LINE__,
837 fcport->port_name);
838 qla24xx_fcport_handle_login(vha, fcport);
839 break;
840 }
841 break;
842 case ISP_CFG_N:
843 fcport->fw_login_state = current_login_state;
844 fcport->d_id = id;
845 switch (current_login_state) {
846 case DSC_LS_PRLI_PEND:
847 /*
848 * In the middle of PRLI. Let it finish.
849 * Allow relogin code to recheck state again
850 * with GNL. Push disc_state back to DELETED
851 * so GNL can go out again
852 */
853 qla2x00_set_fcport_disc_state(fcport,
854 DSC_DELETED);
855 break;
856 case DSC_LS_PRLI_COMP:
857 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
858 fcport->port_type = FCT_INITIATOR;
859 else
860 fcport->port_type = FCT_TARGET;
861
862 data[0] = data[1] = 0;
863 qla2x00_post_async_adisc_work(vha, fcport,
864 data);
865 break;
866 case DSC_LS_PLOGI_COMP:
867 if (fcport_is_bigger(fcport)) {
868 /* local adapter is smaller */
869 if (fcport->loop_id != FC_NO_LOOP_ID)
870 qla2x00_clear_loop_id(fcport);
871
872 fcport->loop_id = loop_id;
873 qla24xx_fcport_handle_login(vha,
874 fcport);
875 break;
876 }
877 fallthrough;
878 default:
879 if (fcport_is_smaller(fcport)) {
880 /* local adapter is bigger */
881 if (fcport->loop_id != FC_NO_LOOP_ID)
882 qla2x00_clear_loop_id(fcport);
883
884 fcport->loop_id = loop_id;
885 qla24xx_fcport_handle_login(vha,
886 fcport);
887 }
888 break;
889 }
890 break;
891 } /* switch (ha->current_topology) */
892 }
893
894 if (!found) {
895 switch (vha->hw->current_topology) {
896 case ISP_CFG_F:
897 case ISP_CFG_FL:
898 for (i = 0; i < n; i++) {
899 e = &vha->gnl.l[i];
900 id.b.domain = e->port_id[0];
901 id.b.area = e->port_id[1];
902 id.b.al_pa = e->port_id[2];
903 id.b.rsvd_1 = 0;
904 loop_id = le16_to_cpu(e->nport_handle);
905
906 if (fcport->d_id.b24 == id.b24) {
907 conflict_fcport =
908 qla2x00_find_fcport_by_wwpn(vha,
909 e->port_name, 0);
910 if (conflict_fcport) {
911 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
912 vha, 0x20e5,
913 "%s %d %8phC post del sess\n",
914 __func__, __LINE__,
915 conflict_fcport->port_name);
916 qlt_schedule_sess_for_deletion
917 (conflict_fcport);
918 }
919 }
920 /*
921 * FW already picked this loop id for
922 * another fcport
923 */
924 if (fcport->loop_id == loop_id)
925 fcport->loop_id = FC_NO_LOOP_ID;
926 }
927 qla24xx_fcport_handle_login(vha, fcport);
928 break;
929 case ISP_CFG_N:
930 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
931 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
932 if (fcport->n2n_link_reset_cnt < 2) {
933 fcport->n2n_link_reset_cnt++;
934 /*
935 * remote port is not sending PLOGI.
936 * Reset link to kick start his state
937 * machine
938 */
939 set_bit(N2N_LINK_RESET,
940 &vha->dpc_flags);
941 } else {
942 if (fcport->n2n_chip_reset < 1) {
943 ql_log(ql_log_info, vha, 0x705d,
944 "Chip reset to bring laser down");
945 set_bit(ISP_ABORT_NEEDED,
946 &vha->dpc_flags);
947 fcport->n2n_chip_reset++;
948 } else {
949 ql_log(ql_log_info, vha, 0x705d,
950 "Remote port %8ph is not coming back\n",
951 fcport->port_name);
952 fcport->scan_state = 0;
953 }
954 }
955 qla2xxx_wake_dpc(vha);
956 } else {
957 /*
958 * report port suppose to do PLOGI. Give him
959 * more time. FW will catch it.
960 */
961 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
962 }
963 break;
964 case ISP_CFG_NL:
965 qla24xx_fcport_handle_login(vha, fcport);
966 break;
967 default:
968 break;
969 }
970 }
971 } /* gnl_event */
972
qla24xx_async_gnl_sp_done(srb_t * sp,int res)973 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
974 {
975 struct scsi_qla_host *vha = sp->vha;
976 unsigned long flags;
977 struct fc_port *fcport = NULL, *tf;
978 u16 i, n = 0, loop_id;
979 struct event_arg ea;
980 struct get_name_list_extended *e;
981 u64 wwn;
982 struct list_head h;
983 bool found = false;
984
985 ql_dbg(ql_dbg_disc, vha, 0x20e7,
986 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
987 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
988 sp->u.iocb_cmd.u.mbx.in_mb[2]);
989
990
991 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
992 memset(&ea, 0, sizeof(ea));
993 ea.sp = sp;
994 ea.rc = res;
995
996 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
997 sizeof(struct get_name_list_extended)) {
998 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
999 sizeof(struct get_name_list_extended);
1000 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1001 }
1002
1003 for (i = 0; i < n; i++) {
1004 e = &vha->gnl.l[i];
1005 loop_id = le16_to_cpu(e->nport_handle);
1006 /* mask out reserve bit */
1007 loop_id = (loop_id & 0x7fff);
1008 set_bit(loop_id, vha->hw->loop_id_map);
1009 wwn = wwn_to_u64(e->port_name);
1010
1011 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1012 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1013 __func__, &wwn, e->port_id[2], e->port_id[1],
1014 e->port_id[0], e->current_login_state, e->last_login_state,
1015 (loop_id & 0x7fff));
1016 }
1017
1018 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1019
1020 INIT_LIST_HEAD(&h);
1021 fcport = tf = NULL;
1022 if (!list_empty(&vha->gnl.fcports))
1023 list_splice_init(&vha->gnl.fcports, &h);
1024 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1025
1026 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1027 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1028 list_del_init(&fcport->gnl_entry);
1029 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1030 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1031 ea.fcport = fcport;
1032
1033 qla24xx_handle_gnl_done_event(vha, &ea);
1034 }
1035
1036 /* create new fcport if fw has knowledge of new sessions */
1037 for (i = 0; i < n; i++) {
1038 port_id_t id;
1039 u64 wwnn;
1040
1041 e = &vha->gnl.l[i];
1042 wwn = wwn_to_u64(e->port_name);
1043
1044 found = false;
1045 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1046 if (!memcmp((u8 *)&wwn, fcport->port_name,
1047 WWN_SIZE)) {
1048 found = true;
1049 break;
1050 }
1051 }
1052
1053 id.b.domain = e->port_id[2];
1054 id.b.area = e->port_id[1];
1055 id.b.al_pa = e->port_id[0];
1056 id.b.rsvd_1 = 0;
1057
1058 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1059 ql_dbg(ql_dbg_disc, vha, 0x2065,
1060 "%s %d %8phC %06x post new sess\n",
1061 __func__, __LINE__, (u8 *)&wwn, id.b24);
1062 wwnn = wwn_to_u64(e->node_name);
1063 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1064 (u8 *)&wwnn, NULL, 0);
1065 }
1066 }
1067
1068 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1069 vha->gnl.sent = 0;
1070 if (!list_empty(&vha->gnl.fcports)) {
1071 /* retrigger gnl */
1072 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1073 gnl_entry) {
1074 list_del_init(&fcport->gnl_entry);
1075 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1076 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1077 break;
1078 }
1079 }
1080 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1081
1082 sp->free(sp);
1083 }
1084
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1085 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1086 {
1087 srb_t *sp;
1088 struct srb_iocb *mbx;
1089 int rval = QLA_FUNCTION_FAILED;
1090 unsigned long flags;
1091 u16 *mb;
1092
1093 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1094 return rval;
1095
1096 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1097 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1098
1099 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1100 fcport->flags |= FCF_ASYNC_SENT;
1101 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1102 fcport->last_rscn_gen = fcport->rscn_gen;
1103 fcport->last_login_gen = fcport->login_gen;
1104
1105 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1106 if (vha->gnl.sent) {
1107 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1108 return QLA_SUCCESS;
1109 }
1110 vha->gnl.sent = 1;
1111 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1112
1113 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1114 if (!sp)
1115 goto done;
1116
1117 sp->type = SRB_MB_IOCB;
1118 sp->name = "gnlist";
1119 sp->gen1 = fcport->rscn_gen;
1120 sp->gen2 = fcport->login_gen;
1121
1122 mbx = &sp->u.iocb_cmd;
1123 mbx->timeout = qla2x00_async_iocb_timeout;
1124 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1125
1126 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1127 mb[0] = MBC_PORT_NODE_NAME_LIST;
1128 mb[1] = BIT_2 | BIT_3;
1129 mb[2] = MSW(vha->gnl.ldma);
1130 mb[3] = LSW(vha->gnl.ldma);
1131 mb[6] = MSW(MSD(vha->gnl.ldma));
1132 mb[7] = LSW(MSD(vha->gnl.ldma));
1133 mb[8] = vha->gnl.size;
1134 mb[9] = vha->vp_idx;
1135
1136 sp->done = qla24xx_async_gnl_sp_done;
1137
1138 ql_dbg(ql_dbg_disc, vha, 0x20da,
1139 "Async-%s - OUT WWPN %8phC hndl %x\n",
1140 sp->name, fcport->port_name, sp->handle);
1141
1142 rval = qla2x00_start_sp(sp);
1143 if (rval != QLA_SUCCESS)
1144 goto done_free_sp;
1145
1146 return rval;
1147
1148 done_free_sp:
1149 sp->free(sp);
1150 done:
1151 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1152 return rval;
1153 }
1154
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1155 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1156 {
1157 struct qla_work_evt *e;
1158
1159 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1160 if (!e)
1161 return QLA_FUNCTION_FAILED;
1162
1163 e->u.fcport.fcport = fcport;
1164 fcport->flags |= FCF_ASYNC_ACTIVE;
1165 return qla2x00_post_work(vha, e);
1166 }
1167
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1168 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1169 {
1170 struct scsi_qla_host *vha = sp->vha;
1171 struct qla_hw_data *ha = vha->hw;
1172 fc_port_t *fcport = sp->fcport;
1173 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1174 struct event_arg ea;
1175
1176 ql_dbg(ql_dbg_disc, vha, 0x20db,
1177 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1178 sp->name, res, fcport->port_name, mb[1], mb[2]);
1179
1180 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1181
1182 if (res == QLA_FUNCTION_TIMEOUT)
1183 goto done;
1184
1185 memset(&ea, 0, sizeof(ea));
1186 ea.fcport = fcport;
1187 ea.sp = sp;
1188
1189 qla24xx_handle_gpdb_event(vha, &ea);
1190
1191 done:
1192 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1193 sp->u.iocb_cmd.u.mbx.in_dma);
1194
1195 sp->free(sp);
1196 }
1197
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1198 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1199 {
1200 struct qla_work_evt *e;
1201
1202 if (vha->host->active_mode == MODE_TARGET)
1203 return QLA_FUNCTION_FAILED;
1204
1205 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1206 if (!e)
1207 return QLA_FUNCTION_FAILED;
1208
1209 e->u.fcport.fcport = fcport;
1210
1211 return qla2x00_post_work(vha, e);
1212 }
1213
qla2x00_async_prli_sp_done(srb_t * sp,int res)1214 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1215 {
1216 struct scsi_qla_host *vha = sp->vha;
1217 struct srb_iocb *lio = &sp->u.iocb_cmd;
1218 struct event_arg ea;
1219
1220 ql_dbg(ql_dbg_disc, vha, 0x2129,
1221 "%s %8phC res %d \n", __func__,
1222 sp->fcport->port_name, res);
1223
1224 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1225
1226 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1227 memset(&ea, 0, sizeof(ea));
1228 ea.fcport = sp->fcport;
1229 ea.data[0] = lio->u.logio.data[0];
1230 ea.data[1] = lio->u.logio.data[1];
1231 ea.iop[0] = lio->u.logio.iop[0];
1232 ea.iop[1] = lio->u.logio.iop[1];
1233 ea.sp = sp;
1234
1235 qla24xx_handle_prli_done_event(vha, &ea);
1236 }
1237
1238 sp->free(sp);
1239 }
1240
1241 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1242 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1243 {
1244 srb_t *sp;
1245 struct srb_iocb *lio;
1246 int rval = QLA_FUNCTION_FAILED;
1247
1248 if (!vha->flags.online) {
1249 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1250 __func__, __LINE__, fcport->port_name);
1251 return rval;
1252 }
1253
1254 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1255 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1256 qla_dual_mode_enabled(vha)) {
1257 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1258 __func__, __LINE__, fcport->port_name);
1259 return rval;
1260 }
1261
1262 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1263 if (!sp)
1264 return rval;
1265
1266 fcport->flags |= FCF_ASYNC_SENT;
1267 fcport->logout_completed = 0;
1268
1269 sp->type = SRB_PRLI_CMD;
1270 sp->name = "prli";
1271
1272 lio = &sp->u.iocb_cmd;
1273 lio->timeout = qla2x00_async_iocb_timeout;
1274 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1275
1276 sp->done = qla2x00_async_prli_sp_done;
1277 lio->u.logio.flags = 0;
1278
1279 if (NVME_TARGET(vha->hw, fcport))
1280 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1281
1282 ql_dbg(ql_dbg_disc, vha, 0x211b,
1283 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1284 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1285 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1286 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1287
1288 rval = qla2x00_start_sp(sp);
1289 if (rval != QLA_SUCCESS) {
1290 fcport->flags |= FCF_LOGIN_NEEDED;
1291 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1292 goto done_free_sp;
1293 }
1294
1295 return rval;
1296
1297 done_free_sp:
1298 sp->free(sp);
1299 fcport->flags &= ~FCF_ASYNC_SENT;
1300 return rval;
1301 }
1302
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1303 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1304 {
1305 struct qla_work_evt *e;
1306
1307 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1308 if (!e)
1309 return QLA_FUNCTION_FAILED;
1310
1311 e->u.fcport.fcport = fcport;
1312 e->u.fcport.opt = opt;
1313 fcport->flags |= FCF_ASYNC_ACTIVE;
1314 return qla2x00_post_work(vha, e);
1315 }
1316
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1317 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1318 {
1319 srb_t *sp;
1320 struct srb_iocb *mbx;
1321 int rval = QLA_FUNCTION_FAILED;
1322 u16 *mb;
1323 dma_addr_t pd_dma;
1324 struct port_database_24xx *pd;
1325 struct qla_hw_data *ha = vha->hw;
1326
1327 if (IS_SESSION_DELETED(fcport)) {
1328 ql_log(ql_log_warn, vha, 0xffff,
1329 "%s: %8phC is being delete - not sending command.\n",
1330 __func__, fcport->port_name);
1331 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1332 return rval;
1333 }
1334
1335 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1336 ql_log(ql_log_warn, vha, 0xffff,
1337 "%s: %8phC online %d flags %x - not sending command.\n",
1338 __func__, fcport->port_name, vha->flags.online, fcport->flags);
1339 goto done;
1340 }
1341
1342 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1343 if (!sp)
1344 goto done;
1345
1346 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1347
1348 fcport->flags |= FCF_ASYNC_SENT;
1349 sp->type = SRB_MB_IOCB;
1350 sp->name = "gpdb";
1351 sp->gen1 = fcport->rscn_gen;
1352 sp->gen2 = fcport->login_gen;
1353
1354 mbx = &sp->u.iocb_cmd;
1355 mbx->timeout = qla2x00_async_iocb_timeout;
1356 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1357
1358 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1359 if (pd == NULL) {
1360 ql_log(ql_log_warn, vha, 0xd043,
1361 "Failed to allocate port database structure.\n");
1362 goto done_free_sp;
1363 }
1364
1365 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1366 mb[0] = MBC_GET_PORT_DATABASE;
1367 mb[1] = fcport->loop_id;
1368 mb[2] = MSW(pd_dma);
1369 mb[3] = LSW(pd_dma);
1370 mb[6] = MSW(MSD(pd_dma));
1371 mb[7] = LSW(MSD(pd_dma));
1372 mb[9] = vha->vp_idx;
1373 mb[10] = opt;
1374
1375 mbx->u.mbx.in = pd;
1376 mbx->u.mbx.in_dma = pd_dma;
1377
1378 sp->done = qla24xx_async_gpdb_sp_done;
1379
1380 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1381 "Async-%s %8phC hndl %x opt %x\n",
1382 sp->name, fcport->port_name, sp->handle, opt);
1383
1384 rval = qla2x00_start_sp(sp);
1385 if (rval != QLA_SUCCESS)
1386 goto done_free_sp;
1387 return rval;
1388
1389 done_free_sp:
1390 if (pd)
1391 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1392
1393 sp->free(sp);
1394 fcport->flags &= ~FCF_ASYNC_SENT;
1395 done:
1396 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1397 qla24xx_post_gpdb_work(vha, fcport, opt);
1398 return rval;
1399 }
1400
1401 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1402 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1403 {
1404 unsigned long flags;
1405
1406 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1407 ea->fcport->login_gen++;
1408 ea->fcport->deleted = 0;
1409 ea->fcport->logout_on_delete = 1;
1410
1411 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1412 vha->fcport_count++;
1413 ea->fcport->login_succ = 1;
1414
1415 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1416 qla24xx_sched_upd_fcport(ea->fcport);
1417 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1418 } else if (ea->fcport->login_succ) {
1419 /*
1420 * We have an existing session. A late RSCN delivery
1421 * must have triggered the session to be re-validate.
1422 * Session is still valid.
1423 */
1424 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1425 "%s %d %8phC session revalidate success\n",
1426 __func__, __LINE__, ea->fcport->port_name);
1427 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1428 }
1429 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1430 }
1431
1432 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1433 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1434 {
1435 fc_port_t *fcport = ea->fcport;
1436 struct port_database_24xx *pd;
1437 struct srb *sp = ea->sp;
1438 uint8_t ls;
1439
1440 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1441
1442 fcport->flags &= ~FCF_ASYNC_SENT;
1443
1444 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1445 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
1446 fcport->port_name, fcport->disc_state, pd->current_login_state,
1447 fcport->fc4_type, ea->rc);
1448
1449 if (fcport->disc_state == DSC_DELETE_PEND)
1450 return;
1451
1452 if (NVME_TARGET(vha->hw, fcport))
1453 ls = pd->current_login_state >> 4;
1454 else
1455 ls = pd->current_login_state & 0xf;
1456
1457 if (ea->sp->gen2 != fcport->login_gen) {
1458 /* target side must have changed it. */
1459
1460 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1461 "%s %8phC generation changed\n",
1462 __func__, fcport->port_name);
1463 return;
1464 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1465 qla_rscn_replay(fcport);
1466 qlt_schedule_sess_for_deletion(fcport);
1467 return;
1468 }
1469
1470 switch (ls) {
1471 case PDS_PRLI_COMPLETE:
1472 __qla24xx_parse_gpdb(vha, fcport, pd);
1473 break;
1474 case PDS_PLOGI_PENDING:
1475 case PDS_PLOGI_COMPLETE:
1476 case PDS_PRLI_PENDING:
1477 case PDS_PRLI2_PENDING:
1478 /* Set discovery state back to GNL to Relogin attempt */
1479 if (qla_dual_mode_enabled(vha) ||
1480 qla_ini_mode_enabled(vha)) {
1481 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1482 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1483 }
1484 return;
1485 case PDS_LOGO_PENDING:
1486 case PDS_PORT_UNAVAILABLE:
1487 default:
1488 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1489 __func__, __LINE__, fcport->port_name);
1490 qlt_schedule_sess_for_deletion(fcport);
1491 return;
1492 }
1493 __qla24xx_handle_gpdb_event(vha, ea);
1494 } /* gpdb event */
1495
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1496 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1497 {
1498 u8 login = 0;
1499 int rc;
1500
1501 ql_dbg(ql_dbg_disc, vha, 0x307b,
1502 "%s %8phC DS %d LS %d lid %d retries=%d\n",
1503 __func__, fcport->port_name, fcport->disc_state,
1504 fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1505
1506 if (qla_tgt_mode_enabled(vha))
1507 return;
1508
1509 if (qla_dual_mode_enabled(vha)) {
1510 if (N2N_TOPO(vha->hw)) {
1511 u64 mywwn, wwn;
1512
1513 mywwn = wwn_to_u64(vha->port_name);
1514 wwn = wwn_to_u64(fcport->port_name);
1515 if (mywwn > wwn)
1516 login = 1;
1517 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1518 && time_after_eq(jiffies,
1519 fcport->plogi_nack_done_deadline))
1520 login = 1;
1521 } else {
1522 login = 1;
1523 }
1524 } else {
1525 /* initiator mode */
1526 login = 1;
1527 }
1528
1529 if (login && fcport->login_retry) {
1530 fcport->login_retry--;
1531 if (fcport->loop_id == FC_NO_LOOP_ID) {
1532 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1533 rc = qla2x00_find_new_loop_id(vha, fcport);
1534 if (rc) {
1535 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1536 "%s %d %8phC post del sess - out of loopid\n",
1537 __func__, __LINE__, fcport->port_name);
1538 fcport->scan_state = 0;
1539 qlt_schedule_sess_for_deletion(fcport);
1540 return;
1541 }
1542 }
1543 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1544 "%s %d %8phC post login\n",
1545 __func__, __LINE__, fcport->port_name);
1546 qla2x00_post_async_login_work(vha, fcport, NULL);
1547 }
1548 }
1549
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1550 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1551 {
1552 u16 data[2];
1553 u64 wwn;
1554 u16 sec;
1555
1556 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1557 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1558 __func__, fcport->port_name, fcport->disc_state,
1559 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1560 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1561 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1562
1563 if (fcport->scan_state != QLA_FCPORT_FOUND ||
1564 fcport->disc_state == DSC_DELETE_PEND)
1565 return 0;
1566
1567 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1568 qla_dual_mode_enabled(vha) &&
1569 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1570 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1571 return 0;
1572
1573 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1574 !N2N_TOPO(vha->hw)) {
1575 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1576 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1577 return 0;
1578 }
1579 }
1580
1581 /* Target won't initiate port login if fabric is present */
1582 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1583 return 0;
1584
1585 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1586 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1587 return 0;
1588 }
1589
1590 switch (fcport->disc_state) {
1591 case DSC_DELETED:
1592 wwn = wwn_to_u64(fcport->node_name);
1593 switch (vha->hw->current_topology) {
1594 case ISP_CFG_N:
1595 if (fcport_is_smaller(fcport)) {
1596 /* this adapter is bigger */
1597 if (fcport->login_retry) {
1598 if (fcport->loop_id == FC_NO_LOOP_ID) {
1599 qla2x00_find_new_loop_id(vha,
1600 fcport);
1601 fcport->fw_login_state =
1602 DSC_LS_PORT_UNAVAIL;
1603 }
1604 fcport->login_retry--;
1605 qla_post_els_plogi_work(vha, fcport);
1606 } else {
1607 ql_log(ql_log_info, vha, 0x705d,
1608 "Unable to reach remote port %8phC",
1609 fcport->port_name);
1610 }
1611 } else {
1612 qla24xx_post_gnl_work(vha, fcport);
1613 }
1614 break;
1615 default:
1616 if (wwn == 0) {
1617 ql_dbg(ql_dbg_disc, vha, 0xffff,
1618 "%s %d %8phC post GNNID\n",
1619 __func__, __LINE__, fcport->port_name);
1620 qla24xx_post_gnnid_work(vha, fcport);
1621 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1622 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1623 "%s %d %8phC post gnl\n",
1624 __func__, __LINE__, fcport->port_name);
1625 qla24xx_post_gnl_work(vha, fcport);
1626 } else {
1627 qla_chk_n2n_b4_login(vha, fcport);
1628 }
1629 break;
1630 }
1631 break;
1632
1633 case DSC_GNL:
1634 switch (vha->hw->current_topology) {
1635 case ISP_CFG_N:
1636 if ((fcport->current_login_state & 0xf) == 0x6) {
1637 ql_dbg(ql_dbg_disc, vha, 0x2118,
1638 "%s %d %8phC post GPDB work\n",
1639 __func__, __LINE__, fcport->port_name);
1640 fcport->chip_reset =
1641 vha->hw->base_qpair->chip_reset;
1642 qla24xx_post_gpdb_work(vha, fcport, 0);
1643 } else {
1644 ql_dbg(ql_dbg_disc, vha, 0x2118,
1645 "%s %d %8phC post %s PRLI\n",
1646 __func__, __LINE__, fcport->port_name,
1647 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1648 "FC");
1649 qla24xx_post_prli_work(vha, fcport);
1650 }
1651 break;
1652 default:
1653 if (fcport->login_pause) {
1654 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1655 "%s %d %8phC exit\n",
1656 __func__, __LINE__,
1657 fcport->port_name);
1658 fcport->last_rscn_gen = fcport->rscn_gen;
1659 fcport->last_login_gen = fcport->login_gen;
1660 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1661 break;
1662 }
1663 qla_chk_n2n_b4_login(vha, fcport);
1664 break;
1665 }
1666 break;
1667
1668 case DSC_LOGIN_FAILED:
1669 if (N2N_TOPO(vha->hw))
1670 qla_chk_n2n_b4_login(vha, fcport);
1671 else
1672 qlt_schedule_sess_for_deletion(fcport);
1673 break;
1674
1675 case DSC_LOGIN_COMPLETE:
1676 /* recheck login state */
1677 data[0] = data[1] = 0;
1678 qla2x00_post_async_adisc_work(vha, fcport, data);
1679 break;
1680
1681 case DSC_LOGIN_PEND:
1682 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1683 qla24xx_post_prli_work(vha, fcport);
1684 break;
1685
1686 case DSC_UPD_FCPORT:
1687 sec = jiffies_to_msecs(jiffies -
1688 fcport->jiffies_at_registration)/1000;
1689 if (fcport->sec_since_registration < sec && sec &&
1690 !(sec % 60)) {
1691 fcport->sec_since_registration = sec;
1692 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1693 "%s %8phC - Slow Rport registration(%d Sec)\n",
1694 __func__, fcport->port_name, sec);
1695 }
1696
1697 if (fcport->next_disc_state != DSC_DELETE_PEND)
1698 fcport->next_disc_state = DSC_ADISC;
1699 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1700 break;
1701
1702 default:
1703 break;
1704 }
1705
1706 return 0;
1707 }
1708
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1709 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1710 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1711 {
1712 struct qla_work_evt *e;
1713
1714 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1715 if (!e)
1716 return QLA_FUNCTION_FAILED;
1717
1718 e->u.new_sess.id = *id;
1719 e->u.new_sess.pla = pla;
1720 e->u.new_sess.fc4_type = fc4_type;
1721 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1722 if (node_name)
1723 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1724
1725 return qla2x00_post_work(vha, e);
1726 }
1727
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1728 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1729 {
1730 fc_port_t *fcport;
1731 unsigned long flags;
1732
1733 switch (ea->id.b.rsvd_1) {
1734 case RSCN_PORT_ADDR:
1735 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1736 if (fcport) {
1737 if (fcport->flags & FCF_FCP2_DEVICE &&
1738 atomic_read(&fcport->state) == FCS_ONLINE) {
1739 ql_dbg(ql_dbg_disc, vha, 0x2115,
1740 "Delaying session delete for FCP2 portid=%06x %8phC ",
1741 fcport->d_id.b24, fcport->port_name);
1742 return;
1743 }
1744 fcport->scan_needed = 1;
1745 fcport->rscn_gen++;
1746 }
1747 break;
1748 case RSCN_AREA_ADDR:
1749 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1750 if (fcport->flags & FCF_FCP2_DEVICE &&
1751 atomic_read(&fcport->state) == FCS_ONLINE)
1752 continue;
1753
1754 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1755 fcport->scan_needed = 1;
1756 fcport->rscn_gen++;
1757 }
1758 }
1759 break;
1760 case RSCN_DOM_ADDR:
1761 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1762 if (fcport->flags & FCF_FCP2_DEVICE &&
1763 atomic_read(&fcport->state) == FCS_ONLINE)
1764 continue;
1765
1766 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1767 fcport->scan_needed = 1;
1768 fcport->rscn_gen++;
1769 }
1770 }
1771 break;
1772 case RSCN_FAB_ADDR:
1773 default:
1774 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1775 if (fcport->flags & FCF_FCP2_DEVICE &&
1776 atomic_read(&fcport->state) == FCS_ONLINE)
1777 continue;
1778
1779 fcport->scan_needed = 1;
1780 fcport->rscn_gen++;
1781 }
1782 break;
1783 }
1784
1785 spin_lock_irqsave(&vha->work_lock, flags);
1786 if (vha->scan.scan_flags == 0) {
1787 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1788 vha->scan.scan_flags |= SF_QUEUED;
1789 schedule_delayed_work(&vha->scan.scan_work, 5);
1790 }
1791 spin_unlock_irqrestore(&vha->work_lock, flags);
1792 }
1793
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1794 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1795 struct event_arg *ea)
1796 {
1797 fc_port_t *fcport = ea->fcport;
1798
1799 if (test_bit(UNLOADING, &vha->dpc_flags))
1800 return;
1801
1802 ql_dbg(ql_dbg_disc, vha, 0x2102,
1803 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1804 __func__, fcport->port_name, fcport->disc_state,
1805 fcport->fw_login_state, fcport->login_pause,
1806 fcport->deleted, fcport->conflict,
1807 fcport->last_rscn_gen, fcport->rscn_gen,
1808 fcport->last_login_gen, fcport->login_gen,
1809 fcport->flags);
1810
1811 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1812 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1813 __func__, __LINE__, fcport->port_name);
1814 qla24xx_post_gnl_work(vha, fcport);
1815 return;
1816 }
1817
1818 qla24xx_fcport_handle_login(vha, fcport);
1819 }
1820
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1821 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1822 struct event_arg *ea)
1823 {
1824 /* for pure Target Mode, PRLI will not be initiated */
1825 if (vha->host->active_mode == MODE_TARGET)
1826 return;
1827
1828 ql_dbg(ql_dbg_disc, vha, 0x2118,
1829 "%s %d %8phC post PRLI\n",
1830 __func__, __LINE__, ea->fcport->port_name);
1831 qla24xx_post_prli_work(vha, ea->fcport);
1832 }
1833
1834 /*
1835 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1836 * to be consumed by the fcport
1837 */
qla_rscn_replay(fc_port_t * fcport)1838 void qla_rscn_replay(fc_port_t *fcport)
1839 {
1840 struct event_arg ea;
1841
1842 switch (fcport->disc_state) {
1843 case DSC_DELETE_PEND:
1844 return;
1845 default:
1846 break;
1847 }
1848
1849 if (fcport->scan_needed) {
1850 memset(&ea, 0, sizeof(ea));
1851 ea.id = fcport->d_id;
1852 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1853 qla2x00_handle_rscn(fcport->vha, &ea);
1854 }
1855 }
1856
1857 static void
qla2x00_tmf_iocb_timeout(void * data)1858 qla2x00_tmf_iocb_timeout(void *data)
1859 {
1860 srb_t *sp = data;
1861 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1862 int rc, h;
1863 unsigned long flags;
1864
1865 rc = qla24xx_async_abort_cmd(sp, false);
1866 if (rc) {
1867 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1868 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1869 if (sp->qpair->req->outstanding_cmds[h] == sp) {
1870 sp->qpair->req->outstanding_cmds[h] = NULL;
1871 break;
1872 }
1873 }
1874 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1875 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
1876 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1877 complete(&tmf->u.tmf.comp);
1878 }
1879 }
1880
qla2x00_tmf_sp_done(srb_t * sp,int res)1881 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1882 {
1883 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1884
1885 complete(&tmf->u.tmf.comp);
1886 }
1887
1888 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)1889 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1890 uint32_t tag)
1891 {
1892 struct scsi_qla_host *vha = fcport->vha;
1893 struct srb_iocb *tm_iocb;
1894 srb_t *sp;
1895 int rval = QLA_FUNCTION_FAILED;
1896
1897 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1898 if (!sp)
1899 goto done;
1900
1901 tm_iocb = &sp->u.iocb_cmd;
1902 sp->type = SRB_TM_CMD;
1903 sp->name = "tmf";
1904
1905 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1906 init_completion(&tm_iocb->u.tmf.comp);
1907 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1908
1909 tm_iocb->u.tmf.flags = flags;
1910 tm_iocb->u.tmf.lun = lun;
1911 tm_iocb->u.tmf.data = tag;
1912 sp->done = qla2x00_tmf_sp_done;
1913
1914 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1915 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1916 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1917 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1918
1919 rval = qla2x00_start_sp(sp);
1920 if (rval != QLA_SUCCESS)
1921 goto done_free_sp;
1922 wait_for_completion(&tm_iocb->u.tmf.comp);
1923
1924 rval = tm_iocb->u.tmf.data;
1925
1926 if (rval != QLA_SUCCESS) {
1927 ql_log(ql_log_warn, vha, 0x8030,
1928 "TM IOCB failed (%x).\n", rval);
1929 }
1930
1931 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1932 flags = tm_iocb->u.tmf.flags;
1933 lun = (uint16_t)tm_iocb->u.tmf.lun;
1934
1935 /* Issue Marker IOCB */
1936 qla2x00_marker(vha, vha->hw->base_qpair,
1937 fcport->loop_id, lun,
1938 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1939 }
1940
1941 done_free_sp:
1942 sp->free(sp);
1943 fcport->flags &= ~FCF_ASYNC_SENT;
1944 done:
1945 return rval;
1946 }
1947
1948 int
qla24xx_async_abort_command(srb_t * sp)1949 qla24xx_async_abort_command(srb_t *sp)
1950 {
1951 unsigned long flags = 0;
1952
1953 uint32_t handle;
1954 fc_port_t *fcport = sp->fcport;
1955 struct qla_qpair *qpair = sp->qpair;
1956 struct scsi_qla_host *vha = fcport->vha;
1957 struct req_que *req = qpair->req;
1958
1959 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1960 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1961 if (req->outstanding_cmds[handle] == sp)
1962 break;
1963 }
1964 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1965
1966 if (handle == req->num_outstanding_cmds) {
1967 /* Command not found. */
1968 return QLA_FUNCTION_FAILED;
1969 }
1970 if (sp->type == SRB_FXIOCB_DCMD)
1971 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1972 FXDISC_ABORT_IOCTL);
1973
1974 return qla24xx_async_abort_cmd(sp, true);
1975 }
1976
1977 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1978 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1979 {
1980 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1981 ea->data[0]);
1982
1983 switch (ea->data[0]) {
1984 case MBS_COMMAND_COMPLETE:
1985 ql_dbg(ql_dbg_disc, vha, 0x2118,
1986 "%s %d %8phC post gpdb\n",
1987 __func__, __LINE__, ea->fcport->port_name);
1988
1989 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1990 ea->fcport->logout_on_delete = 1;
1991 ea->fcport->nvme_prli_service_param = ea->iop[0];
1992 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1993 ea->fcport->nvme_first_burst_size =
1994 (ea->iop[1] & 0xffff) * 512;
1995 else
1996 ea->fcport->nvme_first_burst_size = 0;
1997 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1998 break;
1999 default:
2000 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
2001 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
2002 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2003 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2004 break;
2005 }
2006
2007 ql_dbg(ql_dbg_disc, vha, 0x2118,
2008 "%s %d %8phC priority %s, fc4type %x\n",
2009 __func__, __LINE__, ea->fcport->port_name,
2010 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2011 "FCP" : "NVMe", ea->fcport->fc4_type);
2012
2013 if (N2N_TOPO(vha->hw)) {
2014 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) {
2015 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
2016 ea->fcport->fc4_type |= FS_FC4TYPE_FCP;
2017 } else {
2018 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
2019 ea->fcport->fc4_type |= FS_FC4TYPE_NVME;
2020 }
2021
2022 if (ea->fcport->n2n_link_reset_cnt < 3) {
2023 ea->fcport->n2n_link_reset_cnt++;
2024 vha->relogin_jif = jiffies + 2 * HZ;
2025 /*
2026 * PRLI failed. Reset link to kick start
2027 * state machine
2028 */
2029 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2030 } else {
2031 ql_log(ql_log_warn, vha, 0x2119,
2032 "%s %d %8phC Unable to reconnect\n",
2033 __func__, __LINE__,
2034 ea->fcport->port_name);
2035 }
2036 } else {
2037 /*
2038 * switch connect. login failed. Take connection down
2039 * and allow relogin to retrigger
2040 */
2041 if (NVME_FCP_TARGET(ea->fcport)) {
2042 ql_dbg(ql_dbg_disc, vha, 0x2118,
2043 "%s %d %8phC post %s prli\n",
2044 __func__, __LINE__,
2045 ea->fcport->port_name,
2046 (ea->fcport->fc4_type & FS_FC4TYPE_NVME)
2047 ? "NVMe" : "FCP");
2048 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
2049 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
2050 else
2051 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
2052 }
2053
2054 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2055 ea->fcport->keep_nport_handle = 0;
2056 ea->fcport->logout_on_delete = 1;
2057 qlt_schedule_sess_for_deletion(ea->fcport);
2058 }
2059 break;
2060 }
2061 }
2062
2063 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2064 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2065 {
2066 port_id_t cid; /* conflict Nport id */
2067 u16 lid;
2068 struct fc_port *conflict_fcport;
2069 unsigned long flags;
2070 struct fc_port *fcport = ea->fcport;
2071
2072 ql_dbg(ql_dbg_disc, vha, 0xffff,
2073 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2074 __func__, fcport->port_name, fcport->disc_state,
2075 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2076 ea->sp->gen1, fcport->rscn_gen,
2077 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2078
2079 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2080 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2081 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2082 "%s %d %8phC Remote is trying to login\n",
2083 __func__, __LINE__, fcport->port_name);
2084 return;
2085 }
2086
2087 if ((fcport->disc_state == DSC_DELETE_PEND) ||
2088 (fcport->disc_state == DSC_DELETED)) {
2089 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2090 return;
2091 }
2092
2093 if (ea->sp->gen2 != fcport->login_gen) {
2094 /* target side must have changed it. */
2095 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2096 "%s %8phC generation changed\n",
2097 __func__, fcport->port_name);
2098 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2099 return;
2100 } else if (ea->sp->gen1 != fcport->rscn_gen) {
2101 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2102 "%s %8phC RSCN generation changed\n",
2103 __func__, fcport->port_name);
2104 qla_rscn_replay(fcport);
2105 qlt_schedule_sess_for_deletion(fcport);
2106 return;
2107 }
2108
2109 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2110 ea->data[0]);
2111
2112 switch (ea->data[0]) {
2113 case MBS_COMMAND_COMPLETE:
2114 /*
2115 * Driver must validate login state - If PRLI not complete,
2116 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2117 * requests.
2118 */
2119 if (NVME_TARGET(vha->hw, ea->fcport)) {
2120 ql_dbg(ql_dbg_disc, vha, 0x2117,
2121 "%s %d %8phC post prli\n",
2122 __func__, __LINE__, ea->fcport->port_name);
2123 qla24xx_post_prli_work(vha, ea->fcport);
2124 } else {
2125 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2126 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2127 __func__, __LINE__, ea->fcport->port_name,
2128 ea->fcport->loop_id, ea->fcport->d_id.b24);
2129
2130 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2131 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2132 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2133 ea->fcport->logout_on_delete = 1;
2134 ea->fcport->send_els_logo = 0;
2135 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2136 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2137
2138 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2139 }
2140 break;
2141 case MBS_COMMAND_ERROR:
2142 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2143 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2144
2145 qlt_schedule_sess_for_deletion(ea->fcport);
2146 break;
2147 case MBS_LOOP_ID_USED:
2148 /* data[1] = IO PARAM 1 = nport ID */
2149 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2150 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2151 cid.b.al_pa = ea->iop[1] & 0xff;
2152 cid.b.rsvd_1 = 0;
2153
2154 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2155 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2156 __func__, __LINE__, ea->fcport->port_name,
2157 ea->fcport->loop_id, cid.b24);
2158
2159 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2160 ea->fcport->loop_id = FC_NO_LOOP_ID;
2161 qla24xx_post_gnl_work(vha, ea->fcport);
2162 break;
2163 case MBS_PORT_ID_USED:
2164 lid = ea->iop[1] & 0xffff;
2165 qlt_find_sess_invalidate_other(vha,
2166 wwn_to_u64(ea->fcport->port_name),
2167 ea->fcport->d_id, lid, &conflict_fcport);
2168
2169 if (conflict_fcport) {
2170 /*
2171 * Another fcport share the same loop_id/nport id.
2172 * Conflict fcport needs to finish cleanup before this
2173 * fcport can proceed to login.
2174 */
2175 conflict_fcport->conflict = ea->fcport;
2176 ea->fcport->login_pause = 1;
2177
2178 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2179 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2180 __func__, __LINE__, ea->fcport->port_name,
2181 ea->fcport->d_id.b24, lid);
2182 } else {
2183 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2184 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2185 __func__, __LINE__, ea->fcport->port_name,
2186 ea->fcport->d_id.b24, lid);
2187
2188 qla2x00_clear_loop_id(ea->fcport);
2189 set_bit(lid, vha->hw->loop_id_map);
2190 ea->fcport->loop_id = lid;
2191 ea->fcport->keep_nport_handle = 0;
2192 ea->fcport->logout_on_delete = 1;
2193 qlt_schedule_sess_for_deletion(ea->fcport);
2194 }
2195 break;
2196 }
2197 return;
2198 }
2199
2200 /****************************************************************************/
2201 /* QLogic ISP2x00 Hardware Support Functions. */
2202 /****************************************************************************/
2203
2204 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2205 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2206 {
2207 int rval = QLA_SUCCESS;
2208 struct qla_hw_data *ha = vha->hw;
2209 uint32_t idc_major_ver, idc_minor_ver;
2210 uint16_t config[4];
2211
2212 qla83xx_idc_lock(vha, 0);
2213
2214 /* SV: TODO: Assign initialization timeout from
2215 * flash-info / other param
2216 */
2217 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2218 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2219
2220 /* Set our fcoe function presence */
2221 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2222 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2223 "Error while setting DRV-Presence.\n");
2224 rval = QLA_FUNCTION_FAILED;
2225 goto exit;
2226 }
2227
2228 /* Decide the reset ownership */
2229 qla83xx_reset_ownership(vha);
2230
2231 /*
2232 * On first protocol driver load:
2233 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2234 * register.
2235 * Others: Check compatibility with current IDC Major version.
2236 */
2237 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2238 if (ha->flags.nic_core_reset_owner) {
2239 /* Set IDC Major version */
2240 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2241 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2242
2243 /* Clearing IDC-Lock-Recovery register */
2244 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2245 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2246 /*
2247 * Clear further IDC participation if we are not compatible with
2248 * the current IDC Major Version.
2249 */
2250 ql_log(ql_log_warn, vha, 0xb07d,
2251 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2252 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2253 __qla83xx_clear_drv_presence(vha);
2254 rval = QLA_FUNCTION_FAILED;
2255 goto exit;
2256 }
2257 /* Each function sets its supported Minor version. */
2258 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2259 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2260 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2261
2262 if (ha->flags.nic_core_reset_owner) {
2263 memset(config, 0, sizeof(config));
2264 if (!qla81xx_get_port_config(vha, config))
2265 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2266 QLA8XXX_DEV_READY);
2267 }
2268
2269 rval = qla83xx_idc_state_handler(vha);
2270
2271 exit:
2272 qla83xx_idc_unlock(vha, 0);
2273
2274 return rval;
2275 }
2276
2277 /*
2278 * qla2x00_initialize_adapter
2279 * Initialize board.
2280 *
2281 * Input:
2282 * ha = adapter block pointer.
2283 *
2284 * Returns:
2285 * 0 = success
2286 */
2287 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2288 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2289 {
2290 int rval;
2291 struct qla_hw_data *ha = vha->hw;
2292 struct req_que *req = ha->req_q_map[0];
2293 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2294
2295 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2296 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2297
2298 /* Clear adapter flags. */
2299 vha->flags.online = 0;
2300 ha->flags.chip_reset_done = 0;
2301 vha->flags.reset_active = 0;
2302 ha->flags.pci_channel_io_perm_failure = 0;
2303 ha->flags.eeh_busy = 0;
2304 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2305 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2306 atomic_set(&vha->loop_state, LOOP_DOWN);
2307 vha->device_flags = DFLG_NO_CABLE;
2308 vha->dpc_flags = 0;
2309 vha->flags.management_server_logged_in = 0;
2310 vha->marker_needed = 0;
2311 ha->isp_abort_cnt = 0;
2312 ha->beacon_blink_led = 0;
2313
2314 set_bit(0, ha->req_qid_map);
2315 set_bit(0, ha->rsp_qid_map);
2316
2317 ql_dbg(ql_dbg_init, vha, 0x0040,
2318 "Configuring PCI space...\n");
2319 rval = ha->isp_ops->pci_config(vha);
2320 if (rval) {
2321 ql_log(ql_log_warn, vha, 0x0044,
2322 "Unable to configure PCI space.\n");
2323 return (rval);
2324 }
2325
2326 ha->isp_ops->reset_chip(vha);
2327
2328 /* Check for secure flash support */
2329 if (IS_QLA28XX(ha)) {
2330 if (rd_reg_word(®->mailbox12) & BIT_0)
2331 ha->flags.secure_adapter = 1;
2332 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2333 (ha->flags.secure_adapter) ? "Yes" : "No");
2334 }
2335
2336
2337 rval = qla2xxx_get_flash_info(vha);
2338 if (rval) {
2339 ql_log(ql_log_fatal, vha, 0x004f,
2340 "Unable to validate FLASH data.\n");
2341 return rval;
2342 }
2343
2344 if (IS_QLA8044(ha)) {
2345 qla8044_read_reset_template(vha);
2346
2347 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2348 * If DONRESET_BIT0 is set, drivers should not set dev_state
2349 * to NEED_RESET. But if NEED_RESET is set, drivers should
2350 * should honor the reset. */
2351 if (ql2xdontresethba == 1)
2352 qla8044_set_idc_dontreset(vha);
2353 }
2354
2355 ha->isp_ops->get_flash_version(vha, req->ring);
2356 ql_dbg(ql_dbg_init, vha, 0x0061,
2357 "Configure NVRAM parameters...\n");
2358
2359 /* Let priority default to FCP, can be overridden by nvram_config */
2360 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2361
2362 ha->isp_ops->nvram_config(vha);
2363
2364 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2365 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2366 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2367
2368 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2369 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2370
2371 if (ha->flags.disable_serdes) {
2372 /* Mask HBA via NVRAM settings? */
2373 ql_log(ql_log_info, vha, 0x0077,
2374 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2375 return QLA_FUNCTION_FAILED;
2376 }
2377
2378 ql_dbg(ql_dbg_init, vha, 0x0078,
2379 "Verifying loaded RISC code...\n");
2380
2381 /* If smartsan enabled then require fdmi and rdp enabled */
2382 if (ql2xsmartsan) {
2383 ql2xfdmienable = 1;
2384 ql2xrdpenable = 1;
2385 }
2386
2387 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2388 rval = ha->isp_ops->chip_diag(vha);
2389 if (rval)
2390 return (rval);
2391 rval = qla2x00_setup_chip(vha);
2392 if (rval)
2393 return (rval);
2394 }
2395
2396 if (IS_QLA84XX(ha)) {
2397 ha->cs84xx = qla84xx_get_chip(vha);
2398 if (!ha->cs84xx) {
2399 ql_log(ql_log_warn, vha, 0x00d0,
2400 "Unable to configure ISP84XX.\n");
2401 return QLA_FUNCTION_FAILED;
2402 }
2403 }
2404
2405 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2406 rval = qla2x00_init_rings(vha);
2407
2408 /* No point in continuing if firmware initialization failed. */
2409 if (rval != QLA_SUCCESS)
2410 return rval;
2411
2412 ha->flags.chip_reset_done = 1;
2413
2414 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2415 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2416 rval = qla84xx_init_chip(vha);
2417 if (rval != QLA_SUCCESS) {
2418 ql_log(ql_log_warn, vha, 0x00d4,
2419 "Unable to initialize ISP84XX.\n");
2420 qla84xx_put_chip(vha);
2421 }
2422 }
2423
2424 /* Load the NIC Core f/w if we are the first protocol driver. */
2425 if (IS_QLA8031(ha)) {
2426 rval = qla83xx_nic_core_fw_load(vha);
2427 if (rval)
2428 ql_log(ql_log_warn, vha, 0x0124,
2429 "Error in initializing NIC Core f/w.\n");
2430 }
2431
2432 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2433 qla24xx_read_fcp_prio_cfg(vha);
2434
2435 if (IS_P3P_TYPE(ha))
2436 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2437 else
2438 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2439
2440 return (rval);
2441 }
2442
2443 /**
2444 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2445 * @vha: HA context
2446 *
2447 * Returns 0 on success.
2448 */
2449 int
qla2100_pci_config(scsi_qla_host_t * vha)2450 qla2100_pci_config(scsi_qla_host_t *vha)
2451 {
2452 uint16_t w;
2453 unsigned long flags;
2454 struct qla_hw_data *ha = vha->hw;
2455 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2456
2457 pci_set_master(ha->pdev);
2458 pci_try_set_mwi(ha->pdev);
2459
2460 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2461 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2462 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2463
2464 pci_disable_rom(ha->pdev);
2465
2466 /* Get PCI bus information. */
2467 spin_lock_irqsave(&ha->hardware_lock, flags);
2468 ha->pci_attr = rd_reg_word(®->ctrl_status);
2469 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2470
2471 return QLA_SUCCESS;
2472 }
2473
2474 /**
2475 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2476 * @vha: HA context
2477 *
2478 * Returns 0 on success.
2479 */
2480 int
qla2300_pci_config(scsi_qla_host_t * vha)2481 qla2300_pci_config(scsi_qla_host_t *vha)
2482 {
2483 uint16_t w;
2484 unsigned long flags = 0;
2485 uint32_t cnt;
2486 struct qla_hw_data *ha = vha->hw;
2487 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2488
2489 pci_set_master(ha->pdev);
2490 pci_try_set_mwi(ha->pdev);
2491
2492 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2493 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2494
2495 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2496 w &= ~PCI_COMMAND_INTX_DISABLE;
2497 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2498
2499 /*
2500 * If this is a 2300 card and not 2312, reset the
2501 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2502 * the 2310 also reports itself as a 2300 so we need to get the
2503 * fb revision level -- a 6 indicates it really is a 2300 and
2504 * not a 2310.
2505 */
2506 if (IS_QLA2300(ha)) {
2507 spin_lock_irqsave(&ha->hardware_lock, flags);
2508
2509 /* Pause RISC. */
2510 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2511 for (cnt = 0; cnt < 30000; cnt++) {
2512 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2513 break;
2514
2515 udelay(10);
2516 }
2517
2518 /* Select FPM registers. */
2519 wrt_reg_word(®->ctrl_status, 0x20);
2520 rd_reg_word(®->ctrl_status);
2521
2522 /* Get the fb rev level */
2523 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2524
2525 if (ha->fb_rev == FPM_2300)
2526 pci_clear_mwi(ha->pdev);
2527
2528 /* Deselect FPM registers. */
2529 wrt_reg_word(®->ctrl_status, 0x0);
2530 rd_reg_word(®->ctrl_status);
2531
2532 /* Release RISC module. */
2533 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2534 for (cnt = 0; cnt < 30000; cnt++) {
2535 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2536 break;
2537
2538 udelay(10);
2539 }
2540
2541 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2542 }
2543
2544 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2545
2546 pci_disable_rom(ha->pdev);
2547
2548 /* Get PCI bus information. */
2549 spin_lock_irqsave(&ha->hardware_lock, flags);
2550 ha->pci_attr = rd_reg_word(®->ctrl_status);
2551 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2552
2553 return QLA_SUCCESS;
2554 }
2555
2556 /**
2557 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2558 * @vha: HA context
2559 *
2560 * Returns 0 on success.
2561 */
2562 int
qla24xx_pci_config(scsi_qla_host_t * vha)2563 qla24xx_pci_config(scsi_qla_host_t *vha)
2564 {
2565 uint16_t w;
2566 unsigned long flags = 0;
2567 struct qla_hw_data *ha = vha->hw;
2568 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2569
2570 pci_set_master(ha->pdev);
2571 pci_try_set_mwi(ha->pdev);
2572
2573 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2574 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2575 w &= ~PCI_COMMAND_INTX_DISABLE;
2576 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2577
2578 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2579
2580 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2581 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2582 pcix_set_mmrbc(ha->pdev, 2048);
2583
2584 /* PCIe -- adjust Maximum Read Request Size (2048). */
2585 if (pci_is_pcie(ha->pdev))
2586 pcie_set_readrq(ha->pdev, 4096);
2587
2588 pci_disable_rom(ha->pdev);
2589
2590 ha->chip_revision = ha->pdev->revision;
2591
2592 /* Get PCI bus information. */
2593 spin_lock_irqsave(&ha->hardware_lock, flags);
2594 ha->pci_attr = rd_reg_dword(®->ctrl_status);
2595 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2596
2597 return QLA_SUCCESS;
2598 }
2599
2600 /**
2601 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2602 * @vha: HA context
2603 *
2604 * Returns 0 on success.
2605 */
2606 int
qla25xx_pci_config(scsi_qla_host_t * vha)2607 qla25xx_pci_config(scsi_qla_host_t *vha)
2608 {
2609 uint16_t w;
2610 struct qla_hw_data *ha = vha->hw;
2611
2612 pci_set_master(ha->pdev);
2613 pci_try_set_mwi(ha->pdev);
2614
2615 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2616 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2617 w &= ~PCI_COMMAND_INTX_DISABLE;
2618 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2619
2620 /* PCIe -- adjust Maximum Read Request Size (2048). */
2621 if (pci_is_pcie(ha->pdev))
2622 pcie_set_readrq(ha->pdev, 4096);
2623
2624 pci_disable_rom(ha->pdev);
2625
2626 ha->chip_revision = ha->pdev->revision;
2627
2628 return QLA_SUCCESS;
2629 }
2630
2631 /**
2632 * qla2x00_isp_firmware() - Choose firmware image.
2633 * @vha: HA context
2634 *
2635 * Returns 0 on success.
2636 */
2637 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2638 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2639 {
2640 int rval;
2641 uint16_t loop_id, topo, sw_cap;
2642 uint8_t domain, area, al_pa;
2643 struct qla_hw_data *ha = vha->hw;
2644
2645 /* Assume loading risc code */
2646 rval = QLA_FUNCTION_FAILED;
2647
2648 if (ha->flags.disable_risc_code_load) {
2649 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2650
2651 /* Verify checksum of loaded RISC code. */
2652 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2653 if (rval == QLA_SUCCESS) {
2654 /* And, verify we are not in ROM code. */
2655 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2656 &area, &domain, &topo, &sw_cap);
2657 }
2658 }
2659
2660 if (rval)
2661 ql_dbg(ql_dbg_init, vha, 0x007a,
2662 "**** Load RISC code ****.\n");
2663
2664 return (rval);
2665 }
2666
2667 /**
2668 * qla2x00_reset_chip() - Reset ISP chip.
2669 * @vha: HA context
2670 *
2671 * Returns 0 on success.
2672 */
2673 int
qla2x00_reset_chip(scsi_qla_host_t * vha)2674 qla2x00_reset_chip(scsi_qla_host_t *vha)
2675 {
2676 unsigned long flags = 0;
2677 struct qla_hw_data *ha = vha->hw;
2678 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2679 uint32_t cnt;
2680 uint16_t cmd;
2681 int rval = QLA_FUNCTION_FAILED;
2682
2683 if (unlikely(pci_channel_offline(ha->pdev)))
2684 return rval;
2685
2686 ha->isp_ops->disable_intrs(ha);
2687
2688 spin_lock_irqsave(&ha->hardware_lock, flags);
2689
2690 /* Turn off master enable */
2691 cmd = 0;
2692 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2693 cmd &= ~PCI_COMMAND_MASTER;
2694 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2695
2696 if (!IS_QLA2100(ha)) {
2697 /* Pause RISC. */
2698 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2699 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2700 for (cnt = 0; cnt < 30000; cnt++) {
2701 if ((rd_reg_word(®->hccr) &
2702 HCCR_RISC_PAUSE) != 0)
2703 break;
2704 udelay(100);
2705 }
2706 } else {
2707 rd_reg_word(®->hccr); /* PCI Posting. */
2708 udelay(10);
2709 }
2710
2711 /* Select FPM registers. */
2712 wrt_reg_word(®->ctrl_status, 0x20);
2713 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2714
2715 /* FPM Soft Reset. */
2716 wrt_reg_word(®->fpm_diag_config, 0x100);
2717 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2718
2719 /* Toggle Fpm Reset. */
2720 if (!IS_QLA2200(ha)) {
2721 wrt_reg_word(®->fpm_diag_config, 0x0);
2722 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2723 }
2724
2725 /* Select frame buffer registers. */
2726 wrt_reg_word(®->ctrl_status, 0x10);
2727 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2728
2729 /* Reset frame buffer FIFOs. */
2730 if (IS_QLA2200(ha)) {
2731 WRT_FB_CMD_REG(ha, reg, 0xa000);
2732 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2733 } else {
2734 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2735
2736 /* Read back fb_cmd until zero or 3 seconds max */
2737 for (cnt = 0; cnt < 3000; cnt++) {
2738 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2739 break;
2740 udelay(100);
2741 }
2742 }
2743
2744 /* Select RISC module registers. */
2745 wrt_reg_word(®->ctrl_status, 0);
2746 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2747
2748 /* Reset RISC processor. */
2749 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2750 rd_reg_word(®->hccr); /* PCI Posting. */
2751
2752 /* Release RISC processor. */
2753 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2754 rd_reg_word(®->hccr); /* PCI Posting. */
2755 }
2756
2757 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
2758 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
2759
2760 /* Reset ISP chip. */
2761 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
2762
2763 /* Wait for RISC to recover from reset. */
2764 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2765 /*
2766 * It is necessary to for a delay here since the card doesn't
2767 * respond to PCI reads during a reset. On some architectures
2768 * this will result in an MCA.
2769 */
2770 udelay(20);
2771 for (cnt = 30000; cnt; cnt--) {
2772 if ((rd_reg_word(®->ctrl_status) &
2773 CSR_ISP_SOFT_RESET) == 0)
2774 break;
2775 udelay(100);
2776 }
2777 } else
2778 udelay(10);
2779
2780 /* Reset RISC processor. */
2781 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2782
2783 wrt_reg_word(®->semaphore, 0);
2784
2785 /* Release RISC processor. */
2786 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2787 rd_reg_word(®->hccr); /* PCI Posting. */
2788
2789 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2790 for (cnt = 0; cnt < 30000; cnt++) {
2791 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2792 break;
2793
2794 udelay(100);
2795 }
2796 } else
2797 udelay(100);
2798
2799 /* Turn on master enable */
2800 cmd |= PCI_COMMAND_MASTER;
2801 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2802
2803 /* Disable RISC pause on FPM parity error. */
2804 if (!IS_QLA2100(ha)) {
2805 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2806 rd_reg_word(®->hccr); /* PCI Posting. */
2807 }
2808
2809 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2810
2811 return QLA_SUCCESS;
2812 }
2813
2814 /**
2815 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2816 * @vha: HA context
2817 *
2818 * Returns 0 on success.
2819 */
2820 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2821 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2822 {
2823 uint16_t mb[4] = {0x1010, 0, 1, 0};
2824
2825 if (!IS_QLA81XX(vha->hw))
2826 return QLA_SUCCESS;
2827
2828 return qla81xx_write_mpi_register(vha, mb);
2829 }
2830
2831 /**
2832 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2833 * @vha: HA context
2834 *
2835 * Returns 0 on success.
2836 */
2837 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)2838 qla24xx_reset_risc(scsi_qla_host_t *vha)
2839 {
2840 unsigned long flags = 0;
2841 struct qla_hw_data *ha = vha->hw;
2842 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2843 uint32_t cnt;
2844 uint16_t wd;
2845 static int abts_cnt; /* ISP abort retry counts */
2846 int rval = QLA_SUCCESS;
2847
2848 spin_lock_irqsave(&ha->hardware_lock, flags);
2849
2850 /* Reset RISC. */
2851 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2852 for (cnt = 0; cnt < 30000; cnt++) {
2853 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2854 break;
2855
2856 udelay(10);
2857 }
2858
2859 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
2860 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2861
2862 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2863 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2864 rd_reg_dword(®->hccr),
2865 rd_reg_dword(®->ctrl_status),
2866 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
2867
2868 wrt_reg_dword(®->ctrl_status,
2869 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2870 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2871
2872 udelay(100);
2873
2874 /* Wait for firmware to complete NVRAM accesses. */
2875 rd_reg_word(®->mailbox0);
2876 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
2877 rval == QLA_SUCCESS; cnt--) {
2878 barrier();
2879 if (cnt)
2880 udelay(5);
2881 else
2882 rval = QLA_FUNCTION_TIMEOUT;
2883 }
2884
2885 if (rval == QLA_SUCCESS)
2886 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2887
2888 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2889 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2890 rd_reg_dword(®->hccr),
2891 rd_reg_word(®->mailbox0));
2892
2893 /* Wait for soft-reset to complete. */
2894 rd_reg_dword(®->ctrl_status);
2895 for (cnt = 0; cnt < 60; cnt++) {
2896 barrier();
2897 if ((rd_reg_dword(®->ctrl_status) &
2898 CSRX_ISP_SOFT_RESET) == 0)
2899 break;
2900
2901 udelay(5);
2902 }
2903 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2904 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2905
2906 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2907 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2908 rd_reg_dword(®->hccr),
2909 rd_reg_dword(®->ctrl_status));
2910
2911 /* If required, do an MPI FW reset now */
2912 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2913 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2914 if (++abts_cnt < 5) {
2915 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2916 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2917 } else {
2918 /*
2919 * We exhausted the ISP abort retries. We have to
2920 * set the board offline.
2921 */
2922 abts_cnt = 0;
2923 vha->flags.online = 0;
2924 }
2925 }
2926 }
2927
2928 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
2929 rd_reg_dword(®->hccr);
2930
2931 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
2932 rd_reg_dword(®->hccr);
2933
2934 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
2935 rd_reg_dword(®->hccr);
2936
2937 rd_reg_word(®->mailbox0);
2938 for (cnt = 60; rd_reg_word(®->mailbox0) != 0 &&
2939 rval == QLA_SUCCESS; cnt--) {
2940 barrier();
2941 if (cnt)
2942 udelay(5);
2943 else
2944 rval = QLA_FUNCTION_TIMEOUT;
2945 }
2946 if (rval == QLA_SUCCESS)
2947 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2948
2949 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2950 "Host Risc 0x%x, mailbox0 0x%x\n",
2951 rd_reg_dword(®->hccr),
2952 rd_reg_word(®->mailbox0));
2953
2954 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2955
2956 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2957 "Driver in %s mode\n",
2958 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2959
2960 if (IS_NOPOLLING_TYPE(ha))
2961 ha->isp_ops->enable_intrs(ha);
2962
2963 return rval;
2964 }
2965
2966 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)2967 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2968 {
2969 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2970
2971 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2972 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
2973 }
2974
2975 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)2976 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2977 {
2978 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2979
2980 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2981 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
2982 }
2983
2984 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)2985 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2986 {
2987 uint32_t wd32 = 0;
2988 uint delta_msec = 100;
2989 uint elapsed_msec = 0;
2990 uint timeout_msec;
2991 ulong n;
2992
2993 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2994 vha->hw->pdev->subsystem_device != 0x0240)
2995 return;
2996
2997 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2998 udelay(100);
2999
3000 attempt:
3001 timeout_msec = TIMEOUT_SEMAPHORE;
3002 n = timeout_msec / delta_msec;
3003 while (n--) {
3004 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3005 qla25xx_read_risc_sema_reg(vha, &wd32);
3006 if (wd32 & RISC_SEMAPHORE)
3007 break;
3008 msleep(delta_msec);
3009 elapsed_msec += delta_msec;
3010 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3011 goto force;
3012 }
3013
3014 if (!(wd32 & RISC_SEMAPHORE))
3015 goto force;
3016
3017 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3018 goto acquired;
3019
3020 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3021 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3022 n = timeout_msec / delta_msec;
3023 while (n--) {
3024 qla25xx_read_risc_sema_reg(vha, &wd32);
3025 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3026 break;
3027 msleep(delta_msec);
3028 elapsed_msec += delta_msec;
3029 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3030 goto force;
3031 }
3032
3033 if (wd32 & RISC_SEMAPHORE_FORCE)
3034 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3035
3036 goto attempt;
3037
3038 force:
3039 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3040
3041 acquired:
3042 return;
3043 }
3044
3045 /**
3046 * qla24xx_reset_chip() - Reset ISP24xx chip.
3047 * @vha: HA context
3048 *
3049 * Returns 0 on success.
3050 */
3051 int
qla24xx_reset_chip(scsi_qla_host_t * vha)3052 qla24xx_reset_chip(scsi_qla_host_t *vha)
3053 {
3054 struct qla_hw_data *ha = vha->hw;
3055 int rval = QLA_FUNCTION_FAILED;
3056
3057 if (pci_channel_offline(ha->pdev) &&
3058 ha->flags.pci_channel_io_perm_failure) {
3059 return rval;
3060 }
3061
3062 ha->isp_ops->disable_intrs(ha);
3063
3064 qla25xx_manipulate_risc_semaphore(vha);
3065
3066 /* Perform RISC reset. */
3067 rval = qla24xx_reset_risc(vha);
3068
3069 return rval;
3070 }
3071
3072 /**
3073 * qla2x00_chip_diag() - Test chip for proper operation.
3074 * @vha: HA context
3075 *
3076 * Returns 0 on success.
3077 */
3078 int
qla2x00_chip_diag(scsi_qla_host_t * vha)3079 qla2x00_chip_diag(scsi_qla_host_t *vha)
3080 {
3081 int rval;
3082 struct qla_hw_data *ha = vha->hw;
3083 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3084 unsigned long flags = 0;
3085 uint16_t data;
3086 uint32_t cnt;
3087 uint16_t mb[5];
3088 struct req_que *req = ha->req_q_map[0];
3089
3090 /* Assume a failed state */
3091 rval = QLA_FUNCTION_FAILED;
3092
3093 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3094 ®->flash_address);
3095
3096 spin_lock_irqsave(&ha->hardware_lock, flags);
3097
3098 /* Reset ISP chip. */
3099 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3100
3101 /*
3102 * We need to have a delay here since the card will not respond while
3103 * in reset causing an MCA on some architectures.
3104 */
3105 udelay(20);
3106 data = qla2x00_debounce_register(®->ctrl_status);
3107 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3108 udelay(5);
3109 data = rd_reg_word(®->ctrl_status);
3110 barrier();
3111 }
3112
3113 if (!cnt)
3114 goto chip_diag_failed;
3115
3116 ql_dbg(ql_dbg_init, vha, 0x007c,
3117 "Reset register cleared by chip reset.\n");
3118
3119 /* Reset RISC processor. */
3120 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3121 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3122
3123 /* Workaround for QLA2312 PCI parity error */
3124 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3125 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3126 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3127 udelay(5);
3128 data = RD_MAILBOX_REG(ha, reg, 0);
3129 barrier();
3130 }
3131 } else
3132 udelay(10);
3133
3134 if (!cnt)
3135 goto chip_diag_failed;
3136
3137 /* Check product ID of chip */
3138 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3139
3140 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3141 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3142 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3143 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3144 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3145 mb[3] != PROD_ID_3) {
3146 ql_log(ql_log_warn, vha, 0x0062,
3147 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3148 mb[1], mb[2], mb[3]);
3149
3150 goto chip_diag_failed;
3151 }
3152 ha->product_id[0] = mb[1];
3153 ha->product_id[1] = mb[2];
3154 ha->product_id[2] = mb[3];
3155 ha->product_id[3] = mb[4];
3156
3157 /* Adjust fw RISC transfer size */
3158 if (req->length > 1024)
3159 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3160 else
3161 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3162 req->length;
3163
3164 if (IS_QLA2200(ha) &&
3165 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3166 /* Limit firmware transfer size with a 2200A */
3167 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3168
3169 ha->device_type |= DT_ISP2200A;
3170 ha->fw_transfer_size = 128;
3171 }
3172
3173 /* Wrap Incoming Mailboxes Test. */
3174 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3175
3176 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3177 rval = qla2x00_mbx_reg_test(vha);
3178 if (rval)
3179 ql_log(ql_log_warn, vha, 0x0080,
3180 "Failed mailbox send register test.\n");
3181 else
3182 /* Flag a successful rval */
3183 rval = QLA_SUCCESS;
3184 spin_lock_irqsave(&ha->hardware_lock, flags);
3185
3186 chip_diag_failed:
3187 if (rval)
3188 ql_log(ql_log_info, vha, 0x0081,
3189 "Chip diagnostics **** FAILED ****.\n");
3190
3191 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3192
3193 return (rval);
3194 }
3195
3196 /**
3197 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3198 * @vha: HA context
3199 *
3200 * Returns 0 on success.
3201 */
3202 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3203 qla24xx_chip_diag(scsi_qla_host_t *vha)
3204 {
3205 int rval;
3206 struct qla_hw_data *ha = vha->hw;
3207 struct req_que *req = ha->req_q_map[0];
3208
3209 if (IS_P3P_TYPE(ha))
3210 return QLA_SUCCESS;
3211
3212 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3213
3214 rval = qla2x00_mbx_reg_test(vha);
3215 if (rval) {
3216 ql_log(ql_log_warn, vha, 0x0082,
3217 "Failed mailbox send register test.\n");
3218 } else {
3219 /* Flag a successful rval */
3220 rval = QLA_SUCCESS;
3221 }
3222
3223 return rval;
3224 }
3225
3226 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3227 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3228 {
3229 int rval;
3230 dma_addr_t tc_dma;
3231 void *tc;
3232 struct qla_hw_data *ha = vha->hw;
3233
3234 if (!IS_FWI2_CAPABLE(ha))
3235 return;
3236
3237 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3238 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3239 return;
3240
3241 if (ha->fce) {
3242 ql_dbg(ql_dbg_init, vha, 0x00bd,
3243 "%s: FCE Mem is already allocated.\n",
3244 __func__);
3245 return;
3246 }
3247
3248 /* Allocate memory for Fibre Channel Event Buffer. */
3249 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3250 GFP_KERNEL);
3251 if (!tc) {
3252 ql_log(ql_log_warn, vha, 0x00be,
3253 "Unable to allocate (%d KB) for FCE.\n",
3254 FCE_SIZE / 1024);
3255 return;
3256 }
3257
3258 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3259 ha->fce_mb, &ha->fce_bufs);
3260 if (rval) {
3261 ql_log(ql_log_warn, vha, 0x00bf,
3262 "Unable to initialize FCE (%d).\n", rval);
3263 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3264 return;
3265 }
3266
3267 ql_dbg(ql_dbg_init, vha, 0x00c0,
3268 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3269
3270 ha->flags.fce_enabled = 1;
3271 ha->fce_dma = tc_dma;
3272 ha->fce = tc;
3273 }
3274
3275 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3276 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3277 {
3278 int rval;
3279 dma_addr_t tc_dma;
3280 void *tc;
3281 struct qla_hw_data *ha = vha->hw;
3282
3283 if (!IS_FWI2_CAPABLE(ha))
3284 return;
3285
3286 if (ha->eft) {
3287 ql_dbg(ql_dbg_init, vha, 0x00bd,
3288 "%s: EFT Mem is already allocated.\n",
3289 __func__);
3290 return;
3291 }
3292
3293 /* Allocate memory for Extended Trace Buffer. */
3294 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3295 GFP_KERNEL);
3296 if (!tc) {
3297 ql_log(ql_log_warn, vha, 0x00c1,
3298 "Unable to allocate (%d KB) for EFT.\n",
3299 EFT_SIZE / 1024);
3300 return;
3301 }
3302
3303 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3304 if (rval) {
3305 ql_log(ql_log_warn, vha, 0x00c2,
3306 "Unable to initialize EFT (%d).\n", rval);
3307 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3308 return;
3309 }
3310
3311 ql_dbg(ql_dbg_init, vha, 0x00c3,
3312 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3313
3314 ha->eft_dma = tc_dma;
3315 ha->eft = tc;
3316 }
3317
3318 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3319 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3320 {
3321 qla2x00_init_fce_trace(vha);
3322 qla2x00_init_eft_trace(vha);
3323 }
3324
3325 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3326 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3327 {
3328 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3329 eft_size, fce_size, mq_size;
3330 struct qla_hw_data *ha = vha->hw;
3331 struct req_que *req = ha->req_q_map[0];
3332 struct rsp_que *rsp = ha->rsp_q_map[0];
3333 struct qla2xxx_fw_dump *fw_dump;
3334
3335 if (ha->fw_dump) {
3336 ql_dbg(ql_dbg_init, vha, 0x00bd,
3337 "Firmware dump already allocated.\n");
3338 return;
3339 }
3340
3341 ha->fw_dumped = 0;
3342 ha->fw_dump_cap_flags = 0;
3343 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3344 req_q_size = rsp_q_size = 0;
3345
3346 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3347 fixed_size = sizeof(struct qla2100_fw_dump);
3348 } else if (IS_QLA23XX(ha)) {
3349 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3350 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3351 sizeof(uint16_t);
3352 } else if (IS_FWI2_CAPABLE(ha)) {
3353 if (IS_QLA83XX(ha))
3354 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3355 else if (IS_QLA81XX(ha))
3356 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3357 else if (IS_QLA25XX(ha))
3358 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3359 else
3360 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3361
3362 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3363 sizeof(uint32_t);
3364 if (ha->mqenable) {
3365 if (!IS_QLA83XX(ha))
3366 mq_size = sizeof(struct qla2xxx_mq_chain);
3367 /*
3368 * Allocate maximum buffer size for all queues - Q0.
3369 * Resizing must be done at end-of-dump processing.
3370 */
3371 mq_size += (ha->max_req_queues - 1) *
3372 (req->length * sizeof(request_t));
3373 mq_size += (ha->max_rsp_queues - 1) *
3374 (rsp->length * sizeof(response_t));
3375 }
3376 if (ha->tgt.atio_ring)
3377 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3378
3379 qla2x00_init_fce_trace(vha);
3380 if (ha->fce)
3381 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3382 qla2x00_init_eft_trace(vha);
3383 if (ha->eft)
3384 eft_size = EFT_SIZE;
3385 }
3386
3387 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3388 struct fwdt *fwdt = ha->fwdt;
3389 uint j;
3390
3391 for (j = 0; j < 2; j++, fwdt++) {
3392 if (!fwdt->template) {
3393 ql_dbg(ql_dbg_init, vha, 0x00ba,
3394 "-> fwdt%u no template\n", j);
3395 continue;
3396 }
3397 ql_dbg(ql_dbg_init, vha, 0x00fa,
3398 "-> fwdt%u calculating fwdump size...\n", j);
3399 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3400 vha, fwdt->template);
3401 ql_dbg(ql_dbg_init, vha, 0x00fa,
3402 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3403 j, fwdt->dump_size);
3404 dump_size += fwdt->dump_size;
3405 }
3406 /* Add space for spare MPI fw dump. */
3407 dump_size += ha->fwdt[1].dump_size;
3408 } else {
3409 req_q_size = req->length * sizeof(request_t);
3410 rsp_q_size = rsp->length * sizeof(response_t);
3411 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3412 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3413 + eft_size;
3414 ha->chain_offset = dump_size;
3415 dump_size += mq_size + fce_size;
3416 if (ha->exchoffld_buf)
3417 dump_size += sizeof(struct qla2xxx_offld_chain) +
3418 ha->exchoffld_size;
3419 if (ha->exlogin_buf)
3420 dump_size += sizeof(struct qla2xxx_offld_chain) +
3421 ha->exlogin_size;
3422 }
3423
3424 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3425
3426 ql_dbg(ql_dbg_init, vha, 0x00c5,
3427 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3428 __func__, dump_size, ha->fw_dump_len,
3429 ha->fw_dump_alloc_len);
3430
3431 fw_dump = vmalloc(dump_size);
3432 if (!fw_dump) {
3433 ql_log(ql_log_warn, vha, 0x00c4,
3434 "Unable to allocate (%d KB) for firmware dump.\n",
3435 dump_size / 1024);
3436 } else {
3437 mutex_lock(&ha->optrom_mutex);
3438 if (ha->fw_dumped) {
3439 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3440 vfree(ha->fw_dump);
3441 ha->fw_dump = fw_dump;
3442 ha->fw_dump_alloc_len = dump_size;
3443 ql_dbg(ql_dbg_init, vha, 0x00c5,
3444 "Re-Allocated (%d KB) and save firmware dump.\n",
3445 dump_size / 1024);
3446 } else {
3447 if (ha->fw_dump)
3448 vfree(ha->fw_dump);
3449 ha->fw_dump = fw_dump;
3450
3451 ha->fw_dump_len = ha->fw_dump_alloc_len =
3452 dump_size;
3453 ql_dbg(ql_dbg_init, vha, 0x00c5,
3454 "Allocated (%d KB) for firmware dump.\n",
3455 dump_size / 1024);
3456
3457 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3458 ha->mpi_fw_dump = (char *)fw_dump +
3459 ha->fwdt[1].dump_size;
3460 mutex_unlock(&ha->optrom_mutex);
3461 return;
3462 }
3463
3464 ha->fw_dump->signature[0] = 'Q';
3465 ha->fw_dump->signature[1] = 'L';
3466 ha->fw_dump->signature[2] = 'G';
3467 ha->fw_dump->signature[3] = 'C';
3468 ha->fw_dump->version = htonl(1);
3469
3470 ha->fw_dump->fixed_size = htonl(fixed_size);
3471 ha->fw_dump->mem_size = htonl(mem_size);
3472 ha->fw_dump->req_q_size = htonl(req_q_size);
3473 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3474
3475 ha->fw_dump->eft_size = htonl(eft_size);
3476 ha->fw_dump->eft_addr_l =
3477 htonl(LSD(ha->eft_dma));
3478 ha->fw_dump->eft_addr_h =
3479 htonl(MSD(ha->eft_dma));
3480
3481 ha->fw_dump->header_size =
3482 htonl(offsetof
3483 (struct qla2xxx_fw_dump, isp));
3484 }
3485 mutex_unlock(&ha->optrom_mutex);
3486 }
3487 }
3488 }
3489
3490 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3491 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3492 {
3493 #define MPS_MASK 0xe0
3494 int rval;
3495 uint16_t dc;
3496 uint32_t dw;
3497
3498 if (!IS_QLA81XX(vha->hw))
3499 return QLA_SUCCESS;
3500
3501 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3502 if (rval != QLA_SUCCESS) {
3503 ql_log(ql_log_warn, vha, 0x0105,
3504 "Unable to acquire semaphore.\n");
3505 goto done;
3506 }
3507
3508 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3509 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3510 if (rval != QLA_SUCCESS) {
3511 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3512 goto done_release;
3513 }
3514
3515 dc &= MPS_MASK;
3516 if (dc == (dw & MPS_MASK))
3517 goto done_release;
3518
3519 dw &= ~MPS_MASK;
3520 dw |= dc;
3521 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3522 if (rval != QLA_SUCCESS) {
3523 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3524 }
3525
3526 done_release:
3527 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3528 if (rval != QLA_SUCCESS) {
3529 ql_log(ql_log_warn, vha, 0x006d,
3530 "Unable to release semaphore.\n");
3531 }
3532
3533 done:
3534 return rval;
3535 }
3536
3537 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3538 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3539 {
3540 /* Don't try to reallocate the array */
3541 if (req->outstanding_cmds)
3542 return QLA_SUCCESS;
3543
3544 if (!IS_FWI2_CAPABLE(ha))
3545 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3546 else {
3547 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3548 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3549 else
3550 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3551 }
3552
3553 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3554 sizeof(srb_t *),
3555 GFP_KERNEL);
3556
3557 if (!req->outstanding_cmds) {
3558 /*
3559 * Try to allocate a minimal size just so we can get through
3560 * initialization.
3561 */
3562 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3563 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3564 sizeof(srb_t *),
3565 GFP_KERNEL);
3566
3567 if (!req->outstanding_cmds) {
3568 ql_log(ql_log_fatal, NULL, 0x0126,
3569 "Failed to allocate memory for "
3570 "outstanding_cmds for req_que %p.\n", req);
3571 req->num_outstanding_cmds = 0;
3572 return QLA_FUNCTION_FAILED;
3573 }
3574 }
3575
3576 return QLA_SUCCESS;
3577 }
3578
3579 #define PRINT_FIELD(_field, _flag, _str) { \
3580 if (a0->_field & _flag) {\
3581 if (p) {\
3582 strcat(ptr, "|");\
3583 ptr++;\
3584 leftover--;\
3585 } \
3586 len = snprintf(ptr, leftover, "%s", _str); \
3587 p = 1;\
3588 leftover -= len;\
3589 ptr += len; \
3590 } \
3591 }
3592
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3593 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3594 {
3595 #define STR_LEN 64
3596 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3597 u8 str[STR_LEN], *ptr, p;
3598 int leftover, len;
3599
3600 memset(str, 0, STR_LEN);
3601 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3602 ql_dbg(ql_dbg_init, vha, 0x015a,
3603 "SFP MFG Name: %s\n", str);
3604
3605 memset(str, 0, STR_LEN);
3606 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3607 ql_dbg(ql_dbg_init, vha, 0x015c,
3608 "SFP Part Name: %s\n", str);
3609
3610 /* media */
3611 memset(str, 0, STR_LEN);
3612 ptr = str;
3613 leftover = STR_LEN;
3614 p = len = 0;
3615 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3616 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3617 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3618 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3619 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3620 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3621 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3622 ql_dbg(ql_dbg_init, vha, 0x0160,
3623 "SFP Media: %s\n", str);
3624
3625 /* link length */
3626 memset(str, 0, STR_LEN);
3627 ptr = str;
3628 leftover = STR_LEN;
3629 p = len = 0;
3630 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3631 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3632 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3633 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3634 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3635 ql_dbg(ql_dbg_init, vha, 0x0196,
3636 "SFP Link Length: %s\n", str);
3637
3638 memset(str, 0, STR_LEN);
3639 ptr = str;
3640 leftover = STR_LEN;
3641 p = len = 0;
3642 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3643 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3644 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3645 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3646 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3647 ql_dbg(ql_dbg_init, vha, 0x016e,
3648 "SFP FC Link Tech: %s\n", str);
3649
3650 if (a0->length_km)
3651 ql_dbg(ql_dbg_init, vha, 0x016f,
3652 "SFP Distant: %d km\n", a0->length_km);
3653 if (a0->length_100m)
3654 ql_dbg(ql_dbg_init, vha, 0x0170,
3655 "SFP Distant: %d m\n", a0->length_100m*100);
3656 if (a0->length_50um_10m)
3657 ql_dbg(ql_dbg_init, vha, 0x0189,
3658 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3659 if (a0->length_62um_10m)
3660 ql_dbg(ql_dbg_init, vha, 0x018a,
3661 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3662 if (a0->length_om4_10m)
3663 ql_dbg(ql_dbg_init, vha, 0x0194,
3664 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3665 if (a0->length_om3_10m)
3666 ql_dbg(ql_dbg_init, vha, 0x0195,
3667 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3668 }
3669
3670
3671 /**
3672 * qla24xx_detect_sfp()
3673 *
3674 * @vha: adapter state pointer.
3675 *
3676 * @return
3677 * 0 -- Configure firmware to use short-range settings -- normal
3678 * buffer-to-buffer credits.
3679 *
3680 * 1 -- Configure firmware to use long-range settings -- extra
3681 * buffer-to-buffer credits should be allocated with
3682 * ha->lr_distance containing distance settings from NVRAM or SFP
3683 * (if supported).
3684 */
3685 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3686 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3687 {
3688 int rc, used_nvram;
3689 struct sff_8247_a0 *a;
3690 struct qla_hw_data *ha = vha->hw;
3691 struct nvram_81xx *nv = ha->nvram;
3692 #define LR_DISTANCE_UNKNOWN 2
3693 static const char * const types[] = { "Short", "Long" };
3694 static const char * const lengths[] = { "(10km)", "(5km)", "" };
3695 u8 ll = 0;
3696
3697 /* Seed with NVRAM settings. */
3698 used_nvram = 0;
3699 ha->flags.lr_detected = 0;
3700 if (IS_BPM_RANGE_CAPABLE(ha) &&
3701 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3702 used_nvram = 1;
3703 ha->flags.lr_detected = 1;
3704 ha->lr_distance =
3705 (nv->enhanced_features >> LR_DIST_NV_POS)
3706 & LR_DIST_NV_MASK;
3707 }
3708
3709 if (!IS_BPM_ENABLED(vha))
3710 goto out;
3711 /* Determine SR/LR capabilities of SFP/Transceiver. */
3712 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3713 if (rc)
3714 goto out;
3715
3716 used_nvram = 0;
3717 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3718 qla2xxx_print_sfp_info(vha);
3719
3720 ha->flags.lr_detected = 0;
3721 ll = a->fc_ll_cc7;
3722 if (ll & FC_LL_VL || ll & FC_LL_L) {
3723 /* Long range, track length. */
3724 ha->flags.lr_detected = 1;
3725
3726 if (a->length_km > 5 || a->length_100m > 50)
3727 ha->lr_distance = LR_DISTANCE_10K;
3728 else
3729 ha->lr_distance = LR_DISTANCE_5K;
3730 }
3731
3732 out:
3733 ql_dbg(ql_dbg_async, vha, 0x507b,
3734 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3735 types[ha->flags.lr_detected],
3736 ha->flags.lr_detected ? lengths[ha->lr_distance] :
3737 lengths[LR_DISTANCE_UNKNOWN],
3738 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3739 return ha->flags.lr_detected;
3740 }
3741
qla_init_iocb_limit(scsi_qla_host_t * vha)3742 void qla_init_iocb_limit(scsi_qla_host_t *vha)
3743 {
3744 u16 i, num_qps;
3745 u32 limit;
3746 struct qla_hw_data *ha = vha->hw;
3747
3748 num_qps = ha->num_qpairs + 1;
3749 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
3750
3751 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
3752 ha->base_qpair->fwres.iocbs_limit = limit;
3753 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
3754 ha->base_qpair->fwres.iocbs_used = 0;
3755 for (i = 0; i < ha->max_qpairs; i++) {
3756 if (ha->queue_pair_map[i]) {
3757 ha->queue_pair_map[i]->fwres.iocbs_total =
3758 ha->orig_fw_iocb_count;
3759 ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
3760 ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
3761 limit / num_qps;
3762 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
3763 }
3764 }
3765 }
3766
3767 /**
3768 * qla2x00_setup_chip() - Load and start RISC firmware.
3769 * @vha: HA context
3770 *
3771 * Returns 0 on success.
3772 */
3773 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3774 qla2x00_setup_chip(scsi_qla_host_t *vha)
3775 {
3776 int rval;
3777 uint32_t srisc_address = 0;
3778 struct qla_hw_data *ha = vha->hw;
3779 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3780 unsigned long flags;
3781 uint16_t fw_major_version;
3782 int done_once = 0;
3783
3784 if (IS_P3P_TYPE(ha)) {
3785 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3786 if (rval == QLA_SUCCESS) {
3787 qla2x00_stop_firmware(vha);
3788 goto enable_82xx_npiv;
3789 } else
3790 goto failed;
3791 }
3792
3793 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3794 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3795 spin_lock_irqsave(&ha->hardware_lock, flags);
3796 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3797 rd_reg_word(®->hccr);
3798 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3799 }
3800
3801 qla81xx_mpi_sync(vha);
3802
3803 execute_fw_with_lr:
3804 /* Load firmware sequences */
3805 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3806 if (rval == QLA_SUCCESS) {
3807 ql_dbg(ql_dbg_init, vha, 0x00c9,
3808 "Verifying Checksum of loaded RISC code.\n");
3809
3810 rval = qla2x00_verify_checksum(vha, srisc_address);
3811 if (rval == QLA_SUCCESS) {
3812 /* Start firmware execution. */
3813 ql_dbg(ql_dbg_init, vha, 0x00ca,
3814 "Starting firmware.\n");
3815
3816 if (ql2xexlogins)
3817 ha->flags.exlogins_enabled = 1;
3818
3819 if (qla_is_exch_offld_enabled(vha))
3820 ha->flags.exchoffld_enabled = 1;
3821
3822 rval = qla2x00_execute_fw(vha, srisc_address);
3823 /* Retrieve firmware information. */
3824 if (rval == QLA_SUCCESS) {
3825 /* Enable BPM support? */
3826 if (!done_once++ && qla24xx_detect_sfp(vha)) {
3827 ql_dbg(ql_dbg_init, vha, 0x00ca,
3828 "Re-starting firmware -- BPM.\n");
3829 /* Best-effort - re-init. */
3830 ha->isp_ops->reset_chip(vha);
3831 ha->isp_ops->chip_diag(vha);
3832 goto execute_fw_with_lr;
3833 }
3834
3835 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
3836 qla27xx_set_zio_threshold(vha,
3837 ha->last_zio_threshold);
3838
3839 rval = qla2x00_set_exlogins_buffer(vha);
3840 if (rval != QLA_SUCCESS)
3841 goto failed;
3842
3843 rval = qla2x00_set_exchoffld_buffer(vha);
3844 if (rval != QLA_SUCCESS)
3845 goto failed;
3846
3847 enable_82xx_npiv:
3848 fw_major_version = ha->fw_major_version;
3849 if (IS_P3P_TYPE(ha))
3850 qla82xx_check_md_needed(vha);
3851 else
3852 rval = qla2x00_get_fw_version(vha);
3853 if (rval != QLA_SUCCESS)
3854 goto failed;
3855 ha->flags.npiv_supported = 0;
3856 if (IS_QLA2XXX_MIDTYPE(ha) &&
3857 (ha->fw_attributes & BIT_2)) {
3858 ha->flags.npiv_supported = 1;
3859 if ((!ha->max_npiv_vports) ||
3860 ((ha->max_npiv_vports + 1) %
3861 MIN_MULTI_ID_FABRIC))
3862 ha->max_npiv_vports =
3863 MIN_MULTI_ID_FABRIC - 1;
3864 }
3865 qla2x00_get_resource_cnts(vha);
3866 qla_init_iocb_limit(vha);
3867
3868 /*
3869 * Allocate the array of outstanding commands
3870 * now that we know the firmware resources.
3871 */
3872 rval = qla2x00_alloc_outstanding_cmds(ha,
3873 vha->req);
3874 if (rval != QLA_SUCCESS)
3875 goto failed;
3876
3877 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3878 qla2x00_alloc_offload_mem(vha);
3879
3880 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3881 qla2x00_alloc_fw_dump(vha);
3882
3883 } else {
3884 goto failed;
3885 }
3886 } else {
3887 ql_log(ql_log_fatal, vha, 0x00cd,
3888 "ISP Firmware failed checksum.\n");
3889 goto failed;
3890 }
3891
3892 /* Enable PUREX PASSTHRU */
3893 if (ql2xrdpenable || ha->flags.scm_supported_f)
3894 qla25xx_set_els_cmds_supported(vha);
3895 } else
3896 goto failed;
3897
3898 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3899 /* Enable proper parity. */
3900 spin_lock_irqsave(&ha->hardware_lock, flags);
3901 if (IS_QLA2300(ha))
3902 /* SRAM parity */
3903 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3904 else
3905 /* SRAM, Instruction RAM and GP RAM parity */
3906 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3907 rd_reg_word(®->hccr);
3908 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3909 }
3910
3911 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3912 ha->flags.fac_supported = 1;
3913 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3914 uint32_t size;
3915
3916 rval = qla81xx_fac_get_sector_size(vha, &size);
3917 if (rval == QLA_SUCCESS) {
3918 ha->flags.fac_supported = 1;
3919 ha->fdt_block_size = size << 2;
3920 } else {
3921 ql_log(ql_log_warn, vha, 0x00ce,
3922 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3923 ha->fw_major_version, ha->fw_minor_version,
3924 ha->fw_subminor_version);
3925
3926 if (IS_QLA83XX(ha)) {
3927 ha->flags.fac_supported = 0;
3928 rval = QLA_SUCCESS;
3929 }
3930 }
3931 }
3932 failed:
3933 if (rval) {
3934 ql_log(ql_log_fatal, vha, 0x00cf,
3935 "Setup chip ****FAILED****.\n");
3936 }
3937
3938 return (rval);
3939 }
3940
3941 /**
3942 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3943 * @rsp: response queue
3944 *
3945 * Beginning of request ring has initialization control block already built
3946 * by nvram config routine.
3947 *
3948 * Returns 0 on success.
3949 */
3950 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)3951 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3952 {
3953 uint16_t cnt;
3954 response_t *pkt;
3955
3956 rsp->ring_ptr = rsp->ring;
3957 rsp->ring_index = 0;
3958 rsp->status_srb = NULL;
3959 pkt = rsp->ring_ptr;
3960 for (cnt = 0; cnt < rsp->length; cnt++) {
3961 pkt->signature = RESPONSE_PROCESSED;
3962 pkt++;
3963 }
3964 }
3965
3966 /**
3967 * qla2x00_update_fw_options() - Read and process firmware options.
3968 * @vha: HA context
3969 *
3970 * Returns 0 on success.
3971 */
3972 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)3973 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3974 {
3975 uint16_t swing, emphasis, tx_sens, rx_sens;
3976 struct qla_hw_data *ha = vha->hw;
3977
3978 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3979 qla2x00_get_fw_options(vha, ha->fw_options);
3980
3981 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3982 return;
3983
3984 /* Serial Link options. */
3985 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3986 "Serial link options.\n");
3987 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3988 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3989
3990 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3991 if (ha->fw_seriallink_options[3] & BIT_2) {
3992 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3993
3994 /* 1G settings */
3995 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3996 emphasis = (ha->fw_seriallink_options[2] &
3997 (BIT_4 | BIT_3)) >> 3;
3998 tx_sens = ha->fw_seriallink_options[0] &
3999 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4000 rx_sens = (ha->fw_seriallink_options[0] &
4001 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4002 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4003 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4004 if (rx_sens == 0x0)
4005 rx_sens = 0x3;
4006 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4007 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4008 ha->fw_options[10] |= BIT_5 |
4009 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4010 (tx_sens & (BIT_1 | BIT_0));
4011
4012 /* 2G settings */
4013 swing = (ha->fw_seriallink_options[2] &
4014 (BIT_7 | BIT_6 | BIT_5)) >> 5;
4015 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4016 tx_sens = ha->fw_seriallink_options[1] &
4017 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4018 rx_sens = (ha->fw_seriallink_options[1] &
4019 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4020 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4021 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4022 if (rx_sens == 0x0)
4023 rx_sens = 0x3;
4024 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4025 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4026 ha->fw_options[11] |= BIT_5 |
4027 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4028 (tx_sens & (BIT_1 | BIT_0));
4029 }
4030
4031 /* FCP2 options. */
4032 /* Return command IOCBs without waiting for an ABTS to complete. */
4033 ha->fw_options[3] |= BIT_13;
4034
4035 /* LED scheme. */
4036 if (ha->flags.enable_led_scheme)
4037 ha->fw_options[2] |= BIT_12;
4038
4039 /* Detect ISP6312. */
4040 if (IS_QLA6312(ha))
4041 ha->fw_options[2] |= BIT_13;
4042
4043 /* Set Retry FLOGI in case of P2P connection */
4044 if (ha->operating_mode == P2P) {
4045 ha->fw_options[2] |= BIT_3;
4046 ql_dbg(ql_dbg_disc, vha, 0x2100,
4047 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4048 __func__, ha->fw_options[2]);
4049 }
4050
4051 /* Update firmware options. */
4052 qla2x00_set_fw_options(vha, ha->fw_options);
4053 }
4054
4055 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)4056 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4057 {
4058 int rval;
4059 struct qla_hw_data *ha = vha->hw;
4060
4061 if (IS_P3P_TYPE(ha))
4062 return;
4063
4064 /* Hold status IOCBs until ABTS response received. */
4065 if (ql2xfwholdabts)
4066 ha->fw_options[3] |= BIT_12;
4067
4068 /* Set Retry FLOGI in case of P2P connection */
4069 if (ha->operating_mode == P2P) {
4070 ha->fw_options[2] |= BIT_3;
4071 ql_dbg(ql_dbg_disc, vha, 0x2101,
4072 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4073 __func__, ha->fw_options[2]);
4074 }
4075
4076 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
4077 if (ql2xmvasynctoatio &&
4078 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4079 if (qla_tgt_mode_enabled(vha) ||
4080 qla_dual_mode_enabled(vha))
4081 ha->fw_options[2] |= BIT_11;
4082 else
4083 ha->fw_options[2] &= ~BIT_11;
4084 }
4085
4086 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4087 IS_QLA28XX(ha)) {
4088 /*
4089 * Tell FW to track each exchange to prevent
4090 * driver from using stale exchange.
4091 */
4092 if (qla_tgt_mode_enabled(vha) ||
4093 qla_dual_mode_enabled(vha))
4094 ha->fw_options[2] |= BIT_4;
4095 else
4096 ha->fw_options[2] &= ~BIT_4;
4097
4098 /* Reserve 1/2 of emergency exchanges for ELS.*/
4099 if (qla2xuseresexchforels)
4100 ha->fw_options[2] |= BIT_8;
4101 else
4102 ha->fw_options[2] &= ~BIT_8;
4103 }
4104
4105 if (ql2xrdpenable || ha->flags.scm_supported_f)
4106 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4107
4108 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4109 if (IS_BPM_RANGE_CAPABLE(ha))
4110 ha->fw_options[3] |= BIT_10;
4111
4112 ql_dbg(ql_dbg_init, vha, 0x00e8,
4113 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4114 __func__, ha->fw_options[1], ha->fw_options[2],
4115 ha->fw_options[3], vha->host->active_mode);
4116
4117 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4118 qla2x00_set_fw_options(vha, ha->fw_options);
4119
4120 /* Update Serial Link options. */
4121 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4122 return;
4123
4124 rval = qla2x00_set_serdes_params(vha,
4125 le16_to_cpu(ha->fw_seriallink_options24[1]),
4126 le16_to_cpu(ha->fw_seriallink_options24[2]),
4127 le16_to_cpu(ha->fw_seriallink_options24[3]));
4128 if (rval != QLA_SUCCESS) {
4129 ql_log(ql_log_warn, vha, 0x0104,
4130 "Unable to update Serial Link options (%x).\n", rval);
4131 }
4132 }
4133
4134 void
qla2x00_config_rings(struct scsi_qla_host * vha)4135 qla2x00_config_rings(struct scsi_qla_host *vha)
4136 {
4137 struct qla_hw_data *ha = vha->hw;
4138 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4139 struct req_que *req = ha->req_q_map[0];
4140 struct rsp_que *rsp = ha->rsp_q_map[0];
4141
4142 /* Setup ring parameters in initialization control block. */
4143 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4144 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4145 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4146 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4147 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4148 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4149
4150 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4151 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4152 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4153 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4154 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4155 }
4156
4157 void
qla24xx_config_rings(struct scsi_qla_host * vha)4158 qla24xx_config_rings(struct scsi_qla_host *vha)
4159 {
4160 struct qla_hw_data *ha = vha->hw;
4161 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4162 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4163 struct qla_msix_entry *msix;
4164 struct init_cb_24xx *icb;
4165 uint16_t rid = 0;
4166 struct req_que *req = ha->req_q_map[0];
4167 struct rsp_que *rsp = ha->rsp_q_map[0];
4168
4169 /* Setup ring parameters in initialization control block. */
4170 icb = (struct init_cb_24xx *)ha->init_cb;
4171 icb->request_q_outpointer = cpu_to_le16(0);
4172 icb->response_q_inpointer = cpu_to_le16(0);
4173 icb->request_q_length = cpu_to_le16(req->length);
4174 icb->response_q_length = cpu_to_le16(rsp->length);
4175 put_unaligned_le64(req->dma, &icb->request_q_address);
4176 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4177
4178 /* Setup ATIO queue dma pointers for target mode */
4179 icb->atio_q_inpointer = cpu_to_le16(0);
4180 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4181 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4182
4183 if (IS_SHADOW_REG_CAPABLE(ha))
4184 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4185
4186 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4187 IS_QLA28XX(ha)) {
4188 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4189 icb->rid = cpu_to_le16(rid);
4190 if (ha->flags.msix_enabled) {
4191 msix = &ha->msix_entries[1];
4192 ql_dbg(ql_dbg_init, vha, 0x0019,
4193 "Registering vector 0x%x for base que.\n",
4194 msix->entry);
4195 icb->msix = cpu_to_le16(msix->entry);
4196 }
4197 /* Use alternate PCI bus number */
4198 if (MSB(rid))
4199 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4200 /* Use alternate PCI devfn */
4201 if (LSB(rid))
4202 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4203
4204 /* Use Disable MSIX Handshake mode for capable adapters */
4205 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4206 (ha->flags.msix_enabled)) {
4207 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4208 ha->flags.disable_msix_handshake = 1;
4209 ql_dbg(ql_dbg_init, vha, 0x00fe,
4210 "MSIX Handshake Disable Mode turned on.\n");
4211 } else {
4212 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4213 }
4214 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4215
4216 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4217 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4218 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4219 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4220 } else {
4221 wrt_reg_dword(®->isp24.req_q_in, 0);
4222 wrt_reg_dword(®->isp24.req_q_out, 0);
4223 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4224 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4225 }
4226
4227 qlt_24xx_config_rings(vha);
4228
4229 /* If the user has configured the speed, set it here */
4230 if (ha->set_data_rate) {
4231 ql_dbg(ql_dbg_init, vha, 0x00fd,
4232 "Speed set by user : %s Gbps \n",
4233 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4234 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4235 }
4236
4237 /* PCI posting */
4238 rd_reg_word(&ioreg->hccr);
4239 }
4240
4241 /**
4242 * qla2x00_init_rings() - Initializes firmware.
4243 * @vha: HA context
4244 *
4245 * Beginning of request ring has initialization control block already built
4246 * by nvram config routine.
4247 *
4248 * Returns 0 on success.
4249 */
4250 int
qla2x00_init_rings(scsi_qla_host_t * vha)4251 qla2x00_init_rings(scsi_qla_host_t *vha)
4252 {
4253 int rval;
4254 unsigned long flags = 0;
4255 int cnt, que;
4256 struct qla_hw_data *ha = vha->hw;
4257 struct req_que *req;
4258 struct rsp_que *rsp;
4259 struct mid_init_cb_24xx *mid_init_cb =
4260 (struct mid_init_cb_24xx *) ha->init_cb;
4261
4262 spin_lock_irqsave(&ha->hardware_lock, flags);
4263
4264 /* Clear outstanding commands array. */
4265 for (que = 0; que < ha->max_req_queues; que++) {
4266 req = ha->req_q_map[que];
4267 if (!req || !test_bit(que, ha->req_qid_map))
4268 continue;
4269 req->out_ptr = (uint16_t *)(req->ring + req->length);
4270 *req->out_ptr = 0;
4271 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4272 req->outstanding_cmds[cnt] = NULL;
4273
4274 req->current_outstanding_cmd = 1;
4275
4276 /* Initialize firmware. */
4277 req->ring_ptr = req->ring;
4278 req->ring_index = 0;
4279 req->cnt = req->length;
4280 }
4281
4282 for (que = 0; que < ha->max_rsp_queues; que++) {
4283 rsp = ha->rsp_q_map[que];
4284 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4285 continue;
4286 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4287 *rsp->in_ptr = 0;
4288 /* Initialize response queue entries */
4289 if (IS_QLAFX00(ha))
4290 qlafx00_init_response_q_entries(rsp);
4291 else
4292 qla2x00_init_response_q_entries(rsp);
4293 }
4294
4295 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4296 ha->tgt.atio_ring_index = 0;
4297 /* Initialize ATIO queue entries */
4298 qlt_init_atio_q_entries(vha);
4299
4300 ha->isp_ops->config_rings(vha);
4301
4302 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4303
4304 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4305
4306 if (IS_QLAFX00(ha)) {
4307 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4308 goto next_check;
4309 }
4310
4311 /* Update any ISP specific firmware options before initialization. */
4312 ha->isp_ops->update_fw_options(vha);
4313
4314 if (ha->flags.npiv_supported) {
4315 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4316 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4317 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4318 }
4319
4320 if (IS_FWI2_CAPABLE(ha)) {
4321 mid_init_cb->options = cpu_to_le16(BIT_1);
4322 mid_init_cb->init_cb.execution_throttle =
4323 cpu_to_le16(ha->cur_fw_xcb_count);
4324 ha->flags.dport_enabled =
4325 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4326 BIT_7) != 0;
4327 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4328 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4329 /* FA-WWPN Status */
4330 ha->flags.fawwpn_enabled =
4331 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4332 BIT_6) != 0;
4333 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4334 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4335 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4336 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4337 }
4338
4339 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4340 next_check:
4341 if (rval) {
4342 ql_log(ql_log_fatal, vha, 0x00d2,
4343 "Init Firmware **** FAILED ****.\n");
4344 } else {
4345 ql_dbg(ql_dbg_init, vha, 0x00d3,
4346 "Init Firmware -- success.\n");
4347 QLA_FW_STARTED(ha);
4348 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4349 }
4350
4351 return (rval);
4352 }
4353
4354 /**
4355 * qla2x00_fw_ready() - Waits for firmware ready.
4356 * @vha: HA context
4357 *
4358 * Returns 0 on success.
4359 */
4360 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4361 qla2x00_fw_ready(scsi_qla_host_t *vha)
4362 {
4363 int rval;
4364 unsigned long wtime, mtime, cs84xx_time;
4365 uint16_t min_wait; /* Minimum wait time if loop is down */
4366 uint16_t wait_time; /* Wait time if loop is coming ready */
4367 uint16_t state[6];
4368 struct qla_hw_data *ha = vha->hw;
4369
4370 if (IS_QLAFX00(vha->hw))
4371 return qlafx00_fw_ready(vha);
4372
4373 rval = QLA_SUCCESS;
4374
4375 /* Time to wait for loop down */
4376 if (IS_P3P_TYPE(ha))
4377 min_wait = 30;
4378 else
4379 min_wait = 20;
4380
4381 /*
4382 * Firmware should take at most one RATOV to login, plus 5 seconds for
4383 * our own processing.
4384 */
4385 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4386 wait_time = min_wait;
4387 }
4388
4389 /* Min wait time if loop down */
4390 mtime = jiffies + (min_wait * HZ);
4391
4392 /* wait time before firmware ready */
4393 wtime = jiffies + (wait_time * HZ);
4394
4395 /* Wait for ISP to finish LIP */
4396 if (!vha->flags.init_done)
4397 ql_log(ql_log_info, vha, 0x801e,
4398 "Waiting for LIP to complete.\n");
4399
4400 do {
4401 memset(state, -1, sizeof(state));
4402 rval = qla2x00_get_firmware_state(vha, state);
4403 if (rval == QLA_SUCCESS) {
4404 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4405 vha->device_flags &= ~DFLG_NO_CABLE;
4406 }
4407 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4408 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4409 "fw_state=%x 84xx=%x.\n", state[0],
4410 state[2]);
4411 if ((state[2] & FSTATE_LOGGED_IN) &&
4412 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4413 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4414 "Sending verify iocb.\n");
4415
4416 cs84xx_time = jiffies;
4417 rval = qla84xx_init_chip(vha);
4418 if (rval != QLA_SUCCESS) {
4419 ql_log(ql_log_warn,
4420 vha, 0x8007,
4421 "Init chip failed.\n");
4422 break;
4423 }
4424
4425 /* Add time taken to initialize. */
4426 cs84xx_time = jiffies - cs84xx_time;
4427 wtime += cs84xx_time;
4428 mtime += cs84xx_time;
4429 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4430 "Increasing wait time by %ld. "
4431 "New time %ld.\n", cs84xx_time,
4432 wtime);
4433 }
4434 } else if (state[0] == FSTATE_READY) {
4435 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4436 "F/W Ready - OK.\n");
4437
4438 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4439 &ha->login_timeout, &ha->r_a_tov);
4440
4441 rval = QLA_SUCCESS;
4442 break;
4443 }
4444
4445 rval = QLA_FUNCTION_FAILED;
4446
4447 if (atomic_read(&vha->loop_down_timer) &&
4448 state[0] != FSTATE_READY) {
4449 /* Loop down. Timeout on min_wait for states
4450 * other than Wait for Login.
4451 */
4452 if (time_after_eq(jiffies, mtime)) {
4453 ql_log(ql_log_info, vha, 0x8038,
4454 "Cable is unplugged...\n");
4455
4456 vha->device_flags |= DFLG_NO_CABLE;
4457 break;
4458 }
4459 }
4460 } else {
4461 /* Mailbox cmd failed. Timeout on min_wait. */
4462 if (time_after_eq(jiffies, mtime) ||
4463 ha->flags.isp82xx_fw_hung)
4464 break;
4465 }
4466
4467 if (time_after_eq(jiffies, wtime))
4468 break;
4469
4470 /* Delay for a while */
4471 msleep(500);
4472 } while (1);
4473
4474 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4475 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4476 state[1], state[2], state[3], state[4], state[5], jiffies);
4477
4478 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4479 ql_log(ql_log_warn, vha, 0x803b,
4480 "Firmware ready **** FAILED ****.\n");
4481 }
4482
4483 return (rval);
4484 }
4485
4486 /*
4487 * qla2x00_configure_hba
4488 * Setup adapter context.
4489 *
4490 * Input:
4491 * ha = adapter state pointer.
4492 *
4493 * Returns:
4494 * 0 = success
4495 *
4496 * Context:
4497 * Kernel context.
4498 */
4499 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4500 qla2x00_configure_hba(scsi_qla_host_t *vha)
4501 {
4502 int rval;
4503 uint16_t loop_id;
4504 uint16_t topo;
4505 uint16_t sw_cap;
4506 uint8_t al_pa;
4507 uint8_t area;
4508 uint8_t domain;
4509 char connect_type[22];
4510 struct qla_hw_data *ha = vha->hw;
4511 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4512 port_id_t id;
4513 unsigned long flags;
4514
4515 /* Get host addresses. */
4516 rval = qla2x00_get_adapter_id(vha,
4517 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4518 if (rval != QLA_SUCCESS) {
4519 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4520 IS_CNA_CAPABLE(ha) ||
4521 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4522 ql_dbg(ql_dbg_disc, vha, 0x2008,
4523 "Loop is in a transition state.\n");
4524 } else {
4525 ql_log(ql_log_warn, vha, 0x2009,
4526 "Unable to get host loop ID.\n");
4527 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4528 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4529 ql_log(ql_log_warn, vha, 0x1151,
4530 "Doing link init.\n");
4531 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4532 return rval;
4533 }
4534 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4535 }
4536 return (rval);
4537 }
4538
4539 if (topo == 4) {
4540 ql_log(ql_log_info, vha, 0x200a,
4541 "Cannot get topology - retrying.\n");
4542 return (QLA_FUNCTION_FAILED);
4543 }
4544
4545 vha->loop_id = loop_id;
4546
4547 /* initialize */
4548 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4549 ha->operating_mode = LOOP;
4550 ha->switch_cap = 0;
4551
4552 switch (topo) {
4553 case 0:
4554 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4555 ha->current_topology = ISP_CFG_NL;
4556 strcpy(connect_type, "(Loop)");
4557 break;
4558
4559 case 1:
4560 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4561 ha->switch_cap = sw_cap;
4562 ha->current_topology = ISP_CFG_FL;
4563 strcpy(connect_type, "(FL_Port)");
4564 break;
4565
4566 case 2:
4567 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4568 ha->operating_mode = P2P;
4569 ha->current_topology = ISP_CFG_N;
4570 strcpy(connect_type, "(N_Port-to-N_Port)");
4571 break;
4572
4573 case 3:
4574 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4575 ha->switch_cap = sw_cap;
4576 ha->operating_mode = P2P;
4577 ha->current_topology = ISP_CFG_F;
4578 strcpy(connect_type, "(F_Port)");
4579 break;
4580
4581 default:
4582 ql_dbg(ql_dbg_disc, vha, 0x200f,
4583 "HBA in unknown topology %x, using NL.\n", topo);
4584 ha->current_topology = ISP_CFG_NL;
4585 strcpy(connect_type, "(Loop)");
4586 break;
4587 }
4588
4589 /* Save Host port and loop ID. */
4590 /* byte order - Big Endian */
4591 id.b.domain = domain;
4592 id.b.area = area;
4593 id.b.al_pa = al_pa;
4594 id.b.rsvd_1 = 0;
4595 spin_lock_irqsave(&ha->hardware_lock, flags);
4596 if (!(topo == 2 && ha->flags.n2n_bigger))
4597 qlt_update_host_map(vha, id);
4598 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4599
4600 if (!vha->flags.init_done)
4601 ql_log(ql_log_info, vha, 0x2010,
4602 "Topology - %s, Host Loop address 0x%x.\n",
4603 connect_type, vha->loop_id);
4604
4605 return(rval);
4606 }
4607
4608 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)4609 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4610 const char *def)
4611 {
4612 char *st, *en;
4613 uint16_t index;
4614 uint64_t zero[2] = { 0 };
4615 struct qla_hw_data *ha = vha->hw;
4616 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4617 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4618
4619 if (len > sizeof(zero))
4620 len = sizeof(zero);
4621 if (memcmp(model, &zero, len) != 0) {
4622 memcpy(ha->model_number, model, len);
4623 st = en = ha->model_number;
4624 en += len - 1;
4625 while (en > st) {
4626 if (*en != 0x20 && *en != 0x00)
4627 break;
4628 *en-- = '\0';
4629 }
4630
4631 index = (ha->pdev->subsystem_device & 0xff);
4632 if (use_tbl &&
4633 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4634 index < QLA_MODEL_NAMES)
4635 strlcpy(ha->model_desc,
4636 qla2x00_model_name[index * 2 + 1],
4637 sizeof(ha->model_desc));
4638 } else {
4639 index = (ha->pdev->subsystem_device & 0xff);
4640 if (use_tbl &&
4641 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4642 index < QLA_MODEL_NAMES) {
4643 strlcpy(ha->model_number,
4644 qla2x00_model_name[index * 2],
4645 sizeof(ha->model_number));
4646 strlcpy(ha->model_desc,
4647 qla2x00_model_name[index * 2 + 1],
4648 sizeof(ha->model_desc));
4649 } else {
4650 strlcpy(ha->model_number, def,
4651 sizeof(ha->model_number));
4652 }
4653 }
4654 if (IS_FWI2_CAPABLE(ha))
4655 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4656 sizeof(ha->model_desc));
4657 }
4658
4659 /* On sparc systems, obtain port and node WWN from firmware
4660 * properties.
4661 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4662 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4663 {
4664 #ifdef CONFIG_SPARC
4665 struct qla_hw_data *ha = vha->hw;
4666 struct pci_dev *pdev = ha->pdev;
4667 struct device_node *dp = pci_device_to_OF_node(pdev);
4668 const u8 *val;
4669 int len;
4670
4671 val = of_get_property(dp, "port-wwn", &len);
4672 if (val && len >= WWN_SIZE)
4673 memcpy(nv->port_name, val, WWN_SIZE);
4674
4675 val = of_get_property(dp, "node-wwn", &len);
4676 if (val && len >= WWN_SIZE)
4677 memcpy(nv->node_name, val, WWN_SIZE);
4678 #endif
4679 }
4680
4681 /*
4682 * NVRAM configuration for ISP 2xxx
4683 *
4684 * Input:
4685 * ha = adapter block pointer.
4686 *
4687 * Output:
4688 * initialization control block in response_ring
4689 * host adapters parameters in host adapter block
4690 *
4691 * Returns:
4692 * 0 = success.
4693 */
4694 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4695 qla2x00_nvram_config(scsi_qla_host_t *vha)
4696 {
4697 int rval;
4698 uint8_t chksum = 0;
4699 uint16_t cnt;
4700 uint8_t *dptr1, *dptr2;
4701 struct qla_hw_data *ha = vha->hw;
4702 init_cb_t *icb = ha->init_cb;
4703 nvram_t *nv = ha->nvram;
4704 uint8_t *ptr = ha->nvram;
4705 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4706
4707 rval = QLA_SUCCESS;
4708
4709 /* Determine NVRAM starting address. */
4710 ha->nvram_size = sizeof(*nv);
4711 ha->nvram_base = 0;
4712 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4713 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
4714 ha->nvram_base = 0x80;
4715
4716 /* Get NVRAM data and calculate checksum. */
4717 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4718 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4719 chksum += *ptr++;
4720
4721 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4722 "Contents of NVRAM.\n");
4723 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4724 nv, ha->nvram_size);
4725
4726 /* Bad NVRAM data, set defaults parameters. */
4727 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4728 nv->nvram_version < 1) {
4729 /* Reset NVRAM data. */
4730 ql_log(ql_log_warn, vha, 0x0064,
4731 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4732 chksum, nv->id, nv->nvram_version);
4733 ql_log(ql_log_warn, vha, 0x0065,
4734 "Falling back to "
4735 "functioning (yet invalid -- WWPN) defaults.\n");
4736
4737 /*
4738 * Set default initialization control block.
4739 */
4740 memset(nv, 0, ha->nvram_size);
4741 nv->parameter_block_version = ICB_VERSION;
4742
4743 if (IS_QLA23XX(ha)) {
4744 nv->firmware_options[0] = BIT_2 | BIT_1;
4745 nv->firmware_options[1] = BIT_7 | BIT_5;
4746 nv->add_firmware_options[0] = BIT_5;
4747 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4748 nv->frame_payload_size = cpu_to_le16(2048);
4749 nv->special_options[1] = BIT_7;
4750 } else if (IS_QLA2200(ha)) {
4751 nv->firmware_options[0] = BIT_2 | BIT_1;
4752 nv->firmware_options[1] = BIT_7 | BIT_5;
4753 nv->add_firmware_options[0] = BIT_5;
4754 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4755 nv->frame_payload_size = cpu_to_le16(1024);
4756 } else if (IS_QLA2100(ha)) {
4757 nv->firmware_options[0] = BIT_3 | BIT_1;
4758 nv->firmware_options[1] = BIT_5;
4759 nv->frame_payload_size = cpu_to_le16(1024);
4760 }
4761
4762 nv->max_iocb_allocation = cpu_to_le16(256);
4763 nv->execution_throttle = cpu_to_le16(16);
4764 nv->retry_count = 8;
4765 nv->retry_delay = 1;
4766
4767 nv->port_name[0] = 33;
4768 nv->port_name[3] = 224;
4769 nv->port_name[4] = 139;
4770
4771 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4772
4773 nv->login_timeout = 4;
4774
4775 /*
4776 * Set default host adapter parameters
4777 */
4778 nv->host_p[1] = BIT_2;
4779 nv->reset_delay = 5;
4780 nv->port_down_retry_count = 8;
4781 nv->max_luns_per_target = cpu_to_le16(8);
4782 nv->link_down_timeout = 60;
4783
4784 rval = 1;
4785 }
4786
4787 /* Reset Initialization control block */
4788 memset(icb, 0, ha->init_cb_size);
4789
4790 /*
4791 * Setup driver NVRAM options.
4792 */
4793 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4794 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4795 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4796 nv->firmware_options[1] &= ~BIT_4;
4797
4798 if (IS_QLA23XX(ha)) {
4799 nv->firmware_options[0] |= BIT_2;
4800 nv->firmware_options[0] &= ~BIT_3;
4801 nv->special_options[0] &= ~BIT_6;
4802 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4803
4804 if (IS_QLA2300(ha)) {
4805 if (ha->fb_rev == FPM_2310) {
4806 strcpy(ha->model_number, "QLA2310");
4807 } else {
4808 strcpy(ha->model_number, "QLA2300");
4809 }
4810 } else {
4811 qla2x00_set_model_info(vha, nv->model_number,
4812 sizeof(nv->model_number), "QLA23xx");
4813 }
4814 } else if (IS_QLA2200(ha)) {
4815 nv->firmware_options[0] |= BIT_2;
4816 /*
4817 * 'Point-to-point preferred, else loop' is not a safe
4818 * connection mode setting.
4819 */
4820 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4821 (BIT_5 | BIT_4)) {
4822 /* Force 'loop preferred, else point-to-point'. */
4823 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4824 nv->add_firmware_options[0] |= BIT_5;
4825 }
4826 strcpy(ha->model_number, "QLA22xx");
4827 } else /*if (IS_QLA2100(ha))*/ {
4828 strcpy(ha->model_number, "QLA2100");
4829 }
4830
4831 /*
4832 * Copy over NVRAM RISC parameter block to initialization control block.
4833 */
4834 dptr1 = (uint8_t *)icb;
4835 dptr2 = (uint8_t *)&nv->parameter_block_version;
4836 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4837 while (cnt--)
4838 *dptr1++ = *dptr2++;
4839
4840 /* Copy 2nd half. */
4841 dptr1 = (uint8_t *)icb->add_firmware_options;
4842 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4843 while (cnt--)
4844 *dptr1++ = *dptr2++;
4845 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4846 /* Use alternate WWN? */
4847 if (nv->host_p[1] & BIT_7) {
4848 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4849 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4850 }
4851
4852 /* Prepare nodename */
4853 if ((icb->firmware_options[1] & BIT_6) == 0) {
4854 /*
4855 * Firmware will apply the following mask if the nodename was
4856 * not provided.
4857 */
4858 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4859 icb->node_name[0] &= 0xF0;
4860 }
4861
4862 /*
4863 * Set host adapter parameters.
4864 */
4865
4866 /*
4867 * BIT_7 in the host-parameters section allows for modification to
4868 * internal driver logging.
4869 */
4870 if (nv->host_p[0] & BIT_7)
4871 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4872 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4873 /* Always load RISC code on non ISP2[12]00 chips. */
4874 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4875 ha->flags.disable_risc_code_load = 0;
4876 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4877 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4878 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4879 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4880 ha->flags.disable_serdes = 0;
4881
4882 ha->operating_mode =
4883 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4884
4885 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4886 sizeof(ha->fw_seriallink_options));
4887
4888 /* save HBA serial number */
4889 ha->serial0 = icb->port_name[5];
4890 ha->serial1 = icb->port_name[6];
4891 ha->serial2 = icb->port_name[7];
4892 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4893 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4894
4895 icb->execution_throttle = cpu_to_le16(0xFFFF);
4896
4897 ha->retry_count = nv->retry_count;
4898
4899 /* Set minimum login_timeout to 4 seconds. */
4900 if (nv->login_timeout != ql2xlogintimeout)
4901 nv->login_timeout = ql2xlogintimeout;
4902 if (nv->login_timeout < 4)
4903 nv->login_timeout = 4;
4904 ha->login_timeout = nv->login_timeout;
4905
4906 /* Set minimum RATOV to 100 tenths of a second. */
4907 ha->r_a_tov = 100;
4908
4909 ha->loop_reset_delay = nv->reset_delay;
4910
4911 /* Link Down Timeout = 0:
4912 *
4913 * When Port Down timer expires we will start returning
4914 * I/O's to OS with "DID_NO_CONNECT".
4915 *
4916 * Link Down Timeout != 0:
4917 *
4918 * The driver waits for the link to come up after link down
4919 * before returning I/Os to OS with "DID_NO_CONNECT".
4920 */
4921 if (nv->link_down_timeout == 0) {
4922 ha->loop_down_abort_time =
4923 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4924 } else {
4925 ha->link_down_timeout = nv->link_down_timeout;
4926 ha->loop_down_abort_time =
4927 (LOOP_DOWN_TIME - ha->link_down_timeout);
4928 }
4929
4930 /*
4931 * Need enough time to try and get the port back.
4932 */
4933 ha->port_down_retry_count = nv->port_down_retry_count;
4934 if (qlport_down_retry)
4935 ha->port_down_retry_count = qlport_down_retry;
4936 /* Set login_retry_count */
4937 ha->login_retry_count = nv->retry_count;
4938 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4939 ha->port_down_retry_count > 3)
4940 ha->login_retry_count = ha->port_down_retry_count;
4941 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4942 ha->login_retry_count = ha->port_down_retry_count;
4943 if (ql2xloginretrycount)
4944 ha->login_retry_count = ql2xloginretrycount;
4945
4946 icb->lun_enables = cpu_to_le16(0);
4947 icb->command_resource_count = 0;
4948 icb->immediate_notify_resource_count = 0;
4949 icb->timeout = cpu_to_le16(0);
4950
4951 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4952 /* Enable RIO */
4953 icb->firmware_options[0] &= ~BIT_3;
4954 icb->add_firmware_options[0] &=
4955 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4956 icb->add_firmware_options[0] |= BIT_2;
4957 icb->response_accumulation_timer = 3;
4958 icb->interrupt_delay_timer = 5;
4959
4960 vha->flags.process_response_queue = 1;
4961 } else {
4962 /* Enable ZIO. */
4963 if (!vha->flags.init_done) {
4964 ha->zio_mode = icb->add_firmware_options[0] &
4965 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4966 ha->zio_timer = icb->interrupt_delay_timer ?
4967 icb->interrupt_delay_timer : 2;
4968 }
4969 icb->add_firmware_options[0] &=
4970 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4971 vha->flags.process_response_queue = 0;
4972 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4973 ha->zio_mode = QLA_ZIO_MODE_6;
4974
4975 ql_log(ql_log_info, vha, 0x0068,
4976 "ZIO mode %d enabled; timer delay (%d us).\n",
4977 ha->zio_mode, ha->zio_timer * 100);
4978
4979 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4980 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4981 vha->flags.process_response_queue = 1;
4982 }
4983 }
4984
4985 if (rval) {
4986 ql_log(ql_log_warn, vha, 0x0069,
4987 "NVRAM configuration failed.\n");
4988 }
4989 return (rval);
4990 }
4991
4992 static void
qla2x00_rport_del(void * data)4993 qla2x00_rport_del(void *data)
4994 {
4995 fc_port_t *fcport = data;
4996 struct fc_rport *rport;
4997 unsigned long flags;
4998
4999 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5000 rport = fcport->drport ? fcport->drport : fcport->rport;
5001 fcport->drport = NULL;
5002 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5003 if (rport) {
5004 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
5005 "%s %8phN. rport %p roles %x\n",
5006 __func__, fcport->port_name, rport,
5007 rport->roles);
5008
5009 fc_remote_port_delete(rport);
5010 }
5011 }
5012
qla2x00_set_fcport_state(fc_port_t * fcport,int state)5013 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5014 {
5015 int old_state;
5016
5017 old_state = atomic_read(&fcport->state);
5018 atomic_set(&fcport->state, state);
5019
5020 /* Don't print state transitions during initial allocation of fcport */
5021 if (old_state && old_state != state) {
5022 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
5023 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5024 fcport->port_name, port_state_str[old_state],
5025 port_state_str[state], fcport->d_id.b.domain,
5026 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5027 }
5028 }
5029
5030 /**
5031 * qla2x00_alloc_fcport() - Allocate a generic fcport.
5032 * @vha: HA context
5033 * @flags: allocation flags
5034 *
5035 * Returns a pointer to the allocated fcport, or NULL, if none available.
5036 */
5037 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)5038 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5039 {
5040 fc_port_t *fcport;
5041
5042 fcport = kzalloc(sizeof(fc_port_t), flags);
5043 if (!fcport)
5044 return NULL;
5045
5046 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5047 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5048 flags);
5049 if (!fcport->ct_desc.ct_sns) {
5050 ql_log(ql_log_warn, vha, 0xd049,
5051 "Failed to allocate ct_sns request.\n");
5052 kfree(fcport);
5053 return NULL;
5054 }
5055
5056 /* Setup fcport template structure. */
5057 fcport->vha = vha;
5058 fcport->port_type = FCT_UNKNOWN;
5059 fcport->loop_id = FC_NO_LOOP_ID;
5060 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5061 fcport->supported_classes = FC_COS_UNSPECIFIED;
5062 fcport->fp_speed = PORT_SPEED_UNKNOWN;
5063
5064 fcport->disc_state = DSC_DELETED;
5065 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5066 fcport->deleted = QLA_SESS_DELETED;
5067 fcport->login_retry = vha->hw->login_retry_count;
5068 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5069 fcport->logout_on_delete = 1;
5070
5071 if (!fcport->ct_desc.ct_sns) {
5072 ql_log(ql_log_warn, vha, 0xd049,
5073 "Failed to allocate ct_sns request.\n");
5074 kfree(fcport);
5075 return NULL;
5076 }
5077
5078 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5079 INIT_WORK(&fcport->free_work, qlt_free_session_done);
5080 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5081 INIT_LIST_HEAD(&fcport->gnl_entry);
5082 INIT_LIST_HEAD(&fcport->list);
5083
5084 return fcport;
5085 }
5086
5087 void
qla2x00_free_fcport(fc_port_t * fcport)5088 qla2x00_free_fcport(fc_port_t *fcport)
5089 {
5090 if (fcport->ct_desc.ct_sns) {
5091 dma_free_coherent(&fcport->vha->hw->pdev->dev,
5092 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5093 fcport->ct_desc.ct_sns_dma);
5094
5095 fcport->ct_desc.ct_sns = NULL;
5096 }
5097 list_del(&fcport->list);
5098 qla2x00_clear_loop_id(fcport);
5099 kfree(fcport);
5100 }
5101
qla_get_login_template(scsi_qla_host_t * vha)5102 static void qla_get_login_template(scsi_qla_host_t *vha)
5103 {
5104 struct qla_hw_data *ha = vha->hw;
5105 int rval;
5106 u32 *bp, sz;
5107 __be32 *q;
5108
5109 memset(ha->init_cb, 0, ha->init_cb_size);
5110 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5111 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5112 ha->init_cb, sz);
5113 if (rval != QLA_SUCCESS) {
5114 ql_dbg(ql_dbg_init, vha, 0x00d1,
5115 "PLOGI ELS param read fail.\n");
5116 return;
5117 }
5118 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5119
5120 bp = (uint32_t *)ha->init_cb;
5121 cpu_to_be32_array(q, bp, sz / 4);
5122 ha->flags.plogi_template_valid = 1;
5123 }
5124
5125 /*
5126 * qla2x00_configure_loop
5127 * Updates Fibre Channel Device Database with what is actually on loop.
5128 *
5129 * Input:
5130 * ha = adapter block pointer.
5131 *
5132 * Returns:
5133 * 0 = success.
5134 * 1 = error.
5135 * 2 = database was full and device was not configured.
5136 */
5137 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5138 qla2x00_configure_loop(scsi_qla_host_t *vha)
5139 {
5140 int rval;
5141 unsigned long flags, save_flags;
5142 struct qla_hw_data *ha = vha->hw;
5143
5144 rval = QLA_SUCCESS;
5145
5146 /* Get Initiator ID */
5147 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5148 rval = qla2x00_configure_hba(vha);
5149 if (rval != QLA_SUCCESS) {
5150 ql_dbg(ql_dbg_disc, vha, 0x2013,
5151 "Unable to configure HBA.\n");
5152 return (rval);
5153 }
5154 }
5155
5156 save_flags = flags = vha->dpc_flags;
5157 ql_dbg(ql_dbg_disc, vha, 0x2014,
5158 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5159
5160 /*
5161 * If we have both an RSCN and PORT UPDATE pending then handle them
5162 * both at the same time.
5163 */
5164 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5165 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5166
5167 qla2x00_get_data_rate(vha);
5168 qla_get_login_template(vha);
5169
5170 /* Determine what we need to do */
5171 if ((ha->current_topology == ISP_CFG_FL ||
5172 ha->current_topology == ISP_CFG_F) &&
5173 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5174
5175 set_bit(RSCN_UPDATE, &flags);
5176 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5177
5178 } else if (ha->current_topology == ISP_CFG_NL ||
5179 ha->current_topology == ISP_CFG_N) {
5180 clear_bit(RSCN_UPDATE, &flags);
5181 set_bit(LOCAL_LOOP_UPDATE, &flags);
5182 } else if (!vha->flags.online ||
5183 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5184 set_bit(RSCN_UPDATE, &flags);
5185 set_bit(LOCAL_LOOP_UPDATE, &flags);
5186 }
5187
5188 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5189 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5190 ql_dbg(ql_dbg_disc, vha, 0x2015,
5191 "Loop resync needed, failing.\n");
5192 rval = QLA_FUNCTION_FAILED;
5193 } else
5194 rval = qla2x00_configure_local_loop(vha);
5195 }
5196
5197 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5198 if (LOOP_TRANSITION(vha)) {
5199 ql_dbg(ql_dbg_disc, vha, 0x2099,
5200 "Needs RSCN update and loop transition.\n");
5201 rval = QLA_FUNCTION_FAILED;
5202 }
5203 else
5204 rval = qla2x00_configure_fabric(vha);
5205 }
5206
5207 if (rval == QLA_SUCCESS) {
5208 if (atomic_read(&vha->loop_down_timer) ||
5209 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5210 rval = QLA_FUNCTION_FAILED;
5211 } else {
5212 atomic_set(&vha->loop_state, LOOP_READY);
5213 ql_dbg(ql_dbg_disc, vha, 0x2069,
5214 "LOOP READY.\n");
5215 ha->flags.fw_init_done = 1;
5216
5217 /*
5218 * Process any ATIO queue entries that came in
5219 * while we weren't online.
5220 */
5221 if (qla_tgt_mode_enabled(vha) ||
5222 qla_dual_mode_enabled(vha)) {
5223 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5224 qlt_24xx_process_atio_queue(vha, 0);
5225 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5226 flags);
5227 }
5228 }
5229 }
5230
5231 if (rval) {
5232 ql_dbg(ql_dbg_disc, vha, 0x206a,
5233 "%s *** FAILED ***.\n", __func__);
5234 } else {
5235 ql_dbg(ql_dbg_disc, vha, 0x206b,
5236 "%s: exiting normally.\n", __func__);
5237 }
5238
5239 /* Restore state if a resync event occurred during processing */
5240 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5241 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5242 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5243 if (test_bit(RSCN_UPDATE, &save_flags)) {
5244 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5245 }
5246 }
5247
5248 return (rval);
5249 }
5250
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5251 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5252 {
5253 unsigned long flags;
5254 fc_port_t *fcport;
5255
5256 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5258
5259 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5260 if (fcport->n2n_flag) {
5261 qla24xx_fcport_handle_login(vha, fcport);
5262 return QLA_SUCCESS;
5263 }
5264 }
5265
5266 spin_lock_irqsave(&vha->work_lock, flags);
5267 vha->scan.scan_retry++;
5268 spin_unlock_irqrestore(&vha->work_lock, flags);
5269
5270 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5271 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5272 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5273 }
5274 return QLA_FUNCTION_FAILED;
5275 }
5276
5277 static void
qla_reinitialize_link(scsi_qla_host_t * vha)5278 qla_reinitialize_link(scsi_qla_host_t *vha)
5279 {
5280 int rval;
5281
5282 atomic_set(&vha->loop_state, LOOP_DOWN);
5283 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
5284 rval = qla2x00_full_login_lip(vha);
5285 if (rval == QLA_SUCCESS) {
5286 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
5287 } else {
5288 ql_dbg(ql_dbg_disc, vha, 0xd051,
5289 "Link reinitialization failed (%d)\n", rval);
5290 }
5291 }
5292
5293 /*
5294 * qla2x00_configure_local_loop
5295 * Updates Fibre Channel Device Database with local loop devices.
5296 *
5297 * Input:
5298 * ha = adapter block pointer.
5299 *
5300 * Returns:
5301 * 0 = success.
5302 */
5303 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5304 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5305 {
5306 int rval, rval2;
5307 int found_devs;
5308 int found;
5309 fc_port_t *fcport, *new_fcport;
5310 uint16_t index;
5311 uint16_t entries;
5312 struct gid_list_info *gid;
5313 uint16_t loop_id;
5314 uint8_t domain, area, al_pa;
5315 struct qla_hw_data *ha = vha->hw;
5316 unsigned long flags;
5317
5318 /* Inititae N2N login. */
5319 if (N2N_TOPO(ha))
5320 return qla2x00_configure_n2n_loop(vha);
5321
5322 found_devs = 0;
5323 new_fcport = NULL;
5324 entries = MAX_FIBRE_DEVICES_LOOP;
5325
5326 /* Get list of logged in devices. */
5327 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5328 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5329 &entries);
5330 if (rval != QLA_SUCCESS)
5331 goto err;
5332
5333 ql_dbg(ql_dbg_disc, vha, 0x2011,
5334 "Entries in ID list (%d).\n", entries);
5335 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5336 ha->gid_list, entries * sizeof(*ha->gid_list));
5337
5338 if (entries == 0) {
5339 spin_lock_irqsave(&vha->work_lock, flags);
5340 vha->scan.scan_retry++;
5341 spin_unlock_irqrestore(&vha->work_lock, flags);
5342
5343 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5344 u8 loop_map_entries = 0;
5345 int rc;
5346
5347 rc = qla2x00_get_fcal_position_map(vha, NULL,
5348 &loop_map_entries);
5349 if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5350 /*
5351 * There are devices that are still not logged
5352 * in. Reinitialize to give them a chance.
5353 */
5354 qla_reinitialize_link(vha);
5355 return QLA_FUNCTION_FAILED;
5356 }
5357 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5358 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5359 }
5360 } else {
5361 vha->scan.scan_retry = 0;
5362 }
5363
5364 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5365 fcport->scan_state = QLA_FCPORT_SCAN;
5366 }
5367
5368 /* Allocate temporary fcport for any new fcports discovered. */
5369 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5370 if (new_fcport == NULL) {
5371 ql_log(ql_log_warn, vha, 0x2012,
5372 "Memory allocation failed for fcport.\n");
5373 rval = QLA_MEMORY_ALLOC_FAILED;
5374 goto err;
5375 }
5376 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5377
5378 /* Add devices to port list. */
5379 gid = ha->gid_list;
5380 for (index = 0; index < entries; index++) {
5381 domain = gid->domain;
5382 area = gid->area;
5383 al_pa = gid->al_pa;
5384 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5385 loop_id = gid->loop_id_2100;
5386 else
5387 loop_id = le16_to_cpu(gid->loop_id);
5388 gid = (void *)gid + ha->gid_list_info_size;
5389
5390 /* Bypass reserved domain fields. */
5391 if ((domain & 0xf0) == 0xf0)
5392 continue;
5393
5394 /* Bypass if not same domain and area of adapter. */
5395 if (area && domain && ((area != vha->d_id.b.area) ||
5396 (domain != vha->d_id.b.domain)) &&
5397 (ha->current_topology == ISP_CFG_NL))
5398 continue;
5399
5400
5401 /* Bypass invalid local loop ID. */
5402 if (loop_id > LAST_LOCAL_LOOP_ID)
5403 continue;
5404
5405 memset(new_fcport->port_name, 0, WWN_SIZE);
5406
5407 /* Fill in member data. */
5408 new_fcport->d_id.b.domain = domain;
5409 new_fcport->d_id.b.area = area;
5410 new_fcport->d_id.b.al_pa = al_pa;
5411 new_fcport->loop_id = loop_id;
5412 new_fcport->scan_state = QLA_FCPORT_FOUND;
5413
5414 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5415 if (rval2 != QLA_SUCCESS) {
5416 ql_dbg(ql_dbg_disc, vha, 0x2097,
5417 "Failed to retrieve fcport information "
5418 "-- get_port_database=%x, loop_id=0x%04x.\n",
5419 rval2, new_fcport->loop_id);
5420 /* Skip retry if N2N */
5421 if (ha->current_topology != ISP_CFG_N) {
5422 ql_dbg(ql_dbg_disc, vha, 0x2105,
5423 "Scheduling resync.\n");
5424 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5425 continue;
5426 }
5427 }
5428
5429 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5430 /* Check for matching device in port list. */
5431 found = 0;
5432 fcport = NULL;
5433 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5434 if (memcmp(new_fcport->port_name, fcport->port_name,
5435 WWN_SIZE))
5436 continue;
5437
5438 fcport->flags &= ~FCF_FABRIC_DEVICE;
5439 fcport->loop_id = new_fcport->loop_id;
5440 fcport->port_type = new_fcport->port_type;
5441 fcport->d_id.b24 = new_fcport->d_id.b24;
5442 memcpy(fcport->node_name, new_fcport->node_name,
5443 WWN_SIZE);
5444 fcport->scan_state = QLA_FCPORT_FOUND;
5445 if (fcport->login_retry == 0) {
5446 fcport->login_retry = vha->hw->login_retry_count;
5447 ql_dbg(ql_dbg_disc, vha, 0x2135,
5448 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5449 fcport->port_name, fcport->loop_id,
5450 fcport->login_retry);
5451 }
5452 found++;
5453 break;
5454 }
5455
5456 if (!found) {
5457 /* New device, add to fcports list. */
5458 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5459
5460 /* Allocate a new replacement fcport. */
5461 fcport = new_fcport;
5462
5463 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5464
5465 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5466
5467 if (new_fcport == NULL) {
5468 ql_log(ql_log_warn, vha, 0xd031,
5469 "Failed to allocate memory for fcport.\n");
5470 rval = QLA_MEMORY_ALLOC_FAILED;
5471 goto err;
5472 }
5473 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5474 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5475 }
5476
5477 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5478
5479 /* Base iIDMA settings on HBA port speed. */
5480 fcport->fp_speed = ha->link_data_rate;
5481
5482 found_devs++;
5483 }
5484
5485 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5486 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5487 break;
5488
5489 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5490 if ((qla_dual_mode_enabled(vha) ||
5491 qla_ini_mode_enabled(vha)) &&
5492 atomic_read(&fcport->state) == FCS_ONLINE) {
5493 qla2x00_mark_device_lost(vha, fcport,
5494 ql2xplogiabsentdevice);
5495 if (fcport->loop_id != FC_NO_LOOP_ID &&
5496 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5497 fcport->port_type != FCT_INITIATOR &&
5498 fcport->port_type != FCT_BROADCAST) {
5499 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5500 "%s %d %8phC post del sess\n",
5501 __func__, __LINE__,
5502 fcport->port_name);
5503
5504 qlt_schedule_sess_for_deletion(fcport);
5505 continue;
5506 }
5507 }
5508 }
5509
5510 if (fcport->scan_state == QLA_FCPORT_FOUND)
5511 qla24xx_fcport_handle_login(vha, fcport);
5512 }
5513
5514 qla2x00_free_fcport(new_fcport);
5515
5516 return rval;
5517
5518 err:
5519 ql_dbg(ql_dbg_disc, vha, 0x2098,
5520 "Configure local loop error exit: rval=%x.\n", rval);
5521 return rval;
5522 }
5523
5524 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5525 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5526 {
5527 int rval;
5528 uint16_t mb[MAILBOX_REGISTER_COUNT];
5529 struct qla_hw_data *ha = vha->hw;
5530
5531 if (!IS_IIDMA_CAPABLE(ha))
5532 return;
5533
5534 if (atomic_read(&fcport->state) != FCS_ONLINE)
5535 return;
5536
5537 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5538 fcport->fp_speed > ha->link_data_rate ||
5539 !ha->flags.gpsc_supported)
5540 return;
5541
5542 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5543 mb);
5544 if (rval != QLA_SUCCESS) {
5545 ql_dbg(ql_dbg_disc, vha, 0x2004,
5546 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5547 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5548 } else {
5549 ql_dbg(ql_dbg_disc, vha, 0x2005,
5550 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5551 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5552 fcport->fp_speed, fcport->port_name);
5553 }
5554 }
5555
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5556 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5557 {
5558 qla2x00_iidma_fcport(vha, fcport);
5559 qla24xx_update_fcport_fcp_prio(vha, fcport);
5560 }
5561
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5562 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5563 {
5564 struct qla_work_evt *e;
5565
5566 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5567 if (!e)
5568 return QLA_FUNCTION_FAILED;
5569
5570 e->u.fcport.fcport = fcport;
5571 return qla2x00_post_work(vha, e);
5572 }
5573
5574 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5575 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5576 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5577 {
5578 struct fc_rport_identifiers rport_ids;
5579 struct fc_rport *rport;
5580 unsigned long flags;
5581
5582 if (atomic_read(&fcport->state) == FCS_ONLINE)
5583 return;
5584
5585 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5586 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5587 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5588 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5589 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5590 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5591 if (!rport) {
5592 ql_log(ql_log_warn, vha, 0x2006,
5593 "Unable to allocate fc remote port.\n");
5594 return;
5595 }
5596
5597 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5598 *((fc_port_t **)rport->dd_data) = fcport;
5599 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5600
5601 rport->supported_classes = fcport->supported_classes;
5602
5603 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5604 if (fcport->port_type == FCT_INITIATOR)
5605 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5606 if (fcport->port_type == FCT_TARGET)
5607 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5608 if (fcport->port_type & FCT_NVME_INITIATOR)
5609 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5610 if (fcport->port_type & FCT_NVME_TARGET)
5611 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5612 if (fcport->port_type & FCT_NVME_DISCOVERY)
5613 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5614
5615 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5616 "%s %8phN. rport %p is %s mode\n",
5617 __func__, fcport->port_name, rport,
5618 (fcport->port_type == FCT_TARGET) ? "tgt" :
5619 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5620
5621 fc_remote_port_rolechg(rport, rport_ids.roles);
5622 }
5623
5624 /*
5625 * qla2x00_update_fcport
5626 * Updates device on list.
5627 *
5628 * Input:
5629 * ha = adapter block pointer.
5630 * fcport = port structure pointer.
5631 *
5632 * Return:
5633 * 0 - Success
5634 * BIT_0 - error
5635 *
5636 * Context:
5637 * Kernel context.
5638 */
5639 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5640 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5641 {
5642 if (IS_SW_RESV_ADDR(fcport->d_id))
5643 return;
5644
5645 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5646 __func__, fcport->port_name);
5647
5648 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5649 fcport->login_retry = vha->hw->login_retry_count;
5650 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5651 fcport->deleted = 0;
5652 if (vha->hw->current_topology == ISP_CFG_NL)
5653 fcport->logout_on_delete = 0;
5654 else
5655 fcport->logout_on_delete = 1;
5656 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5657
5658 switch (vha->hw->current_topology) {
5659 case ISP_CFG_N:
5660 case ISP_CFG_NL:
5661 fcport->keep_nport_handle = 1;
5662 break;
5663 default:
5664 break;
5665 }
5666
5667 qla2x00_iidma_fcport(vha, fcport);
5668
5669 qla2x00_dfs_create_rport(vha, fcport);
5670
5671 if (NVME_TARGET(vha->hw, fcport)) {
5672 qla_nvme_register_remote(vha, fcport);
5673 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5674 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5675 return;
5676 }
5677
5678 qla24xx_update_fcport_fcp_prio(vha, fcport);
5679
5680 switch (vha->host->active_mode) {
5681 case MODE_INITIATOR:
5682 qla2x00_reg_remote_port(vha, fcport);
5683 break;
5684 case MODE_TARGET:
5685 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5686 !vha->vha_tgt.qla_tgt->tgt_stopped)
5687 qlt_fc_port_added(vha, fcport);
5688 break;
5689 case MODE_DUAL:
5690 qla2x00_reg_remote_port(vha, fcport);
5691 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5692 !vha->vha_tgt.qla_tgt->tgt_stopped)
5693 qlt_fc_port_added(vha, fcport);
5694 break;
5695 default:
5696 break;
5697 }
5698
5699 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5700
5701 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5702 if (fcport->id_changed) {
5703 fcport->id_changed = 0;
5704 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5705 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5706 __func__, __LINE__, fcport->port_name,
5707 vha->fcport_count);
5708 qla24xx_post_gfpnid_work(vha, fcport);
5709 } else {
5710 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5711 "%s %d %8phC post gpsc fcp_cnt %d\n",
5712 __func__, __LINE__, fcport->port_name,
5713 vha->fcport_count);
5714 qla24xx_post_gpsc_work(vha, fcport);
5715 }
5716 }
5717
5718 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5719 }
5720
qla_register_fcport_fn(struct work_struct * work)5721 void qla_register_fcport_fn(struct work_struct *work)
5722 {
5723 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5724 u32 rscn_gen = fcport->rscn_gen;
5725 u16 data[2];
5726
5727 if (IS_SW_RESV_ADDR(fcport->d_id))
5728 return;
5729
5730 qla2x00_update_fcport(fcport->vha, fcport);
5731
5732 if (rscn_gen != fcport->rscn_gen) {
5733 /* RSCN(s) came in while registration */
5734 switch (fcport->next_disc_state) {
5735 case DSC_DELETE_PEND:
5736 qlt_schedule_sess_for_deletion(fcport);
5737 break;
5738 case DSC_ADISC:
5739 data[0] = data[1] = 0;
5740 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5741 data);
5742 break;
5743 default:
5744 break;
5745 }
5746 }
5747 }
5748
5749 /*
5750 * qla2x00_configure_fabric
5751 * Setup SNS devices with loop ID's.
5752 *
5753 * Input:
5754 * ha = adapter block pointer.
5755 *
5756 * Returns:
5757 * 0 = success.
5758 * BIT_0 = error
5759 */
5760 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)5761 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5762 {
5763 int rval;
5764 fc_port_t *fcport;
5765 uint16_t mb[MAILBOX_REGISTER_COUNT];
5766 uint16_t loop_id;
5767 LIST_HEAD(new_fcports);
5768 struct qla_hw_data *ha = vha->hw;
5769 int discovery_gen;
5770
5771 /* If FL port exists, then SNS is present */
5772 if (IS_FWI2_CAPABLE(ha))
5773 loop_id = NPH_F_PORT;
5774 else
5775 loop_id = SNS_FL_PORT;
5776 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5777 if (rval != QLA_SUCCESS) {
5778 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5779 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5780
5781 vha->device_flags &= ~SWITCH_FOUND;
5782 return (QLA_SUCCESS);
5783 }
5784 vha->device_flags |= SWITCH_FOUND;
5785
5786 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
5787 if (rval != QLA_SUCCESS)
5788 ql_dbg(ql_dbg_disc, vha, 0x20ff,
5789 "Failed to get Fabric Port Name\n");
5790
5791 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5792 rval = qla2x00_send_change_request(vha, 0x3, 0);
5793 if (rval != QLA_SUCCESS)
5794 ql_log(ql_log_warn, vha, 0x121,
5795 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5796 rval);
5797 }
5798
5799 do {
5800 qla2x00_mgmt_svr_login(vha);
5801
5802 /* Ensure we are logged into the SNS. */
5803 loop_id = NPH_SNS_LID(ha);
5804 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5805 0xfc, mb, BIT_1|BIT_0);
5806 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5807 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5808 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5809 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5810 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5811 return rval;
5812 }
5813
5814 /* FDMI support. */
5815 if (ql2xfdmienable &&
5816 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5817 qla2x00_fdmi_register(vha);
5818
5819 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5820 if (qla2x00_rft_id(vha)) {
5821 /* EMPTY */
5822 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5823 "Register FC-4 TYPE failed.\n");
5824 if (test_bit(LOOP_RESYNC_NEEDED,
5825 &vha->dpc_flags))
5826 break;
5827 }
5828 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5829 /* EMPTY */
5830 ql_dbg(ql_dbg_disc, vha, 0x209a,
5831 "Register FC-4 Features failed.\n");
5832 if (test_bit(LOOP_RESYNC_NEEDED,
5833 &vha->dpc_flags))
5834 break;
5835 }
5836 if (vha->flags.nvme_enabled) {
5837 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5838 ql_dbg(ql_dbg_disc, vha, 0x2049,
5839 "Register NVME FC Type Features failed.\n");
5840 }
5841 }
5842 if (qla2x00_rnn_id(vha)) {
5843 /* EMPTY */
5844 ql_dbg(ql_dbg_disc, vha, 0x2104,
5845 "Register Node Name failed.\n");
5846 if (test_bit(LOOP_RESYNC_NEEDED,
5847 &vha->dpc_flags))
5848 break;
5849 } else if (qla2x00_rsnn_nn(vha)) {
5850 /* EMPTY */
5851 ql_dbg(ql_dbg_disc, vha, 0x209b,
5852 "Register Symbolic Node Name failed.\n");
5853 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5854 break;
5855 }
5856 }
5857
5858
5859 /* Mark the time right before querying FW for connected ports.
5860 * This process is long, asynchronous and by the time it's done,
5861 * collected information might not be accurate anymore. E.g.
5862 * disconnected port might have re-connected and a brand new
5863 * session has been created. In this case session's generation
5864 * will be newer than discovery_gen. */
5865 qlt_do_generation_tick(vha, &discovery_gen);
5866
5867 if (USE_ASYNC_SCAN(ha)) {
5868 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5869 NULL);
5870 if (rval)
5871 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5872 } else {
5873 list_for_each_entry(fcport, &vha->vp_fcports, list)
5874 fcport->scan_state = QLA_FCPORT_SCAN;
5875
5876 rval = qla2x00_find_all_fabric_devs(vha);
5877 }
5878 if (rval != QLA_SUCCESS)
5879 break;
5880 } while (0);
5881
5882 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5883 qla_nvme_register_hba(vha);
5884
5885 if (rval)
5886 ql_dbg(ql_dbg_disc, vha, 0x2068,
5887 "Configure fabric error exit rval=%d.\n", rval);
5888
5889 return (rval);
5890 }
5891
5892 /*
5893 * qla2x00_find_all_fabric_devs
5894 *
5895 * Input:
5896 * ha = adapter block pointer.
5897 * dev = database device entry pointer.
5898 *
5899 * Returns:
5900 * 0 = success.
5901 *
5902 * Context:
5903 * Kernel context.
5904 */
5905 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)5906 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5907 {
5908 int rval;
5909 uint16_t loop_id;
5910 fc_port_t *fcport, *new_fcport;
5911 int found;
5912
5913 sw_info_t *swl;
5914 int swl_idx;
5915 int first_dev, last_dev;
5916 port_id_t wrap = {}, nxt_d_id;
5917 struct qla_hw_data *ha = vha->hw;
5918 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5919 unsigned long flags;
5920
5921 rval = QLA_SUCCESS;
5922
5923 /* Try GID_PT to get device list, else GAN. */
5924 if (!ha->swl)
5925 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5926 GFP_KERNEL);
5927 swl = ha->swl;
5928 if (!swl) {
5929 /*EMPTY*/
5930 ql_dbg(ql_dbg_disc, vha, 0x209c,
5931 "GID_PT allocations failed, fallback on GA_NXT.\n");
5932 } else {
5933 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5934 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5935 swl = NULL;
5936 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5937 return rval;
5938 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5939 swl = NULL;
5940 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5941 return rval;
5942 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5943 swl = NULL;
5944 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5945 return rval;
5946 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5947 swl = NULL;
5948 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5949 return rval;
5950 }
5951
5952 /* If other queries succeeded probe for FC-4 type */
5953 if (swl) {
5954 qla2x00_gff_id(vha, swl);
5955 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5956 return rval;
5957 }
5958 }
5959 swl_idx = 0;
5960
5961 /* Allocate temporary fcport for any new fcports discovered. */
5962 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5963 if (new_fcport == NULL) {
5964 ql_log(ql_log_warn, vha, 0x209d,
5965 "Failed to allocate memory for fcport.\n");
5966 return (QLA_MEMORY_ALLOC_FAILED);
5967 }
5968 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5969 /* Set start port ID scan at adapter ID. */
5970 first_dev = 1;
5971 last_dev = 0;
5972
5973 /* Starting free loop ID. */
5974 loop_id = ha->min_external_loopid;
5975 for (; loop_id <= ha->max_loop_id; loop_id++) {
5976 if (qla2x00_is_reserved_id(vha, loop_id))
5977 continue;
5978
5979 if (ha->current_topology == ISP_CFG_FL &&
5980 (atomic_read(&vha->loop_down_timer) ||
5981 LOOP_TRANSITION(vha))) {
5982 atomic_set(&vha->loop_down_timer, 0);
5983 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5984 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5985 break;
5986 }
5987
5988 if (swl != NULL) {
5989 if (last_dev) {
5990 wrap.b24 = new_fcport->d_id.b24;
5991 } else {
5992 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5993 memcpy(new_fcport->node_name,
5994 swl[swl_idx].node_name, WWN_SIZE);
5995 memcpy(new_fcport->port_name,
5996 swl[swl_idx].port_name, WWN_SIZE);
5997 memcpy(new_fcport->fabric_port_name,
5998 swl[swl_idx].fabric_port_name, WWN_SIZE);
5999 new_fcport->fp_speed = swl[swl_idx].fp_speed;
6000 new_fcport->fc4_type = swl[swl_idx].fc4_type;
6001
6002 new_fcport->nvme_flag = 0;
6003 if (vha->flags.nvme_enabled &&
6004 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6005 ql_log(ql_log_info, vha, 0x2131,
6006 "FOUND: NVME port %8phC as FC Type 28h\n",
6007 new_fcport->port_name);
6008 }
6009
6010 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6011 last_dev = 1;
6012 }
6013 swl_idx++;
6014 }
6015 } else {
6016 /* Send GA_NXT to the switch */
6017 rval = qla2x00_ga_nxt(vha, new_fcport);
6018 if (rval != QLA_SUCCESS) {
6019 ql_log(ql_log_warn, vha, 0x209e,
6020 "SNS scan failed -- assuming "
6021 "zero-entry result.\n");
6022 rval = QLA_SUCCESS;
6023 break;
6024 }
6025 }
6026
6027 /* If wrap on switch device list, exit. */
6028 if (first_dev) {
6029 wrap.b24 = new_fcport->d_id.b24;
6030 first_dev = 0;
6031 } else if (new_fcport->d_id.b24 == wrap.b24) {
6032 ql_dbg(ql_dbg_disc, vha, 0x209f,
6033 "Device wrap (%02x%02x%02x).\n",
6034 new_fcport->d_id.b.domain,
6035 new_fcport->d_id.b.area,
6036 new_fcport->d_id.b.al_pa);
6037 break;
6038 }
6039
6040 /* Bypass if same physical adapter. */
6041 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6042 continue;
6043
6044 /* Bypass virtual ports of the same host. */
6045 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6046 continue;
6047
6048 /* Bypass if same domain and area of adapter. */
6049 if (((new_fcport->d_id.b24 & 0xffff00) ==
6050 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6051 ISP_CFG_FL)
6052 continue;
6053
6054 /* Bypass reserved domain fields. */
6055 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6056 continue;
6057
6058 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
6059 if (ql2xgffidenable &&
6060 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6061 new_fcport->fc4_type != 0))
6062 continue;
6063
6064 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6065
6066 /* Locate matching device in database. */
6067 found = 0;
6068 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6069 if (memcmp(new_fcport->port_name, fcport->port_name,
6070 WWN_SIZE))
6071 continue;
6072
6073 fcport->scan_state = QLA_FCPORT_FOUND;
6074
6075 found++;
6076
6077 /* Update port state. */
6078 memcpy(fcport->fabric_port_name,
6079 new_fcport->fabric_port_name, WWN_SIZE);
6080 fcport->fp_speed = new_fcport->fp_speed;
6081
6082 /*
6083 * If address the same and state FCS_ONLINE
6084 * (or in target mode), nothing changed.
6085 */
6086 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6087 (atomic_read(&fcport->state) == FCS_ONLINE ||
6088 (vha->host->active_mode == MODE_TARGET))) {
6089 break;
6090 }
6091
6092 /*
6093 * If device was not a fabric device before.
6094 */
6095 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6096 fcport->d_id.b24 = new_fcport->d_id.b24;
6097 qla2x00_clear_loop_id(fcport);
6098 fcport->flags |= (FCF_FABRIC_DEVICE |
6099 FCF_LOGIN_NEEDED);
6100 break;
6101 }
6102
6103 /*
6104 * Port ID changed or device was marked to be updated;
6105 * Log it out if still logged in and mark it for
6106 * relogin later.
6107 */
6108 if (qla_tgt_mode_enabled(base_vha)) {
6109 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6110 "port changed FC ID, %8phC"
6111 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6112 fcport->port_name,
6113 fcport->d_id.b.domain,
6114 fcport->d_id.b.area,
6115 fcport->d_id.b.al_pa,
6116 fcport->loop_id,
6117 new_fcport->d_id.b.domain,
6118 new_fcport->d_id.b.area,
6119 new_fcport->d_id.b.al_pa);
6120 fcport->d_id.b24 = new_fcport->d_id.b24;
6121 break;
6122 }
6123
6124 fcport->d_id.b24 = new_fcport->d_id.b24;
6125 fcport->flags |= FCF_LOGIN_NEEDED;
6126 break;
6127 }
6128
6129 if (found && NVME_TARGET(vha->hw, fcport)) {
6130 if (fcport->disc_state == DSC_DELETE_PEND) {
6131 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6132 vha->fcport_count--;
6133 fcport->login_succ = 0;
6134 }
6135 }
6136
6137 if (found) {
6138 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6139 continue;
6140 }
6141 /* If device was not in our fcports list, then add it. */
6142 new_fcport->scan_state = QLA_FCPORT_FOUND;
6143 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6144
6145 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6146
6147
6148 /* Allocate a new replacement fcport. */
6149 nxt_d_id.b24 = new_fcport->d_id.b24;
6150 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6151 if (new_fcport == NULL) {
6152 ql_log(ql_log_warn, vha, 0xd032,
6153 "Memory allocation failed for fcport.\n");
6154 return (QLA_MEMORY_ALLOC_FAILED);
6155 }
6156 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6157 new_fcport->d_id.b24 = nxt_d_id.b24;
6158 }
6159
6160 qla2x00_free_fcport(new_fcport);
6161
6162 /*
6163 * Logout all previous fabric dev marked lost, except FCP2 devices.
6164 */
6165 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6166 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6167 break;
6168
6169 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6170 continue;
6171
6172 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6173 if ((qla_dual_mode_enabled(vha) ||
6174 qla_ini_mode_enabled(vha)) &&
6175 atomic_read(&fcport->state) == FCS_ONLINE) {
6176 qla2x00_mark_device_lost(vha, fcport,
6177 ql2xplogiabsentdevice);
6178 if (fcport->loop_id != FC_NO_LOOP_ID &&
6179 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6180 fcport->port_type != FCT_INITIATOR &&
6181 fcport->port_type != FCT_BROADCAST) {
6182 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6183 "%s %d %8phC post del sess\n",
6184 __func__, __LINE__,
6185 fcport->port_name);
6186 qlt_schedule_sess_for_deletion(fcport);
6187 continue;
6188 }
6189 }
6190 }
6191
6192 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6193 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6194 qla24xx_fcport_handle_login(vha, fcport);
6195 }
6196 return (rval);
6197 }
6198
6199 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6200 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6201 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6202 {
6203 int loop_id = FC_NO_LOOP_ID;
6204 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6205 unsigned long flags;
6206 struct qla_hw_data *ha = vha->hw;
6207
6208 if (vha->vp_idx == 0) {
6209 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6210 return NPH_MGMT_SERVER;
6211 }
6212
6213 /* pick id from high and work down to low */
6214 spin_lock_irqsave(&ha->vport_slock, flags);
6215 for (; lid > 0; lid--) {
6216 if (!test_bit(lid, vha->hw->loop_id_map)) {
6217 set_bit(lid, vha->hw->loop_id_map);
6218 loop_id = lid;
6219 break;
6220 }
6221 }
6222 spin_unlock_irqrestore(&ha->vport_slock, flags);
6223
6224 return loop_id;
6225 }
6226
6227 /*
6228 * qla2x00_fabric_login
6229 * Issue fabric login command.
6230 *
6231 * Input:
6232 * ha = adapter block pointer.
6233 * device = pointer to FC device type structure.
6234 *
6235 * Returns:
6236 * 0 - Login successfully
6237 * 1 - Login failed
6238 * 2 - Initiator device
6239 * 3 - Fatal error
6240 */
6241 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6242 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6243 uint16_t *next_loopid)
6244 {
6245 int rval;
6246 int retry;
6247 uint16_t tmp_loopid;
6248 uint16_t mb[MAILBOX_REGISTER_COUNT];
6249 struct qla_hw_data *ha = vha->hw;
6250
6251 retry = 0;
6252 tmp_loopid = 0;
6253
6254 for (;;) {
6255 ql_dbg(ql_dbg_disc, vha, 0x2000,
6256 "Trying Fabric Login w/loop id 0x%04x for port "
6257 "%02x%02x%02x.\n",
6258 fcport->loop_id, fcport->d_id.b.domain,
6259 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6260
6261 /* Login fcport on switch. */
6262 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6263 fcport->d_id.b.domain, fcport->d_id.b.area,
6264 fcport->d_id.b.al_pa, mb, BIT_0);
6265 if (rval != QLA_SUCCESS) {
6266 return rval;
6267 }
6268 if (mb[0] == MBS_PORT_ID_USED) {
6269 /*
6270 * Device has another loop ID. The firmware team
6271 * recommends the driver perform an implicit login with
6272 * the specified ID again. The ID we just used is save
6273 * here so we return with an ID that can be tried by
6274 * the next login.
6275 */
6276 retry++;
6277 tmp_loopid = fcport->loop_id;
6278 fcport->loop_id = mb[1];
6279
6280 ql_dbg(ql_dbg_disc, vha, 0x2001,
6281 "Fabric Login: port in use - next loop "
6282 "id=0x%04x, port id= %02x%02x%02x.\n",
6283 fcport->loop_id, fcport->d_id.b.domain,
6284 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6285
6286 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6287 /*
6288 * Login succeeded.
6289 */
6290 if (retry) {
6291 /* A retry occurred before. */
6292 *next_loopid = tmp_loopid;
6293 } else {
6294 /*
6295 * No retry occurred before. Just increment the
6296 * ID value for next login.
6297 */
6298 *next_loopid = (fcport->loop_id + 1);
6299 }
6300
6301 if (mb[1] & BIT_0) {
6302 fcport->port_type = FCT_INITIATOR;
6303 } else {
6304 fcport->port_type = FCT_TARGET;
6305 if (mb[1] & BIT_1) {
6306 fcport->flags |= FCF_FCP2_DEVICE;
6307 }
6308 }
6309
6310 if (mb[10] & BIT_0)
6311 fcport->supported_classes |= FC_COS_CLASS2;
6312 if (mb[10] & BIT_1)
6313 fcport->supported_classes |= FC_COS_CLASS3;
6314
6315 if (IS_FWI2_CAPABLE(ha)) {
6316 if (mb[10] & BIT_7)
6317 fcport->flags |=
6318 FCF_CONF_COMP_SUPPORTED;
6319 }
6320
6321 rval = QLA_SUCCESS;
6322 break;
6323 } else if (mb[0] == MBS_LOOP_ID_USED) {
6324 /*
6325 * Loop ID already used, try next loop ID.
6326 */
6327 fcport->loop_id++;
6328 rval = qla2x00_find_new_loop_id(vha, fcport);
6329 if (rval != QLA_SUCCESS) {
6330 /* Ran out of loop IDs to use */
6331 break;
6332 }
6333 } else if (mb[0] == MBS_COMMAND_ERROR) {
6334 /*
6335 * Firmware possibly timed out during login. If NO
6336 * retries are left to do then the device is declared
6337 * dead.
6338 */
6339 *next_loopid = fcport->loop_id;
6340 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6341 fcport->d_id.b.domain, fcport->d_id.b.area,
6342 fcport->d_id.b.al_pa);
6343 qla2x00_mark_device_lost(vha, fcport, 1);
6344
6345 rval = 1;
6346 break;
6347 } else {
6348 /*
6349 * unrecoverable / not handled error
6350 */
6351 ql_dbg(ql_dbg_disc, vha, 0x2002,
6352 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6353 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6354 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6355 fcport->loop_id, jiffies);
6356
6357 *next_loopid = fcport->loop_id;
6358 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6359 fcport->d_id.b.domain, fcport->d_id.b.area,
6360 fcport->d_id.b.al_pa);
6361 qla2x00_clear_loop_id(fcport);
6362 fcport->login_retry = 0;
6363
6364 rval = 3;
6365 break;
6366 }
6367 }
6368
6369 return (rval);
6370 }
6371
6372 /*
6373 * qla2x00_local_device_login
6374 * Issue local device login command.
6375 *
6376 * Input:
6377 * ha = adapter block pointer.
6378 * loop_id = loop id of device to login to.
6379 *
6380 * Returns (Where's the #define!!!!):
6381 * 0 - Login successfully
6382 * 1 - Login failed
6383 * 3 - Fatal error
6384 */
6385 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6386 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6387 {
6388 int rval;
6389 uint16_t mb[MAILBOX_REGISTER_COUNT];
6390
6391 memset(mb, 0, sizeof(mb));
6392 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6393 if (rval == QLA_SUCCESS) {
6394 /* Interrogate mailbox registers for any errors */
6395 if (mb[0] == MBS_COMMAND_ERROR)
6396 rval = 1;
6397 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6398 /* device not in PCB table */
6399 rval = 3;
6400 }
6401
6402 return (rval);
6403 }
6404
6405 /*
6406 * qla2x00_loop_resync
6407 * Resync with fibre channel devices.
6408 *
6409 * Input:
6410 * ha = adapter block pointer.
6411 *
6412 * Returns:
6413 * 0 = success
6414 */
6415 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6416 qla2x00_loop_resync(scsi_qla_host_t *vha)
6417 {
6418 int rval = QLA_SUCCESS;
6419 uint32_t wait_time;
6420
6421 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6422 if (vha->flags.online) {
6423 if (!(rval = qla2x00_fw_ready(vha))) {
6424 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6425 wait_time = 256;
6426 do {
6427 if (!IS_QLAFX00(vha->hw)) {
6428 /*
6429 * Issue a marker after FW becomes
6430 * ready.
6431 */
6432 qla2x00_marker(vha, vha->hw->base_qpair,
6433 0, 0, MK_SYNC_ALL);
6434 vha->marker_needed = 0;
6435 }
6436
6437 /* Remap devices on Loop. */
6438 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6439
6440 if (IS_QLAFX00(vha->hw))
6441 qlafx00_configure_devices(vha);
6442 else
6443 qla2x00_configure_loop(vha);
6444
6445 wait_time--;
6446 } while (!atomic_read(&vha->loop_down_timer) &&
6447 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6448 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6449 &vha->dpc_flags)));
6450 }
6451 }
6452
6453 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6454 return (QLA_FUNCTION_FAILED);
6455
6456 if (rval)
6457 ql_dbg(ql_dbg_disc, vha, 0x206c,
6458 "%s *** FAILED ***.\n", __func__);
6459
6460 return (rval);
6461 }
6462
6463 /*
6464 * qla2x00_perform_loop_resync
6465 * Description: This function will set the appropriate flags and call
6466 * qla2x00_loop_resync. If successful loop will be resynced
6467 * Arguments : scsi_qla_host_t pointer
6468 * returm : Success or Failure
6469 */
6470
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6471 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6472 {
6473 int32_t rval = 0;
6474
6475 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6476 /*Configure the flags so that resync happens properly*/
6477 atomic_set(&ha->loop_down_timer, 0);
6478 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6479 atomic_set(&ha->loop_state, LOOP_UP);
6480 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6481 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6482 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6483
6484 rval = qla2x00_loop_resync(ha);
6485 } else
6486 atomic_set(&ha->loop_state, LOOP_DEAD);
6487
6488 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6489 }
6490
6491 return rval;
6492 }
6493
6494 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6495 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6496 {
6497 fc_port_t *fcport;
6498 struct scsi_qla_host *vha;
6499 struct qla_hw_data *ha = base_vha->hw;
6500 unsigned long flags;
6501
6502 spin_lock_irqsave(&ha->vport_slock, flags);
6503 /* Go with deferred removal of rport references. */
6504 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6505 atomic_inc(&vha->vref_count);
6506 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6507 if (fcport->drport &&
6508 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6509 spin_unlock_irqrestore(&ha->vport_slock, flags);
6510 qla2x00_rport_del(fcport);
6511
6512 spin_lock_irqsave(&ha->vport_slock, flags);
6513 }
6514 }
6515 atomic_dec(&vha->vref_count);
6516 wake_up(&vha->vref_waitq);
6517 }
6518 spin_unlock_irqrestore(&ha->vport_slock, flags);
6519 }
6520
6521 /* Assumes idc_lock always held on entry */
6522 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6523 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6524 {
6525 struct qla_hw_data *ha = vha->hw;
6526 uint32_t drv_presence, drv_presence_mask;
6527 uint32_t dev_part_info1, dev_part_info2, class_type;
6528 uint32_t class_type_mask = 0x3;
6529 uint16_t fcoe_other_function = 0xffff, i;
6530
6531 if (IS_QLA8044(ha)) {
6532 drv_presence = qla8044_rd_direct(vha,
6533 QLA8044_CRB_DRV_ACTIVE_INDEX);
6534 dev_part_info1 = qla8044_rd_direct(vha,
6535 QLA8044_CRB_DEV_PART_INFO_INDEX);
6536 dev_part_info2 = qla8044_rd_direct(vha,
6537 QLA8044_CRB_DEV_PART_INFO2);
6538 } else {
6539 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6540 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6541 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6542 }
6543 for (i = 0; i < 8; i++) {
6544 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6545 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6546 (i != ha->portnum)) {
6547 fcoe_other_function = i;
6548 break;
6549 }
6550 }
6551 if (fcoe_other_function == 0xffff) {
6552 for (i = 0; i < 8; i++) {
6553 class_type = ((dev_part_info2 >> (i * 4)) &
6554 class_type_mask);
6555 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6556 ((i + 8) != ha->portnum)) {
6557 fcoe_other_function = i + 8;
6558 break;
6559 }
6560 }
6561 }
6562 /*
6563 * Prepare drv-presence mask based on fcoe functions present.
6564 * However consider only valid physical fcoe function numbers (0-15).
6565 */
6566 drv_presence_mask = ~((1 << (ha->portnum)) |
6567 ((fcoe_other_function == 0xffff) ?
6568 0 : (1 << (fcoe_other_function))));
6569
6570 /* We are the reset owner iff:
6571 * - No other protocol drivers present.
6572 * - This is the lowest among fcoe functions. */
6573 if (!(drv_presence & drv_presence_mask) &&
6574 (ha->portnum < fcoe_other_function)) {
6575 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6576 "This host is Reset owner.\n");
6577 ha->flags.nic_core_reset_owner = 1;
6578 }
6579 }
6580
6581 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6582 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6583 {
6584 int rval = QLA_SUCCESS;
6585 struct qla_hw_data *ha = vha->hw;
6586 uint32_t drv_ack;
6587
6588 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6589 if (rval == QLA_SUCCESS) {
6590 drv_ack |= (1 << ha->portnum);
6591 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6592 }
6593
6594 return rval;
6595 }
6596
6597 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6598 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6599 {
6600 int rval = QLA_SUCCESS;
6601 struct qla_hw_data *ha = vha->hw;
6602 uint32_t drv_ack;
6603
6604 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6605 if (rval == QLA_SUCCESS) {
6606 drv_ack &= ~(1 << ha->portnum);
6607 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6608 }
6609
6610 return rval;
6611 }
6612
6613 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)6614 qla83xx_dev_state_to_string(uint32_t dev_state)
6615 {
6616 switch (dev_state) {
6617 case QLA8XXX_DEV_COLD:
6618 return "COLD/RE-INIT";
6619 case QLA8XXX_DEV_INITIALIZING:
6620 return "INITIALIZING";
6621 case QLA8XXX_DEV_READY:
6622 return "READY";
6623 case QLA8XXX_DEV_NEED_RESET:
6624 return "NEED RESET";
6625 case QLA8XXX_DEV_NEED_QUIESCENT:
6626 return "NEED QUIESCENT";
6627 case QLA8XXX_DEV_FAILED:
6628 return "FAILED";
6629 case QLA8XXX_DEV_QUIESCENT:
6630 return "QUIESCENT";
6631 default:
6632 return "Unknown";
6633 }
6634 }
6635
6636 /* Assumes idc-lock always held on entry */
6637 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6638 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6639 {
6640 struct qla_hw_data *ha = vha->hw;
6641 uint32_t idc_audit_reg = 0, duration_secs = 0;
6642
6643 switch (audit_type) {
6644 case IDC_AUDIT_TIMESTAMP:
6645 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6646 idc_audit_reg = (ha->portnum) |
6647 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6648 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6649 break;
6650
6651 case IDC_AUDIT_COMPLETION:
6652 duration_secs = ((jiffies_to_msecs(jiffies) -
6653 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6654 idc_audit_reg = (ha->portnum) |
6655 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6656 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6657 break;
6658
6659 default:
6660 ql_log(ql_log_warn, vha, 0xb078,
6661 "Invalid audit type specified.\n");
6662 break;
6663 }
6664 }
6665
6666 /* Assumes idc_lock always held on entry */
6667 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6668 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6669 {
6670 struct qla_hw_data *ha = vha->hw;
6671 uint32_t idc_control, dev_state;
6672
6673 __qla83xx_get_idc_control(vha, &idc_control);
6674 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6675 ql_log(ql_log_info, vha, 0xb080,
6676 "NIC Core reset has been disabled. idc-control=0x%x\n",
6677 idc_control);
6678 return QLA_FUNCTION_FAILED;
6679 }
6680
6681 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6682 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6683 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6684 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6685 QLA8XXX_DEV_NEED_RESET);
6686 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6687 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6688 } else {
6689 const char *state = qla83xx_dev_state_to_string(dev_state);
6690
6691 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6692
6693 /* SV: XXX: Is timeout required here? */
6694 /* Wait for IDC state change READY -> NEED_RESET */
6695 while (dev_state == QLA8XXX_DEV_READY) {
6696 qla83xx_idc_unlock(vha, 0);
6697 msleep(200);
6698 qla83xx_idc_lock(vha, 0);
6699 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6700 }
6701 }
6702
6703 /* Send IDC ack by writing to drv-ack register */
6704 __qla83xx_set_drv_ack(vha);
6705
6706 return QLA_SUCCESS;
6707 }
6708
6709 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6710 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6711 {
6712 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6713 }
6714
6715 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6716 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6717 {
6718 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6719 }
6720
6721 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6722 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6723 {
6724 uint32_t drv_presence = 0;
6725 struct qla_hw_data *ha = vha->hw;
6726
6727 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6728 if (drv_presence & (1 << ha->portnum))
6729 return QLA_SUCCESS;
6730 else
6731 return QLA_TEST_FAILED;
6732 }
6733
6734 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6735 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6736 {
6737 int rval = QLA_SUCCESS;
6738 struct qla_hw_data *ha = vha->hw;
6739
6740 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6741 "Entered %s().\n", __func__);
6742
6743 if (vha->device_flags & DFLG_DEV_FAILED) {
6744 ql_log(ql_log_warn, vha, 0xb059,
6745 "Device in unrecoverable FAILED state.\n");
6746 return QLA_FUNCTION_FAILED;
6747 }
6748
6749 qla83xx_idc_lock(vha, 0);
6750
6751 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6752 ql_log(ql_log_warn, vha, 0xb05a,
6753 "Function=0x%x has been removed from IDC participation.\n",
6754 ha->portnum);
6755 rval = QLA_FUNCTION_FAILED;
6756 goto exit;
6757 }
6758
6759 qla83xx_reset_ownership(vha);
6760
6761 rval = qla83xx_initiating_reset(vha);
6762
6763 /*
6764 * Perform reset if we are the reset-owner,
6765 * else wait till IDC state changes to READY/FAILED.
6766 */
6767 if (rval == QLA_SUCCESS) {
6768 rval = qla83xx_idc_state_handler(vha);
6769
6770 if (rval == QLA_SUCCESS)
6771 ha->flags.nic_core_hung = 0;
6772 __qla83xx_clear_drv_ack(vha);
6773 }
6774
6775 exit:
6776 qla83xx_idc_unlock(vha, 0);
6777
6778 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6779
6780 return rval;
6781 }
6782
6783 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)6784 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6785 {
6786 struct qla_hw_data *ha = vha->hw;
6787 int rval = QLA_FUNCTION_FAILED;
6788
6789 if (!IS_MCTP_CAPABLE(ha)) {
6790 /* This message can be removed from the final version */
6791 ql_log(ql_log_info, vha, 0x506d,
6792 "This board is not MCTP capable\n");
6793 return rval;
6794 }
6795
6796 if (!ha->mctp_dump) {
6797 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6798 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6799
6800 if (!ha->mctp_dump) {
6801 ql_log(ql_log_warn, vha, 0x506e,
6802 "Failed to allocate memory for mctp dump\n");
6803 return rval;
6804 }
6805 }
6806
6807 #define MCTP_DUMP_STR_ADDR 0x00000000
6808 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6809 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6810 if (rval != QLA_SUCCESS) {
6811 ql_log(ql_log_warn, vha, 0x506f,
6812 "Failed to capture mctp dump\n");
6813 } else {
6814 ql_log(ql_log_info, vha, 0x5070,
6815 "Mctp dump capture for host (%ld/%p).\n",
6816 vha->host_no, ha->mctp_dump);
6817 ha->mctp_dumped = 1;
6818 }
6819
6820 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6821 ha->flags.nic_core_reset_hdlr_active = 1;
6822 rval = qla83xx_restart_nic_firmware(vha);
6823 if (rval)
6824 /* NIC Core reset failed. */
6825 ql_log(ql_log_warn, vha, 0x5071,
6826 "Failed to restart nic firmware\n");
6827 else
6828 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6829 "Restarted NIC firmware successfully.\n");
6830 ha->flags.nic_core_reset_hdlr_active = 0;
6831 }
6832
6833 return rval;
6834
6835 }
6836
6837 /*
6838 * qla2x00_quiesce_io
6839 * Description: This function will block the new I/Os
6840 * Its not aborting any I/Os as context
6841 * is not destroyed during quiescence
6842 * Arguments: scsi_qla_host_t
6843 * return : void
6844 */
6845 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)6846 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6847 {
6848 struct qla_hw_data *ha = vha->hw;
6849 struct scsi_qla_host *vp;
6850
6851 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6852 "Quiescing I/O - ha=%p.\n", ha);
6853
6854 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6855 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6856 atomic_set(&vha->loop_state, LOOP_DOWN);
6857 qla2x00_mark_all_devices_lost(vha);
6858 list_for_each_entry(vp, &ha->vp_list, list)
6859 qla2x00_mark_all_devices_lost(vp);
6860 } else {
6861 if (!atomic_read(&vha->loop_down_timer))
6862 atomic_set(&vha->loop_down_timer,
6863 LOOP_DOWN_TIME);
6864 }
6865 /* Wait for pending cmds to complete */
6866 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6867 != QLA_SUCCESS);
6868 }
6869
6870 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)6871 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6872 {
6873 struct qla_hw_data *ha = vha->hw;
6874 struct scsi_qla_host *vp;
6875 unsigned long flags;
6876 fc_port_t *fcport;
6877 u16 i;
6878
6879 /* For ISP82XX, driver waits for completion of the commands.
6880 * online flag should be set.
6881 */
6882 if (!(IS_P3P_TYPE(ha)))
6883 vha->flags.online = 0;
6884 ha->flags.chip_reset_done = 0;
6885 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6886 vha->qla_stats.total_isp_aborts++;
6887
6888 ql_log(ql_log_info, vha, 0x00af,
6889 "Performing ISP error recovery - ha=%p.\n", ha);
6890
6891 ha->flags.purge_mbox = 1;
6892 /* For ISP82XX, reset_chip is just disabling interrupts.
6893 * Driver waits for the completion of the commands.
6894 * the interrupts need to be enabled.
6895 */
6896 if (!(IS_P3P_TYPE(ha)))
6897 ha->isp_ops->reset_chip(vha);
6898
6899 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6900 SAVE_TOPO(ha);
6901 ha->flags.rida_fmt2 = 0;
6902 ha->flags.n2n_ae = 0;
6903 ha->flags.lip_ae = 0;
6904 ha->current_topology = 0;
6905 QLA_FW_STOPPED(ha);
6906 ha->flags.fw_init_done = 0;
6907 ha->chip_reset++;
6908 ha->base_qpair->chip_reset = ha->chip_reset;
6909 for (i = 0; i < ha->max_qpairs; i++) {
6910 if (ha->queue_pair_map[i])
6911 ha->queue_pair_map[i]->chip_reset =
6912 ha->base_qpair->chip_reset;
6913 }
6914
6915 /* purge MBox commands */
6916 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6917 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6918 complete(&ha->mbx_intr_comp);
6919 }
6920
6921 i = 0;
6922 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6923 atomic_read(&ha->num_pend_mbx_stage2) ||
6924 atomic_read(&ha->num_pend_mbx_stage1)) {
6925 msleep(20);
6926 i++;
6927 if (i > 50)
6928 break;
6929 }
6930 ha->flags.purge_mbox = 0;
6931
6932 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6933 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6934 atomic_set(&vha->loop_state, LOOP_DOWN);
6935 qla2x00_mark_all_devices_lost(vha);
6936
6937 spin_lock_irqsave(&ha->vport_slock, flags);
6938 list_for_each_entry(vp, &ha->vp_list, list) {
6939 atomic_inc(&vp->vref_count);
6940 spin_unlock_irqrestore(&ha->vport_slock, flags);
6941
6942 qla2x00_mark_all_devices_lost(vp);
6943
6944 spin_lock_irqsave(&ha->vport_slock, flags);
6945 atomic_dec(&vp->vref_count);
6946 }
6947 spin_unlock_irqrestore(&ha->vport_slock, flags);
6948 } else {
6949 if (!atomic_read(&vha->loop_down_timer))
6950 atomic_set(&vha->loop_down_timer,
6951 LOOP_DOWN_TIME);
6952 }
6953
6954 /* Clear all async request states across all VPs. */
6955 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6956 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6957 fcport->scan_state = 0;
6958 }
6959 spin_lock_irqsave(&ha->vport_slock, flags);
6960 list_for_each_entry(vp, &ha->vp_list, list) {
6961 atomic_inc(&vp->vref_count);
6962 spin_unlock_irqrestore(&ha->vport_slock, flags);
6963
6964 list_for_each_entry(fcport, &vp->vp_fcports, list)
6965 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6966
6967 spin_lock_irqsave(&ha->vport_slock, flags);
6968 atomic_dec(&vp->vref_count);
6969 }
6970 spin_unlock_irqrestore(&ha->vport_slock, flags);
6971
6972 if (!ha->flags.eeh_busy) {
6973 /* Make sure for ISP 82XX IO DMA is complete */
6974 if (IS_P3P_TYPE(ha)) {
6975 qla82xx_chip_reset_cleanup(vha);
6976 ql_log(ql_log_info, vha, 0x00b4,
6977 "Done chip reset cleanup.\n");
6978
6979 /* Done waiting for pending commands.
6980 * Reset the online flag.
6981 */
6982 vha->flags.online = 0;
6983 }
6984
6985 /* Requeue all commands in outstanding command list. */
6986 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6987 }
6988 /* memory barrier */
6989 wmb();
6990 }
6991
6992 /*
6993 * qla2x00_abort_isp
6994 * Resets ISP and aborts all outstanding commands.
6995 *
6996 * Input:
6997 * ha = adapter block pointer.
6998 *
6999 * Returns:
7000 * 0 = success
7001 */
7002 int
qla2x00_abort_isp(scsi_qla_host_t * vha)7003 qla2x00_abort_isp(scsi_qla_host_t *vha)
7004 {
7005 int rval;
7006 uint8_t status = 0;
7007 struct qla_hw_data *ha = vha->hw;
7008 struct scsi_qla_host *vp;
7009 struct req_que *req = ha->req_q_map[0];
7010 unsigned long flags;
7011
7012 if (vha->flags.online) {
7013 qla2x00_abort_isp_cleanup(vha);
7014
7015 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
7016 ha->flags.chip_reset_done = 1;
7017 vha->flags.online = 1;
7018 status = 0;
7019 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7020 return status;
7021 }
7022
7023 if (IS_QLA8031(ha)) {
7024 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7025 "Clearing fcoe driver presence.\n");
7026 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7027 ql_dbg(ql_dbg_p3p, vha, 0xb073,
7028 "Error while clearing DRV-Presence.\n");
7029 }
7030
7031 if (unlikely(pci_channel_offline(ha->pdev) &&
7032 ha->flags.pci_channel_io_perm_failure)) {
7033 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7034 status = 0;
7035 return status;
7036 }
7037
7038 switch (vha->qlini_mode) {
7039 case QLA2XXX_INI_MODE_DISABLED:
7040 if (!qla_tgt_mode_enabled(vha))
7041 return 0;
7042 break;
7043 case QLA2XXX_INI_MODE_DUAL:
7044 if (!qla_dual_mode_enabled(vha) &&
7045 !qla_ini_mode_enabled(vha))
7046 return 0;
7047 break;
7048 case QLA2XXX_INI_MODE_ENABLED:
7049 default:
7050 break;
7051 }
7052
7053 ha->isp_ops->get_flash_version(vha, req->ring);
7054
7055 ha->isp_ops->nvram_config(vha);
7056
7057 if (!qla2x00_restart_isp(vha)) {
7058 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7059
7060 if (!atomic_read(&vha->loop_down_timer)) {
7061 /*
7062 * Issue marker command only when we are going
7063 * to start the I/O .
7064 */
7065 vha->marker_needed = 1;
7066 }
7067
7068 vha->flags.online = 1;
7069
7070 ha->isp_ops->enable_intrs(ha);
7071
7072 ha->isp_abort_cnt = 0;
7073 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7074
7075 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7076 qla2x00_get_fw_version(vha);
7077 if (ha->fce) {
7078 ha->flags.fce_enabled = 1;
7079 memset(ha->fce, 0,
7080 fce_calc_size(ha->fce_bufs));
7081 rval = qla2x00_enable_fce_trace(vha,
7082 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7083 &ha->fce_bufs);
7084 if (rval) {
7085 ql_log(ql_log_warn, vha, 0x8033,
7086 "Unable to reinitialize FCE "
7087 "(%d).\n", rval);
7088 ha->flags.fce_enabled = 0;
7089 }
7090 }
7091
7092 if (ha->eft) {
7093 memset(ha->eft, 0, EFT_SIZE);
7094 rval = qla2x00_enable_eft_trace(vha,
7095 ha->eft_dma, EFT_NUM_BUFFERS);
7096 if (rval) {
7097 ql_log(ql_log_warn, vha, 0x8034,
7098 "Unable to reinitialize EFT "
7099 "(%d).\n", rval);
7100 }
7101 }
7102 } else { /* failed the ISP abort */
7103 vha->flags.online = 1;
7104 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7105 if (ha->isp_abort_cnt == 0) {
7106 ql_log(ql_log_fatal, vha, 0x8035,
7107 "ISP error recover failed - "
7108 "board disabled.\n");
7109 /*
7110 * The next call disables the board
7111 * completely.
7112 */
7113 qla2x00_abort_isp_cleanup(vha);
7114 vha->flags.online = 0;
7115 clear_bit(ISP_ABORT_RETRY,
7116 &vha->dpc_flags);
7117 status = 0;
7118 } else { /* schedule another ISP abort */
7119 ha->isp_abort_cnt--;
7120 ql_dbg(ql_dbg_taskm, vha, 0x8020,
7121 "ISP abort - retry remaining %d.\n",
7122 ha->isp_abort_cnt);
7123 status = 1;
7124 }
7125 } else {
7126 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7127 ql_dbg(ql_dbg_taskm, vha, 0x8021,
7128 "ISP error recovery - retrying (%d) "
7129 "more times.\n", ha->isp_abort_cnt);
7130 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7131 status = 1;
7132 }
7133 }
7134
7135 }
7136
7137 if (!status) {
7138 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7139 qla2x00_configure_hba(vha);
7140 spin_lock_irqsave(&ha->vport_slock, flags);
7141 list_for_each_entry(vp, &ha->vp_list, list) {
7142 if (vp->vp_idx) {
7143 atomic_inc(&vp->vref_count);
7144 spin_unlock_irqrestore(&ha->vport_slock, flags);
7145
7146 qla2x00_vp_abort_isp(vp);
7147
7148 spin_lock_irqsave(&ha->vport_slock, flags);
7149 atomic_dec(&vp->vref_count);
7150 }
7151 }
7152 spin_unlock_irqrestore(&ha->vport_slock, flags);
7153
7154 if (IS_QLA8031(ha)) {
7155 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7156 "Setting back fcoe driver presence.\n");
7157 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7158 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7159 "Error while setting DRV-Presence.\n");
7160 }
7161 } else {
7162 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7163 __func__);
7164 }
7165
7166 return(status);
7167 }
7168
7169 /*
7170 * qla2x00_restart_isp
7171 * restarts the ISP after a reset
7172 *
7173 * Input:
7174 * ha = adapter block pointer.
7175 *
7176 * Returns:
7177 * 0 = success
7178 */
7179 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7180 qla2x00_restart_isp(scsi_qla_host_t *vha)
7181 {
7182 int status;
7183 struct qla_hw_data *ha = vha->hw;
7184
7185 /* If firmware needs to be loaded */
7186 if (qla2x00_isp_firmware(vha)) {
7187 vha->flags.online = 0;
7188 status = ha->isp_ops->chip_diag(vha);
7189 if (status)
7190 return status;
7191 status = qla2x00_setup_chip(vha);
7192 if (status)
7193 return status;
7194 }
7195
7196 status = qla2x00_init_rings(vha);
7197 if (status)
7198 return status;
7199
7200 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7201 ha->flags.chip_reset_done = 1;
7202
7203 /* Initialize the queues in use */
7204 qla25xx_init_queues(ha);
7205
7206 status = qla2x00_fw_ready(vha);
7207 if (status) {
7208 /* if no cable then assume it's good */
7209 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7210 }
7211
7212 /* Issue a marker after FW becomes ready. */
7213 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7214 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7215
7216 return 0;
7217 }
7218
7219 static int
qla25xx_init_queues(struct qla_hw_data * ha)7220 qla25xx_init_queues(struct qla_hw_data *ha)
7221 {
7222 struct rsp_que *rsp = NULL;
7223 struct req_que *req = NULL;
7224 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7225 int ret = -1;
7226 int i;
7227
7228 for (i = 1; i < ha->max_rsp_queues; i++) {
7229 rsp = ha->rsp_q_map[i];
7230 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7231 rsp->options &= ~BIT_0;
7232 ret = qla25xx_init_rsp_que(base_vha, rsp);
7233 if (ret != QLA_SUCCESS)
7234 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7235 "%s Rsp que: %d init failed.\n",
7236 __func__, rsp->id);
7237 else
7238 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7239 "%s Rsp que: %d inited.\n",
7240 __func__, rsp->id);
7241 }
7242 }
7243 for (i = 1; i < ha->max_req_queues; i++) {
7244 req = ha->req_q_map[i];
7245 if (req && test_bit(i, ha->req_qid_map)) {
7246 /* Clear outstanding commands array. */
7247 req->options &= ~BIT_0;
7248 ret = qla25xx_init_req_que(base_vha, req);
7249 if (ret != QLA_SUCCESS)
7250 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7251 "%s Req que: %d init failed.\n",
7252 __func__, req->id);
7253 else
7254 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7255 "%s Req que: %d inited.\n",
7256 __func__, req->id);
7257 }
7258 }
7259 return ret;
7260 }
7261
7262 /*
7263 * qla2x00_reset_adapter
7264 * Reset adapter.
7265 *
7266 * Input:
7267 * ha = adapter block pointer.
7268 */
7269 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7270 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7271 {
7272 unsigned long flags = 0;
7273 struct qla_hw_data *ha = vha->hw;
7274 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7275
7276 vha->flags.online = 0;
7277 ha->isp_ops->disable_intrs(ha);
7278
7279 spin_lock_irqsave(&ha->hardware_lock, flags);
7280 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7281 rd_reg_word(®->hccr); /* PCI Posting. */
7282 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7283 rd_reg_word(®->hccr); /* PCI Posting. */
7284 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7285
7286 return QLA_SUCCESS;
7287 }
7288
7289 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7290 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7291 {
7292 unsigned long flags = 0;
7293 struct qla_hw_data *ha = vha->hw;
7294 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7295
7296 if (IS_P3P_TYPE(ha))
7297 return QLA_SUCCESS;
7298
7299 vha->flags.online = 0;
7300 ha->isp_ops->disable_intrs(ha);
7301
7302 spin_lock_irqsave(&ha->hardware_lock, flags);
7303 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7304 rd_reg_dword(®->hccr);
7305 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7306 rd_reg_dword(®->hccr);
7307 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7308
7309 if (IS_NOPOLLING_TYPE(ha))
7310 ha->isp_ops->enable_intrs(ha);
7311
7312 return QLA_SUCCESS;
7313 }
7314
7315 /* On sparc systems, obtain port and node WWN from firmware
7316 * properties.
7317 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7318 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7319 struct nvram_24xx *nv)
7320 {
7321 #ifdef CONFIG_SPARC
7322 struct qla_hw_data *ha = vha->hw;
7323 struct pci_dev *pdev = ha->pdev;
7324 struct device_node *dp = pci_device_to_OF_node(pdev);
7325 const u8 *val;
7326 int len;
7327
7328 val = of_get_property(dp, "port-wwn", &len);
7329 if (val && len >= WWN_SIZE)
7330 memcpy(nv->port_name, val, WWN_SIZE);
7331
7332 val = of_get_property(dp, "node-wwn", &len);
7333 if (val && len >= WWN_SIZE)
7334 memcpy(nv->node_name, val, WWN_SIZE);
7335 #endif
7336 }
7337
7338 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7339 qla24xx_nvram_config(scsi_qla_host_t *vha)
7340 {
7341 int rval;
7342 struct init_cb_24xx *icb;
7343 struct nvram_24xx *nv;
7344 __le32 *dptr;
7345 uint8_t *dptr1, *dptr2;
7346 uint32_t chksum;
7347 uint16_t cnt;
7348 struct qla_hw_data *ha = vha->hw;
7349
7350 rval = QLA_SUCCESS;
7351 icb = (struct init_cb_24xx *)ha->init_cb;
7352 nv = ha->nvram;
7353
7354 /* Determine NVRAM starting address. */
7355 if (ha->port_no == 0) {
7356 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7357 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7358 } else {
7359 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7360 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7361 }
7362
7363 ha->nvram_size = sizeof(*nv);
7364 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7365
7366 /* Get VPD data into cache */
7367 ha->vpd = ha->nvram + VPD_OFFSET;
7368 ha->isp_ops->read_nvram(vha, ha->vpd,
7369 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7370
7371 /* Get NVRAM data into cache and calculate checksum. */
7372 dptr = (__force __le32 *)nv;
7373 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7374 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7375 chksum += le32_to_cpu(*dptr);
7376
7377 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7378 "Contents of NVRAM\n");
7379 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7380 nv, ha->nvram_size);
7381
7382 /* Bad NVRAM data, set defaults parameters. */
7383 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7384 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7385 /* Reset NVRAM data. */
7386 ql_log(ql_log_warn, vha, 0x006b,
7387 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7388 chksum, nv->id, nv->nvram_version);
7389 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7390 ql_log(ql_log_warn, vha, 0x006c,
7391 "Falling back to functioning (yet invalid -- WWPN) "
7392 "defaults.\n");
7393
7394 /*
7395 * Set default initialization control block.
7396 */
7397 memset(nv, 0, ha->nvram_size);
7398 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7399 nv->version = cpu_to_le16(ICB_VERSION);
7400 nv->frame_payload_size = cpu_to_le16(2048);
7401 nv->execution_throttle = cpu_to_le16(0xFFFF);
7402 nv->exchange_count = cpu_to_le16(0);
7403 nv->hard_address = cpu_to_le16(124);
7404 nv->port_name[0] = 0x21;
7405 nv->port_name[1] = 0x00 + ha->port_no + 1;
7406 nv->port_name[2] = 0x00;
7407 nv->port_name[3] = 0xe0;
7408 nv->port_name[4] = 0x8b;
7409 nv->port_name[5] = 0x1c;
7410 nv->port_name[6] = 0x55;
7411 nv->port_name[7] = 0x86;
7412 nv->node_name[0] = 0x20;
7413 nv->node_name[1] = 0x00;
7414 nv->node_name[2] = 0x00;
7415 nv->node_name[3] = 0xe0;
7416 nv->node_name[4] = 0x8b;
7417 nv->node_name[5] = 0x1c;
7418 nv->node_name[6] = 0x55;
7419 nv->node_name[7] = 0x86;
7420 qla24xx_nvram_wwn_from_ofw(vha, nv);
7421 nv->login_retry_count = cpu_to_le16(8);
7422 nv->interrupt_delay_timer = cpu_to_le16(0);
7423 nv->login_timeout = cpu_to_le16(0);
7424 nv->firmware_options_1 =
7425 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7426 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7427 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7428 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7429 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7430 nv->efi_parameters = cpu_to_le32(0);
7431 nv->reset_delay = 5;
7432 nv->max_luns_per_target = cpu_to_le16(128);
7433 nv->port_down_retry_count = cpu_to_le16(30);
7434 nv->link_down_timeout = cpu_to_le16(30);
7435
7436 rval = 1;
7437 }
7438
7439 if (qla_tgt_mode_enabled(vha)) {
7440 /* Don't enable full login after initial LIP */
7441 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7442 /* Don't enable LIP full login for initiator */
7443 nv->host_p &= cpu_to_le32(~BIT_10);
7444 }
7445
7446 qlt_24xx_config_nvram_stage1(vha, nv);
7447
7448 /* Reset Initialization control block */
7449 memset(icb, 0, ha->init_cb_size);
7450
7451 /* Copy 1st segment. */
7452 dptr1 = (uint8_t *)icb;
7453 dptr2 = (uint8_t *)&nv->version;
7454 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7455 while (cnt--)
7456 *dptr1++ = *dptr2++;
7457
7458 icb->login_retry_count = nv->login_retry_count;
7459 icb->link_down_on_nos = nv->link_down_on_nos;
7460
7461 /* Copy 2nd segment. */
7462 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7463 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7464 cnt = (uint8_t *)&icb->reserved_3 -
7465 (uint8_t *)&icb->interrupt_delay_timer;
7466 while (cnt--)
7467 *dptr1++ = *dptr2++;
7468 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7469 /*
7470 * Setup driver NVRAM options.
7471 */
7472 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7473 "QLA2462");
7474
7475 qlt_24xx_config_nvram_stage2(vha, icb);
7476
7477 if (nv->host_p & cpu_to_le32(BIT_15)) {
7478 /* Use alternate WWN? */
7479 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7480 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7481 }
7482
7483 /* Prepare nodename */
7484 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7485 /*
7486 * Firmware will apply the following mask if the nodename was
7487 * not provided.
7488 */
7489 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7490 icb->node_name[0] &= 0xF0;
7491 }
7492
7493 /* Set host adapter parameters. */
7494 ha->flags.disable_risc_code_load = 0;
7495 ha->flags.enable_lip_reset = 0;
7496 ha->flags.enable_lip_full_login =
7497 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7498 ha->flags.enable_target_reset =
7499 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7500 ha->flags.enable_led_scheme = 0;
7501 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7502
7503 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7504 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7505
7506 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7507 sizeof(ha->fw_seriallink_options24));
7508
7509 /* save HBA serial number */
7510 ha->serial0 = icb->port_name[5];
7511 ha->serial1 = icb->port_name[6];
7512 ha->serial2 = icb->port_name[7];
7513 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7514 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7515
7516 icb->execution_throttle = cpu_to_le16(0xFFFF);
7517
7518 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7519
7520 /* Set minimum login_timeout to 4 seconds. */
7521 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7522 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7523 if (le16_to_cpu(nv->login_timeout) < 4)
7524 nv->login_timeout = cpu_to_le16(4);
7525 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7526
7527 /* Set minimum RATOV to 100 tenths of a second. */
7528 ha->r_a_tov = 100;
7529
7530 ha->loop_reset_delay = nv->reset_delay;
7531
7532 /* Link Down Timeout = 0:
7533 *
7534 * When Port Down timer expires we will start returning
7535 * I/O's to OS with "DID_NO_CONNECT".
7536 *
7537 * Link Down Timeout != 0:
7538 *
7539 * The driver waits for the link to come up after link down
7540 * before returning I/Os to OS with "DID_NO_CONNECT".
7541 */
7542 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7543 ha->loop_down_abort_time =
7544 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7545 } else {
7546 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7547 ha->loop_down_abort_time =
7548 (LOOP_DOWN_TIME - ha->link_down_timeout);
7549 }
7550
7551 /* Need enough time to try and get the port back. */
7552 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7553 if (qlport_down_retry)
7554 ha->port_down_retry_count = qlport_down_retry;
7555
7556 /* Set login_retry_count */
7557 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7558 if (ha->port_down_retry_count ==
7559 le16_to_cpu(nv->port_down_retry_count) &&
7560 ha->port_down_retry_count > 3)
7561 ha->login_retry_count = ha->port_down_retry_count;
7562 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7563 ha->login_retry_count = ha->port_down_retry_count;
7564 if (ql2xloginretrycount)
7565 ha->login_retry_count = ql2xloginretrycount;
7566
7567 /* N2N: driver will initiate Login instead of FW */
7568 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
7569
7570 /* Enable ZIO. */
7571 if (!vha->flags.init_done) {
7572 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7573 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7574 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7575 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7576 }
7577 icb->firmware_options_2 &= cpu_to_le32(
7578 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7579 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7580 ha->zio_mode = QLA_ZIO_MODE_6;
7581
7582 ql_log(ql_log_info, vha, 0x006f,
7583 "ZIO mode %d enabled; timer delay (%d us).\n",
7584 ha->zio_mode, ha->zio_timer * 100);
7585
7586 icb->firmware_options_2 |= cpu_to_le32(
7587 (uint32_t)ha->zio_mode);
7588 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7589 }
7590
7591 if (rval) {
7592 ql_log(ql_log_warn, vha, 0x0070,
7593 "NVRAM configuration failed.\n");
7594 }
7595 return (rval);
7596 }
7597
7598 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)7599 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7600 struct qla27xx_image_status *image_status)
7601 {
7602 ql_dbg(ql_dbg_init, vha, 0x018b,
7603 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7604 name, "status",
7605 image_status->image_status_mask,
7606 le16_to_cpu(image_status->generation),
7607 image_status->ver_major,
7608 image_status->ver_minor,
7609 image_status->bitmap,
7610 le32_to_cpu(image_status->checksum),
7611 le32_to_cpu(image_status->signature));
7612 }
7613
7614 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)7615 qla28xx_check_aux_image_status_signature(
7616 struct qla27xx_image_status *image_status)
7617 {
7618 ulong signature = le32_to_cpu(image_status->signature);
7619
7620 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7621 }
7622
7623 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)7624 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7625 {
7626 ulong signature = le32_to_cpu(image_status->signature);
7627
7628 return
7629 signature != QLA27XX_IMG_STATUS_SIGN &&
7630 signature != QLA28XX_IMG_STATUS_SIGN;
7631 }
7632
7633 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)7634 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7635 {
7636 __le32 *p = (__force __le32 *)image_status;
7637 uint n = sizeof(*image_status) / sizeof(*p);
7638 uint32_t sum = 0;
7639
7640 for ( ; n--; p++)
7641 sum += le32_to_cpup(p);
7642
7643 return sum;
7644 }
7645
7646 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)7647 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7648 {
7649 return aux->bitmap & bitmask ?
7650 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7651 }
7652
7653 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)7654 qla28xx_component_status(
7655 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7656 {
7657 active_regions->aux.board_config =
7658 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7659
7660 active_regions->aux.vpd_nvram =
7661 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7662
7663 active_regions->aux.npiv_config_0_1 =
7664 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7665
7666 active_regions->aux.npiv_config_2_3 =
7667 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7668 }
7669
7670 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)7671 qla27xx_compare_image_generation(
7672 struct qla27xx_image_status *pri_image_status,
7673 struct qla27xx_image_status *sec_image_status)
7674 {
7675 /* calculate generation delta as uint16 (this accounts for wrap) */
7676 int16_t delta =
7677 le16_to_cpu(pri_image_status->generation) -
7678 le16_to_cpu(sec_image_status->generation);
7679
7680 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7681
7682 return delta;
7683 }
7684
7685 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)7686 qla28xx_get_aux_images(
7687 struct scsi_qla_host *vha, struct active_regions *active_regions)
7688 {
7689 struct qla_hw_data *ha = vha->hw;
7690 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7691 bool valid_pri_image = false, valid_sec_image = false;
7692 bool active_pri_image = false, active_sec_image = false;
7693
7694 if (!ha->flt_region_aux_img_status_pri) {
7695 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7696 goto check_sec_image;
7697 }
7698
7699 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
7700 ha->flt_region_aux_img_status_pri,
7701 sizeof(pri_aux_image_status) >> 2);
7702 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7703
7704 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7705 ql_dbg(ql_dbg_init, vha, 0x018b,
7706 "Primary aux image signature (%#x) not valid\n",
7707 le32_to_cpu(pri_aux_image_status.signature));
7708 goto check_sec_image;
7709 }
7710
7711 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7712 ql_dbg(ql_dbg_init, vha, 0x018c,
7713 "Primary aux image checksum failed\n");
7714 goto check_sec_image;
7715 }
7716
7717 valid_pri_image = true;
7718
7719 if (pri_aux_image_status.image_status_mask & 1) {
7720 ql_dbg(ql_dbg_init, vha, 0x018d,
7721 "Primary aux image is active\n");
7722 active_pri_image = true;
7723 }
7724
7725 check_sec_image:
7726 if (!ha->flt_region_aux_img_status_sec) {
7727 ql_dbg(ql_dbg_init, vha, 0x018a,
7728 "Secondary aux image not addressed\n");
7729 goto check_valid_image;
7730 }
7731
7732 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
7733 ha->flt_region_aux_img_status_sec,
7734 sizeof(sec_aux_image_status) >> 2);
7735 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7736
7737 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7738 ql_dbg(ql_dbg_init, vha, 0x018b,
7739 "Secondary aux image signature (%#x) not valid\n",
7740 le32_to_cpu(sec_aux_image_status.signature));
7741 goto check_valid_image;
7742 }
7743
7744 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7745 ql_dbg(ql_dbg_init, vha, 0x018c,
7746 "Secondary aux image checksum failed\n");
7747 goto check_valid_image;
7748 }
7749
7750 valid_sec_image = true;
7751
7752 if (sec_aux_image_status.image_status_mask & 1) {
7753 ql_dbg(ql_dbg_init, vha, 0x018d,
7754 "Secondary aux image is active\n");
7755 active_sec_image = true;
7756 }
7757
7758 check_valid_image:
7759 if (valid_pri_image && active_pri_image &&
7760 valid_sec_image && active_sec_image) {
7761 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7762 &sec_aux_image_status) >= 0) {
7763 qla28xx_component_status(active_regions,
7764 &pri_aux_image_status);
7765 } else {
7766 qla28xx_component_status(active_regions,
7767 &sec_aux_image_status);
7768 }
7769 } else if (valid_pri_image && active_pri_image) {
7770 qla28xx_component_status(active_regions, &pri_aux_image_status);
7771 } else if (valid_sec_image && active_sec_image) {
7772 qla28xx_component_status(active_regions, &sec_aux_image_status);
7773 }
7774
7775 ql_dbg(ql_dbg_init, vha, 0x018f,
7776 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7777 active_regions->aux.board_config,
7778 active_regions->aux.vpd_nvram,
7779 active_regions->aux.npiv_config_0_1,
7780 active_regions->aux.npiv_config_2_3);
7781 }
7782
7783 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)7784 qla27xx_get_active_image(struct scsi_qla_host *vha,
7785 struct active_regions *active_regions)
7786 {
7787 struct qla_hw_data *ha = vha->hw;
7788 struct qla27xx_image_status pri_image_status, sec_image_status;
7789 bool valid_pri_image = false, valid_sec_image = false;
7790 bool active_pri_image = false, active_sec_image = false;
7791
7792 if (!ha->flt_region_img_status_pri) {
7793 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7794 goto check_sec_image;
7795 }
7796
7797 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
7798 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7799 QLA_SUCCESS) {
7800 WARN_ON_ONCE(true);
7801 goto check_sec_image;
7802 }
7803 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7804
7805 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7806 ql_dbg(ql_dbg_init, vha, 0x018b,
7807 "Primary image signature (%#x) not valid\n",
7808 le32_to_cpu(pri_image_status.signature));
7809 goto check_sec_image;
7810 }
7811
7812 if (qla27xx_image_status_checksum(&pri_image_status)) {
7813 ql_dbg(ql_dbg_init, vha, 0x018c,
7814 "Primary image checksum failed\n");
7815 goto check_sec_image;
7816 }
7817
7818 valid_pri_image = true;
7819
7820 if (pri_image_status.image_status_mask & 1) {
7821 ql_dbg(ql_dbg_init, vha, 0x018d,
7822 "Primary image is active\n");
7823 active_pri_image = true;
7824 }
7825
7826 check_sec_image:
7827 if (!ha->flt_region_img_status_sec) {
7828 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7829 goto check_valid_image;
7830 }
7831
7832 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7833 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7834 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7835
7836 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7837 ql_dbg(ql_dbg_init, vha, 0x018b,
7838 "Secondary image signature (%#x) not valid\n",
7839 le32_to_cpu(sec_image_status.signature));
7840 goto check_valid_image;
7841 }
7842
7843 if (qla27xx_image_status_checksum(&sec_image_status)) {
7844 ql_dbg(ql_dbg_init, vha, 0x018c,
7845 "Secondary image checksum failed\n");
7846 goto check_valid_image;
7847 }
7848
7849 valid_sec_image = true;
7850
7851 if (sec_image_status.image_status_mask & 1) {
7852 ql_dbg(ql_dbg_init, vha, 0x018d,
7853 "Secondary image is active\n");
7854 active_sec_image = true;
7855 }
7856
7857 check_valid_image:
7858 if (valid_pri_image && active_pri_image)
7859 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7860
7861 if (valid_sec_image && active_sec_image) {
7862 if (!active_regions->global ||
7863 qla27xx_compare_image_generation(
7864 &pri_image_status, &sec_image_status) < 0) {
7865 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7866 }
7867 }
7868
7869 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7870 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7871 "default (boot/fw)" :
7872 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7873 "primary" :
7874 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7875 "secondary" : "invalid",
7876 active_regions->global);
7877 }
7878
qla24xx_risc_firmware_invalid(uint32_t * dword)7879 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7880 {
7881 return
7882 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7883 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7884 }
7885
7886 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)7887 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7888 uint32_t faddr)
7889 {
7890 int rval;
7891 uint templates, segments, fragment;
7892 ulong i;
7893 uint j;
7894 ulong dlen;
7895 uint32_t *dcode;
7896 uint32_t risc_addr, risc_size, risc_attr = 0;
7897 struct qla_hw_data *ha = vha->hw;
7898 struct req_que *req = ha->req_q_map[0];
7899 struct fwdt *fwdt = ha->fwdt;
7900
7901 ql_dbg(ql_dbg_init, vha, 0x008b,
7902 "FW: Loading firmware from flash (%x).\n", faddr);
7903
7904 dcode = (uint32_t *)req->ring;
7905 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7906 if (qla24xx_risc_firmware_invalid(dcode)) {
7907 ql_log(ql_log_fatal, vha, 0x008c,
7908 "Unable to verify the integrity of flash firmware "
7909 "image.\n");
7910 ql_log(ql_log_fatal, vha, 0x008d,
7911 "Firmware data: %08x %08x %08x %08x.\n",
7912 dcode[0], dcode[1], dcode[2], dcode[3]);
7913
7914 return QLA_FUNCTION_FAILED;
7915 }
7916
7917 dcode = (uint32_t *)req->ring;
7918 *srisc_addr = 0;
7919 segments = FA_RISC_CODE_SEGMENTS;
7920 for (j = 0; j < segments; j++) {
7921 ql_dbg(ql_dbg_init, vha, 0x008d,
7922 "-> Loading segment %u...\n", j);
7923 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7924 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
7925 risc_size = be32_to_cpu((__force __be32)dcode[3]);
7926 if (!*srisc_addr) {
7927 *srisc_addr = risc_addr;
7928 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
7929 }
7930
7931 dlen = ha->fw_transfer_size >> 2;
7932 for (fragment = 0; risc_size; fragment++) {
7933 if (dlen > risc_size)
7934 dlen = risc_size;
7935
7936 ql_dbg(ql_dbg_init, vha, 0x008e,
7937 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7938 fragment, risc_addr, faddr, dlen);
7939 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7940 for (i = 0; i < dlen; i++)
7941 dcode[i] = swab32(dcode[i]);
7942
7943 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7944 if (rval) {
7945 ql_log(ql_log_fatal, vha, 0x008f,
7946 "-> Failed load firmware fragment %u.\n",
7947 fragment);
7948 return QLA_FUNCTION_FAILED;
7949 }
7950
7951 faddr += dlen;
7952 risc_addr += dlen;
7953 risc_size -= dlen;
7954 }
7955 }
7956
7957 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7958 return QLA_SUCCESS;
7959
7960 templates = (risc_attr & BIT_9) ? 2 : 1;
7961 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7962 for (j = 0; j < templates; j++, fwdt++) {
7963 if (fwdt->template)
7964 vfree(fwdt->template);
7965 fwdt->template = NULL;
7966 fwdt->length = 0;
7967
7968 dcode = (uint32_t *)req->ring;
7969 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7970 risc_size = be32_to_cpu((__force __be32)dcode[2]);
7971 ql_dbg(ql_dbg_init, vha, 0x0161,
7972 "-> fwdt%u template array at %#x (%#x dwords)\n",
7973 j, faddr, risc_size);
7974 if (!risc_size || !~risc_size) {
7975 ql_dbg(ql_dbg_init, vha, 0x0162,
7976 "-> fwdt%u failed to read array\n", j);
7977 goto failed;
7978 }
7979
7980 /* skip header and ignore checksum */
7981 faddr += 7;
7982 risc_size -= 8;
7983
7984 ql_dbg(ql_dbg_init, vha, 0x0163,
7985 "-> fwdt%u template allocate template %#x words...\n",
7986 j, risc_size);
7987 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7988 if (!fwdt->template) {
7989 ql_log(ql_log_warn, vha, 0x0164,
7990 "-> fwdt%u failed allocate template.\n", j);
7991 goto failed;
7992 }
7993
7994 dcode = fwdt->template;
7995 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7996
7997 if (!qla27xx_fwdt_template_valid(dcode)) {
7998 ql_log(ql_log_warn, vha, 0x0165,
7999 "-> fwdt%u failed template validate\n", j);
8000 goto failed;
8001 }
8002
8003 dlen = qla27xx_fwdt_template_size(dcode);
8004 ql_dbg(ql_dbg_init, vha, 0x0166,
8005 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8006 j, dlen, dlen / sizeof(*dcode));
8007 if (dlen > risc_size * sizeof(*dcode)) {
8008 ql_log(ql_log_warn, vha, 0x0167,
8009 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8010 j, dlen - risc_size * sizeof(*dcode));
8011 goto failed;
8012 }
8013
8014 fwdt->length = dlen;
8015 ql_dbg(ql_dbg_init, vha, 0x0168,
8016 "-> fwdt%u loaded template ok\n", j);
8017
8018 faddr += risc_size + 1;
8019 }
8020
8021 return QLA_SUCCESS;
8022
8023 failed:
8024 if (fwdt->template)
8025 vfree(fwdt->template);
8026 fwdt->template = NULL;
8027 fwdt->length = 0;
8028
8029 return QLA_SUCCESS;
8030 }
8031
8032 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8033
8034 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8035 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8036 {
8037 int rval;
8038 int i, fragment;
8039 uint16_t *wcode;
8040 __be16 *fwcode;
8041 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8042 struct fw_blob *blob;
8043 struct qla_hw_data *ha = vha->hw;
8044 struct req_que *req = ha->req_q_map[0];
8045
8046 /* Load firmware blob. */
8047 blob = qla2x00_request_firmware(vha);
8048 if (!blob) {
8049 ql_log(ql_log_info, vha, 0x0083,
8050 "Firmware image unavailable.\n");
8051 ql_log(ql_log_info, vha, 0x0084,
8052 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8053 return QLA_FUNCTION_FAILED;
8054 }
8055
8056 rval = QLA_SUCCESS;
8057
8058 wcode = (uint16_t *)req->ring;
8059 *srisc_addr = 0;
8060 fwcode = (__force __be16 *)blob->fw->data;
8061 fwclen = 0;
8062
8063 /* Validate firmware image by checking version. */
8064 if (blob->fw->size < 8 * sizeof(uint16_t)) {
8065 ql_log(ql_log_fatal, vha, 0x0085,
8066 "Unable to verify integrity of firmware image (%zd).\n",
8067 blob->fw->size);
8068 goto fail_fw_integrity;
8069 }
8070 for (i = 0; i < 4; i++)
8071 wcode[i] = be16_to_cpu(fwcode[i + 4]);
8072 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8073 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8074 wcode[2] == 0 && wcode[3] == 0)) {
8075 ql_log(ql_log_fatal, vha, 0x0086,
8076 "Unable to verify integrity of firmware image.\n");
8077 ql_log(ql_log_fatal, vha, 0x0087,
8078 "Firmware data: %04x %04x %04x %04x.\n",
8079 wcode[0], wcode[1], wcode[2], wcode[3]);
8080 goto fail_fw_integrity;
8081 }
8082
8083 seg = blob->segs;
8084 while (*seg && rval == QLA_SUCCESS) {
8085 risc_addr = *seg;
8086 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8087 risc_size = be16_to_cpu(fwcode[3]);
8088
8089 /* Validate firmware image size. */
8090 fwclen += risc_size * sizeof(uint16_t);
8091 if (blob->fw->size < fwclen) {
8092 ql_log(ql_log_fatal, vha, 0x0088,
8093 "Unable to verify integrity of firmware image "
8094 "(%zd).\n", blob->fw->size);
8095 goto fail_fw_integrity;
8096 }
8097
8098 fragment = 0;
8099 while (risc_size > 0 && rval == QLA_SUCCESS) {
8100 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8101 if (wlen > risc_size)
8102 wlen = risc_size;
8103 ql_dbg(ql_dbg_init, vha, 0x0089,
8104 "Loading risc segment@ risc addr %x number of "
8105 "words 0x%x.\n", risc_addr, wlen);
8106
8107 for (i = 0; i < wlen; i++)
8108 wcode[i] = swab16((__force u32)fwcode[i]);
8109
8110 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8111 wlen);
8112 if (rval) {
8113 ql_log(ql_log_fatal, vha, 0x008a,
8114 "Failed to load segment %d of firmware.\n",
8115 fragment);
8116 break;
8117 }
8118
8119 fwcode += wlen;
8120 risc_addr += wlen;
8121 risc_size -= wlen;
8122 fragment++;
8123 }
8124
8125 /* Next segment. */
8126 seg++;
8127 }
8128 return rval;
8129
8130 fail_fw_integrity:
8131 return QLA_FUNCTION_FAILED;
8132 }
8133
8134 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)8135 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8136 {
8137 int rval;
8138 uint templates, segments, fragment;
8139 uint32_t *dcode;
8140 ulong dlen;
8141 uint32_t risc_addr, risc_size, risc_attr = 0;
8142 ulong i;
8143 uint j;
8144 struct fw_blob *blob;
8145 __be32 *fwcode;
8146 struct qla_hw_data *ha = vha->hw;
8147 struct req_que *req = ha->req_q_map[0];
8148 struct fwdt *fwdt = ha->fwdt;
8149
8150 ql_dbg(ql_dbg_init, vha, 0x0090,
8151 "-> FW: Loading via request-firmware.\n");
8152
8153 blob = qla2x00_request_firmware(vha);
8154 if (!blob) {
8155 ql_log(ql_log_warn, vha, 0x0092,
8156 "-> Firmware file not found.\n");
8157
8158 return QLA_FUNCTION_FAILED;
8159 }
8160
8161 fwcode = (__force __be32 *)blob->fw->data;
8162 dcode = (__force uint32_t *)fwcode;
8163 if (qla24xx_risc_firmware_invalid(dcode)) {
8164 ql_log(ql_log_fatal, vha, 0x0093,
8165 "Unable to verify integrity of firmware image (%zd).\n",
8166 blob->fw->size);
8167 ql_log(ql_log_fatal, vha, 0x0095,
8168 "Firmware data: %08x %08x %08x %08x.\n",
8169 dcode[0], dcode[1], dcode[2], dcode[3]);
8170 return QLA_FUNCTION_FAILED;
8171 }
8172
8173 dcode = (uint32_t *)req->ring;
8174 *srisc_addr = 0;
8175 segments = FA_RISC_CODE_SEGMENTS;
8176 for (j = 0; j < segments; j++) {
8177 ql_dbg(ql_dbg_init, vha, 0x0096,
8178 "-> Loading segment %u...\n", j);
8179 risc_addr = be32_to_cpu(fwcode[2]);
8180 risc_size = be32_to_cpu(fwcode[3]);
8181
8182 if (!*srisc_addr) {
8183 *srisc_addr = risc_addr;
8184 risc_attr = be32_to_cpu(fwcode[9]);
8185 }
8186
8187 dlen = ha->fw_transfer_size >> 2;
8188 for (fragment = 0; risc_size; fragment++) {
8189 if (dlen > risc_size)
8190 dlen = risc_size;
8191
8192 ql_dbg(ql_dbg_init, vha, 0x0097,
8193 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8194 fragment, risc_addr,
8195 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8196 dlen);
8197
8198 for (i = 0; i < dlen; i++)
8199 dcode[i] = swab32((__force u32)fwcode[i]);
8200
8201 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8202 if (rval) {
8203 ql_log(ql_log_fatal, vha, 0x0098,
8204 "-> Failed load firmware fragment %u.\n",
8205 fragment);
8206 return QLA_FUNCTION_FAILED;
8207 }
8208
8209 fwcode += dlen;
8210 risc_addr += dlen;
8211 risc_size -= dlen;
8212 }
8213 }
8214
8215 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8216 return QLA_SUCCESS;
8217
8218 templates = (risc_attr & BIT_9) ? 2 : 1;
8219 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8220 for (j = 0; j < templates; j++, fwdt++) {
8221 if (fwdt->template)
8222 vfree(fwdt->template);
8223 fwdt->template = NULL;
8224 fwdt->length = 0;
8225
8226 risc_size = be32_to_cpu(fwcode[2]);
8227 ql_dbg(ql_dbg_init, vha, 0x0171,
8228 "-> fwdt%u template array at %#x (%#x dwords)\n",
8229 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8230 risc_size);
8231 if (!risc_size || !~risc_size) {
8232 ql_dbg(ql_dbg_init, vha, 0x0172,
8233 "-> fwdt%u failed to read array\n", j);
8234 goto failed;
8235 }
8236
8237 /* skip header and ignore checksum */
8238 fwcode += 7;
8239 risc_size -= 8;
8240
8241 ql_dbg(ql_dbg_init, vha, 0x0173,
8242 "-> fwdt%u template allocate template %#x words...\n",
8243 j, risc_size);
8244 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8245 if (!fwdt->template) {
8246 ql_log(ql_log_warn, vha, 0x0174,
8247 "-> fwdt%u failed allocate template.\n", j);
8248 goto failed;
8249 }
8250
8251 dcode = fwdt->template;
8252 for (i = 0; i < risc_size; i++)
8253 dcode[i] = (__force u32)fwcode[i];
8254
8255 if (!qla27xx_fwdt_template_valid(dcode)) {
8256 ql_log(ql_log_warn, vha, 0x0175,
8257 "-> fwdt%u failed template validate\n", j);
8258 goto failed;
8259 }
8260
8261 dlen = qla27xx_fwdt_template_size(dcode);
8262 ql_dbg(ql_dbg_init, vha, 0x0176,
8263 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8264 j, dlen, dlen / sizeof(*dcode));
8265 if (dlen > risc_size * sizeof(*dcode)) {
8266 ql_log(ql_log_warn, vha, 0x0177,
8267 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8268 j, dlen - risc_size * sizeof(*dcode));
8269 goto failed;
8270 }
8271
8272 fwdt->length = dlen;
8273 ql_dbg(ql_dbg_init, vha, 0x0178,
8274 "-> fwdt%u loaded template ok\n", j);
8275
8276 fwcode += risc_size + 1;
8277 }
8278
8279 return QLA_SUCCESS;
8280
8281 failed:
8282 if (fwdt->template)
8283 vfree(fwdt->template);
8284 fwdt->template = NULL;
8285 fwdt->length = 0;
8286
8287 return QLA_SUCCESS;
8288 }
8289
8290 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8291 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8292 {
8293 int rval;
8294
8295 if (ql2xfwloadbin == 1)
8296 return qla81xx_load_risc(vha, srisc_addr);
8297
8298 /*
8299 * FW Load priority:
8300 * 1) Firmware via request-firmware interface (.bin file).
8301 * 2) Firmware residing in flash.
8302 */
8303 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8304 if (rval == QLA_SUCCESS)
8305 return rval;
8306
8307 return qla24xx_load_risc_flash(vha, srisc_addr,
8308 vha->hw->flt_region_fw);
8309 }
8310
8311 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8312 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8313 {
8314 int rval;
8315 struct qla_hw_data *ha = vha->hw;
8316 struct active_regions active_regions = { };
8317
8318 if (ql2xfwloadbin == 2)
8319 goto try_blob_fw;
8320
8321 /* FW Load priority:
8322 * 1) Firmware residing in flash.
8323 * 2) Firmware via request-firmware interface (.bin file).
8324 * 3) Golden-Firmware residing in flash -- (limited operation).
8325 */
8326
8327 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8328 goto try_primary_fw;
8329
8330 qla27xx_get_active_image(vha, &active_regions);
8331
8332 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8333 goto try_primary_fw;
8334
8335 ql_dbg(ql_dbg_init, vha, 0x008b,
8336 "Loading secondary firmware image.\n");
8337 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8338 if (!rval)
8339 return rval;
8340
8341 try_primary_fw:
8342 ql_dbg(ql_dbg_init, vha, 0x008b,
8343 "Loading primary firmware image.\n");
8344 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8345 if (!rval)
8346 return rval;
8347
8348 try_blob_fw:
8349 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8350 if (!rval || !ha->flt_region_gold_fw)
8351 return rval;
8352
8353 ql_log(ql_log_info, vha, 0x0099,
8354 "Attempting to fallback to golden firmware.\n");
8355 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8356 if (rval)
8357 return rval;
8358
8359 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8360 ha->flags.running_gold_fw = 1;
8361 return rval;
8362 }
8363
8364 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8365 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8366 {
8367 int ret, retries;
8368 struct qla_hw_data *ha = vha->hw;
8369
8370 if (ha->flags.pci_channel_io_perm_failure)
8371 return;
8372 if (!IS_FWI2_CAPABLE(ha))
8373 return;
8374 if (!ha->fw_major_version)
8375 return;
8376 if (!ha->flags.fw_started)
8377 return;
8378
8379 ret = qla2x00_stop_firmware(vha);
8380 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8381 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8382 ha->isp_ops->reset_chip(vha);
8383 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8384 continue;
8385 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8386 continue;
8387 ql_log(ql_log_info, vha, 0x8015,
8388 "Attempting retry of stop-firmware command.\n");
8389 ret = qla2x00_stop_firmware(vha);
8390 }
8391
8392 QLA_FW_STOPPED(ha);
8393 ha->flags.fw_init_done = 0;
8394 }
8395
8396 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8397 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8398 {
8399 int rval = QLA_SUCCESS;
8400 int rval2;
8401 uint16_t mb[MAILBOX_REGISTER_COUNT];
8402 struct qla_hw_data *ha = vha->hw;
8403 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8404
8405 if (!vha->vp_idx)
8406 return -EINVAL;
8407
8408 rval = qla2x00_fw_ready(base_vha);
8409
8410 if (rval == QLA_SUCCESS) {
8411 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8412 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8413 }
8414
8415 vha->flags.management_server_logged_in = 0;
8416
8417 /* Login to SNS first */
8418 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8419 BIT_1);
8420 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8421 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8422 ql_dbg(ql_dbg_init, vha, 0x0120,
8423 "Failed SNS login: loop_id=%x, rval2=%d\n",
8424 NPH_SNS, rval2);
8425 else
8426 ql_dbg(ql_dbg_init, vha, 0x0103,
8427 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8428 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8429 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8430 return (QLA_FUNCTION_FAILED);
8431 }
8432
8433 atomic_set(&vha->loop_down_timer, 0);
8434 atomic_set(&vha->loop_state, LOOP_UP);
8435 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8436 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8437 rval = qla2x00_loop_resync(base_vha);
8438
8439 return rval;
8440 }
8441
8442 /* 84XX Support **************************************************************/
8443
8444 static LIST_HEAD(qla_cs84xx_list);
8445 static DEFINE_MUTEX(qla_cs84xx_mutex);
8446
8447 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)8448 qla84xx_get_chip(struct scsi_qla_host *vha)
8449 {
8450 struct qla_chip_state_84xx *cs84xx;
8451 struct qla_hw_data *ha = vha->hw;
8452
8453 mutex_lock(&qla_cs84xx_mutex);
8454
8455 /* Find any shared 84xx chip. */
8456 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8457 if (cs84xx->bus == ha->pdev->bus) {
8458 kref_get(&cs84xx->kref);
8459 goto done;
8460 }
8461 }
8462
8463 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8464 if (!cs84xx)
8465 goto done;
8466
8467 kref_init(&cs84xx->kref);
8468 spin_lock_init(&cs84xx->access_lock);
8469 mutex_init(&cs84xx->fw_update_mutex);
8470 cs84xx->bus = ha->pdev->bus;
8471
8472 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8473 done:
8474 mutex_unlock(&qla_cs84xx_mutex);
8475 return cs84xx;
8476 }
8477
8478 static void
__qla84xx_chip_release(struct kref * kref)8479 __qla84xx_chip_release(struct kref *kref)
8480 {
8481 struct qla_chip_state_84xx *cs84xx =
8482 container_of(kref, struct qla_chip_state_84xx, kref);
8483
8484 mutex_lock(&qla_cs84xx_mutex);
8485 list_del(&cs84xx->list);
8486 mutex_unlock(&qla_cs84xx_mutex);
8487 kfree(cs84xx);
8488 }
8489
8490 void
qla84xx_put_chip(struct scsi_qla_host * vha)8491 qla84xx_put_chip(struct scsi_qla_host *vha)
8492 {
8493 struct qla_hw_data *ha = vha->hw;
8494
8495 if (ha->cs84xx)
8496 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8497 }
8498
8499 static int
qla84xx_init_chip(scsi_qla_host_t * vha)8500 qla84xx_init_chip(scsi_qla_host_t *vha)
8501 {
8502 int rval;
8503 uint16_t status[2];
8504 struct qla_hw_data *ha = vha->hw;
8505
8506 mutex_lock(&ha->cs84xx->fw_update_mutex);
8507
8508 rval = qla84xx_verify_chip(vha, status);
8509
8510 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8511
8512 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8513 QLA_SUCCESS;
8514 }
8515
8516 /* 81XX Support **************************************************************/
8517
8518 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8519 qla81xx_nvram_config(scsi_qla_host_t *vha)
8520 {
8521 int rval;
8522 struct init_cb_81xx *icb;
8523 struct nvram_81xx *nv;
8524 __le32 *dptr;
8525 uint8_t *dptr1, *dptr2;
8526 uint32_t chksum;
8527 uint16_t cnt;
8528 struct qla_hw_data *ha = vha->hw;
8529 uint32_t faddr;
8530 struct active_regions active_regions = { };
8531
8532 rval = QLA_SUCCESS;
8533 icb = (struct init_cb_81xx *)ha->init_cb;
8534 nv = ha->nvram;
8535
8536 /* Determine NVRAM starting address. */
8537 ha->nvram_size = sizeof(*nv);
8538 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8539 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8540 ha->vpd_size = FA_VPD_SIZE_82XX;
8541
8542 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8543 qla28xx_get_aux_images(vha, &active_regions);
8544
8545 /* Get VPD data into cache */
8546 ha->vpd = ha->nvram + VPD_OFFSET;
8547
8548 faddr = ha->flt_region_vpd;
8549 if (IS_QLA28XX(ha)) {
8550 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8551 faddr = ha->flt_region_vpd_sec;
8552 ql_dbg(ql_dbg_init, vha, 0x0110,
8553 "Loading %s nvram image.\n",
8554 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8555 "primary" : "secondary");
8556 }
8557 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8558
8559 /* Get NVRAM data into cache and calculate checksum. */
8560 faddr = ha->flt_region_nvram;
8561 if (IS_QLA28XX(ha)) {
8562 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8563 faddr = ha->flt_region_nvram_sec;
8564 }
8565 ql_dbg(ql_dbg_init, vha, 0x0110,
8566 "Loading %s nvram image.\n",
8567 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8568 "primary" : "secondary");
8569 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8570
8571 dptr = (__force __le32 *)nv;
8572 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8573 chksum += le32_to_cpu(*dptr);
8574
8575 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8576 "Contents of NVRAM:\n");
8577 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8578 nv, ha->nvram_size);
8579
8580 /* Bad NVRAM data, set defaults parameters. */
8581 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8582 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8583 /* Reset NVRAM data. */
8584 ql_log(ql_log_info, vha, 0x0073,
8585 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8586 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8587 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8588 ql_log(ql_log_info, vha, 0x0074,
8589 "Falling back to functioning (yet invalid -- WWPN) "
8590 "defaults.\n");
8591
8592 /*
8593 * Set default initialization control block.
8594 */
8595 memset(nv, 0, ha->nvram_size);
8596 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8597 nv->version = cpu_to_le16(ICB_VERSION);
8598 nv->frame_payload_size = cpu_to_le16(2048);
8599 nv->execution_throttle = cpu_to_le16(0xFFFF);
8600 nv->exchange_count = cpu_to_le16(0);
8601 nv->port_name[0] = 0x21;
8602 nv->port_name[1] = 0x00 + ha->port_no + 1;
8603 nv->port_name[2] = 0x00;
8604 nv->port_name[3] = 0xe0;
8605 nv->port_name[4] = 0x8b;
8606 nv->port_name[5] = 0x1c;
8607 nv->port_name[6] = 0x55;
8608 nv->port_name[7] = 0x86;
8609 nv->node_name[0] = 0x20;
8610 nv->node_name[1] = 0x00;
8611 nv->node_name[2] = 0x00;
8612 nv->node_name[3] = 0xe0;
8613 nv->node_name[4] = 0x8b;
8614 nv->node_name[5] = 0x1c;
8615 nv->node_name[6] = 0x55;
8616 nv->node_name[7] = 0x86;
8617 nv->login_retry_count = cpu_to_le16(8);
8618 nv->interrupt_delay_timer = cpu_to_le16(0);
8619 nv->login_timeout = cpu_to_le16(0);
8620 nv->firmware_options_1 =
8621 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8622 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8623 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8624 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8625 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8626 nv->efi_parameters = cpu_to_le32(0);
8627 nv->reset_delay = 5;
8628 nv->max_luns_per_target = cpu_to_le16(128);
8629 nv->port_down_retry_count = cpu_to_le16(30);
8630 nv->link_down_timeout = cpu_to_le16(180);
8631 nv->enode_mac[0] = 0x00;
8632 nv->enode_mac[1] = 0xC0;
8633 nv->enode_mac[2] = 0xDD;
8634 nv->enode_mac[3] = 0x04;
8635 nv->enode_mac[4] = 0x05;
8636 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8637
8638 rval = 1;
8639 }
8640
8641 if (IS_T10_PI_CAPABLE(ha))
8642 nv->frame_payload_size &= cpu_to_le16(~7);
8643
8644 qlt_81xx_config_nvram_stage1(vha, nv);
8645
8646 /* Reset Initialization control block */
8647 memset(icb, 0, ha->init_cb_size);
8648
8649 /* Copy 1st segment. */
8650 dptr1 = (uint8_t *)icb;
8651 dptr2 = (uint8_t *)&nv->version;
8652 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8653 while (cnt--)
8654 *dptr1++ = *dptr2++;
8655
8656 icb->login_retry_count = nv->login_retry_count;
8657
8658 /* Copy 2nd segment. */
8659 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8660 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8661 cnt = (uint8_t *)&icb->reserved_5 -
8662 (uint8_t *)&icb->interrupt_delay_timer;
8663 while (cnt--)
8664 *dptr1++ = *dptr2++;
8665
8666 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8667 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8668 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8669 icb->enode_mac[0] = 0x00;
8670 icb->enode_mac[1] = 0xC0;
8671 icb->enode_mac[2] = 0xDD;
8672 icb->enode_mac[3] = 0x04;
8673 icb->enode_mac[4] = 0x05;
8674 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8675 }
8676
8677 /* Use extended-initialization control block. */
8678 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8679 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8680 /*
8681 * Setup driver NVRAM options.
8682 */
8683 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8684 "QLE8XXX");
8685
8686 qlt_81xx_config_nvram_stage2(vha, icb);
8687
8688 /* Use alternate WWN? */
8689 if (nv->host_p & cpu_to_le32(BIT_15)) {
8690 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8691 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8692 }
8693
8694 /* Prepare nodename */
8695 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8696 /*
8697 * Firmware will apply the following mask if the nodename was
8698 * not provided.
8699 */
8700 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8701 icb->node_name[0] &= 0xF0;
8702 }
8703
8704 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
8705 if ((nv->enhanced_features & BIT_7) == 0)
8706 ha->flags.scm_supported_a = 1;
8707 }
8708
8709 /* Set host adapter parameters. */
8710 ha->flags.disable_risc_code_load = 0;
8711 ha->flags.enable_lip_reset = 0;
8712 ha->flags.enable_lip_full_login =
8713 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8714 ha->flags.enable_target_reset =
8715 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8716 ha->flags.enable_led_scheme = 0;
8717 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8718
8719 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8720 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8721
8722 /* save HBA serial number */
8723 ha->serial0 = icb->port_name[5];
8724 ha->serial1 = icb->port_name[6];
8725 ha->serial2 = icb->port_name[7];
8726 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8727 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8728
8729 icb->execution_throttle = cpu_to_le16(0xFFFF);
8730
8731 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8732
8733 /* Set minimum login_timeout to 4 seconds. */
8734 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8735 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8736 if (le16_to_cpu(nv->login_timeout) < 4)
8737 nv->login_timeout = cpu_to_le16(4);
8738 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8739
8740 /* Set minimum RATOV to 100 tenths of a second. */
8741 ha->r_a_tov = 100;
8742
8743 ha->loop_reset_delay = nv->reset_delay;
8744
8745 /* Link Down Timeout = 0:
8746 *
8747 * When Port Down timer expires we will start returning
8748 * I/O's to OS with "DID_NO_CONNECT".
8749 *
8750 * Link Down Timeout != 0:
8751 *
8752 * The driver waits for the link to come up after link down
8753 * before returning I/Os to OS with "DID_NO_CONNECT".
8754 */
8755 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8756 ha->loop_down_abort_time =
8757 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8758 } else {
8759 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8760 ha->loop_down_abort_time =
8761 (LOOP_DOWN_TIME - ha->link_down_timeout);
8762 }
8763
8764 /* Need enough time to try and get the port back. */
8765 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8766 if (qlport_down_retry)
8767 ha->port_down_retry_count = qlport_down_retry;
8768
8769 /* Set login_retry_count */
8770 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8771 if (ha->port_down_retry_count ==
8772 le16_to_cpu(nv->port_down_retry_count) &&
8773 ha->port_down_retry_count > 3)
8774 ha->login_retry_count = ha->port_down_retry_count;
8775 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8776 ha->login_retry_count = ha->port_down_retry_count;
8777 if (ql2xloginretrycount)
8778 ha->login_retry_count = ql2xloginretrycount;
8779
8780 /* if not running MSI-X we need handshaking on interrupts */
8781 if (!vha->hw->flags.msix_enabled &&
8782 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8783 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8784
8785 /* Enable ZIO. */
8786 if (!vha->flags.init_done) {
8787 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8788 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8789 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8790 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8791 }
8792 icb->firmware_options_2 &= cpu_to_le32(
8793 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8794 vha->flags.process_response_queue = 0;
8795 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8796 ha->zio_mode = QLA_ZIO_MODE_6;
8797
8798 ql_log(ql_log_info, vha, 0x0075,
8799 "ZIO mode %d enabled; timer delay (%d us).\n",
8800 ha->zio_mode,
8801 ha->zio_timer * 100);
8802
8803 icb->firmware_options_2 |= cpu_to_le32(
8804 (uint32_t)ha->zio_mode);
8805 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8806 vha->flags.process_response_queue = 1;
8807 }
8808
8809 /* enable RIDA Format2 */
8810 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
8811
8812 /* N2N: driver will initiate Login instead of FW */
8813 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8814
8815 /* Determine NVMe/FCP priority for target ports */
8816 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8817
8818 if (rval) {
8819 ql_log(ql_log_warn, vha, 0x0076,
8820 "NVRAM configuration failed.\n");
8821 }
8822 return (rval);
8823 }
8824
8825 int
qla82xx_restart_isp(scsi_qla_host_t * vha)8826 qla82xx_restart_isp(scsi_qla_host_t *vha)
8827 {
8828 int status, rval;
8829 struct qla_hw_data *ha = vha->hw;
8830 struct scsi_qla_host *vp;
8831 unsigned long flags;
8832
8833 status = qla2x00_init_rings(vha);
8834 if (!status) {
8835 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8836 ha->flags.chip_reset_done = 1;
8837
8838 status = qla2x00_fw_ready(vha);
8839 if (!status) {
8840 /* Issue a marker after FW becomes ready. */
8841 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8842 vha->flags.online = 1;
8843 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8844 }
8845
8846 /* if no cable then assume it's good */
8847 if ((vha->device_flags & DFLG_NO_CABLE))
8848 status = 0;
8849 }
8850
8851 if (!status) {
8852 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8853
8854 if (!atomic_read(&vha->loop_down_timer)) {
8855 /*
8856 * Issue marker command only when we are going
8857 * to start the I/O .
8858 */
8859 vha->marker_needed = 1;
8860 }
8861
8862 ha->isp_ops->enable_intrs(ha);
8863
8864 ha->isp_abort_cnt = 0;
8865 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8866
8867 /* Update the firmware version */
8868 status = qla82xx_check_md_needed(vha);
8869
8870 if (ha->fce) {
8871 ha->flags.fce_enabled = 1;
8872 memset(ha->fce, 0,
8873 fce_calc_size(ha->fce_bufs));
8874 rval = qla2x00_enable_fce_trace(vha,
8875 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8876 &ha->fce_bufs);
8877 if (rval) {
8878 ql_log(ql_log_warn, vha, 0x8001,
8879 "Unable to reinitialize FCE (%d).\n",
8880 rval);
8881 ha->flags.fce_enabled = 0;
8882 }
8883 }
8884
8885 if (ha->eft) {
8886 memset(ha->eft, 0, EFT_SIZE);
8887 rval = qla2x00_enable_eft_trace(vha,
8888 ha->eft_dma, EFT_NUM_BUFFERS);
8889 if (rval) {
8890 ql_log(ql_log_warn, vha, 0x8010,
8891 "Unable to reinitialize EFT (%d).\n",
8892 rval);
8893 }
8894 }
8895 }
8896
8897 if (!status) {
8898 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8899 "qla82xx_restart_isp succeeded.\n");
8900
8901 spin_lock_irqsave(&ha->vport_slock, flags);
8902 list_for_each_entry(vp, &ha->vp_list, list) {
8903 if (vp->vp_idx) {
8904 atomic_inc(&vp->vref_count);
8905 spin_unlock_irqrestore(&ha->vport_slock, flags);
8906
8907 qla2x00_vp_abort_isp(vp);
8908
8909 spin_lock_irqsave(&ha->vport_slock, flags);
8910 atomic_dec(&vp->vref_count);
8911 }
8912 }
8913 spin_unlock_irqrestore(&ha->vport_slock, flags);
8914
8915 } else {
8916 ql_log(ql_log_warn, vha, 0x8016,
8917 "qla82xx_restart_isp **** FAILED ****.\n");
8918 }
8919
8920 return status;
8921 }
8922
8923 /*
8924 * qla24xx_get_fcp_prio
8925 * Gets the fcp cmd priority value for the logged in port.
8926 * Looks for a match of the port descriptors within
8927 * each of the fcp prio config entries. If a match is found,
8928 * the tag (priority) value is returned.
8929 *
8930 * Input:
8931 * vha = scsi host structure pointer.
8932 * fcport = port structure pointer.
8933 *
8934 * Return:
8935 * non-zero (if found)
8936 * -1 (if not found)
8937 *
8938 * Context:
8939 * Kernel context
8940 */
8941 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8942 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8943 {
8944 int i, entries;
8945 uint8_t pid_match, wwn_match;
8946 int priority;
8947 uint32_t pid1, pid2;
8948 uint64_t wwn1, wwn2;
8949 struct qla_fcp_prio_entry *pri_entry;
8950 struct qla_hw_data *ha = vha->hw;
8951
8952 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8953 return -1;
8954
8955 priority = -1;
8956 entries = ha->fcp_prio_cfg->num_entries;
8957 pri_entry = &ha->fcp_prio_cfg->entry[0];
8958
8959 for (i = 0; i < entries; i++) {
8960 pid_match = wwn_match = 0;
8961
8962 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8963 pri_entry++;
8964 continue;
8965 }
8966
8967 /* check source pid for a match */
8968 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8969 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8970 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8971 if (pid1 == INVALID_PORT_ID)
8972 pid_match++;
8973 else if (pid1 == pid2)
8974 pid_match++;
8975 }
8976
8977 /* check destination pid for a match */
8978 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8979 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8980 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8981 if (pid1 == INVALID_PORT_ID)
8982 pid_match++;
8983 else if (pid1 == pid2)
8984 pid_match++;
8985 }
8986
8987 /* check source WWN for a match */
8988 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8989 wwn1 = wwn_to_u64(vha->port_name);
8990 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8991 if (wwn2 == (uint64_t)-1)
8992 wwn_match++;
8993 else if (wwn1 == wwn2)
8994 wwn_match++;
8995 }
8996
8997 /* check destination WWN for a match */
8998 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8999 wwn1 = wwn_to_u64(fcport->port_name);
9000 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
9001 if (wwn2 == (uint64_t)-1)
9002 wwn_match++;
9003 else if (wwn1 == wwn2)
9004 wwn_match++;
9005 }
9006
9007 if (pid_match == 2 || wwn_match == 2) {
9008 /* Found a matching entry */
9009 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9010 priority = pri_entry->tag;
9011 break;
9012 }
9013
9014 pri_entry++;
9015 }
9016
9017 return priority;
9018 }
9019
9020 /*
9021 * qla24xx_update_fcport_fcp_prio
9022 * Activates fcp priority for the logged in fc port
9023 *
9024 * Input:
9025 * vha = scsi host structure pointer.
9026 * fcp = port structure pointer.
9027 *
9028 * Return:
9029 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9030 *
9031 * Context:
9032 * Kernel context.
9033 */
9034 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9035 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9036 {
9037 int ret;
9038 int priority;
9039 uint16_t mb[5];
9040
9041 if (fcport->port_type != FCT_TARGET ||
9042 fcport->loop_id == FC_NO_LOOP_ID)
9043 return QLA_FUNCTION_FAILED;
9044
9045 priority = qla24xx_get_fcp_prio(vha, fcport);
9046 if (priority < 0)
9047 return QLA_FUNCTION_FAILED;
9048
9049 if (IS_P3P_TYPE(vha->hw)) {
9050 fcport->fcp_prio = priority & 0xf;
9051 return QLA_SUCCESS;
9052 }
9053
9054 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9055 if (ret == QLA_SUCCESS) {
9056 if (fcport->fcp_prio != priority)
9057 ql_dbg(ql_dbg_user, vha, 0x709e,
9058 "Updated FCP_CMND priority - value=%d loop_id=%d "
9059 "port_id=%02x%02x%02x.\n", priority,
9060 fcport->loop_id, fcport->d_id.b.domain,
9061 fcport->d_id.b.area, fcport->d_id.b.al_pa);
9062 fcport->fcp_prio = priority & 0xf;
9063 } else
9064 ql_dbg(ql_dbg_user, vha, 0x704f,
9065 "Unable to update FCP_CMND priority - ret=0x%x for "
9066 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9067 fcport->d_id.b.domain, fcport->d_id.b.area,
9068 fcport->d_id.b.al_pa);
9069 return ret;
9070 }
9071
9072 /*
9073 * qla24xx_update_all_fcp_prio
9074 * Activates fcp priority for all the logged in ports
9075 *
9076 * Input:
9077 * ha = adapter block pointer.
9078 *
9079 * Return:
9080 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9081 *
9082 * Context:
9083 * Kernel context.
9084 */
9085 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)9086 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9087 {
9088 int ret;
9089 fc_port_t *fcport;
9090
9091 ret = QLA_FUNCTION_FAILED;
9092 /* We need to set priority for all logged in ports */
9093 list_for_each_entry(fcport, &vha->vp_fcports, list)
9094 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9095
9096 return ret;
9097 }
9098
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)9099 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9100 int vp_idx, bool startqp)
9101 {
9102 int rsp_id = 0;
9103 int req_id = 0;
9104 int i;
9105 struct qla_hw_data *ha = vha->hw;
9106 uint16_t qpair_id = 0;
9107 struct qla_qpair *qpair = NULL;
9108 struct qla_msix_entry *msix;
9109
9110 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9111 ql_log(ql_log_warn, vha, 0x00181,
9112 "FW/Driver is not multi-queue capable.\n");
9113 return NULL;
9114 }
9115
9116 if (ql2xmqsupport || ql2xnvmeenable) {
9117 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9118 if (qpair == NULL) {
9119 ql_log(ql_log_warn, vha, 0x0182,
9120 "Failed to allocate memory for queue pair.\n");
9121 return NULL;
9122 }
9123
9124 qpair->hw = vha->hw;
9125 qpair->vha = vha;
9126 qpair->qp_lock_ptr = &qpair->qp_lock;
9127 spin_lock_init(&qpair->qp_lock);
9128 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9129
9130 /* Assign available que pair id */
9131 mutex_lock(&ha->mq_lock);
9132 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9133 if (ha->num_qpairs >= ha->max_qpairs) {
9134 mutex_unlock(&ha->mq_lock);
9135 ql_log(ql_log_warn, vha, 0x0183,
9136 "No resources to create additional q pair.\n");
9137 goto fail_qid_map;
9138 }
9139 ha->num_qpairs++;
9140 set_bit(qpair_id, ha->qpair_qid_map);
9141 ha->queue_pair_map[qpair_id] = qpair;
9142 qpair->id = qpair_id;
9143 qpair->vp_idx = vp_idx;
9144 qpair->fw_started = ha->flags.fw_started;
9145 INIT_LIST_HEAD(&qpair->hints_list);
9146 qpair->chip_reset = ha->base_qpair->chip_reset;
9147 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9148 qpair->enable_explicit_conf =
9149 ha->base_qpair->enable_explicit_conf;
9150
9151 for (i = 0; i < ha->msix_count; i++) {
9152 msix = &ha->msix_entries[i];
9153 if (msix->in_use)
9154 continue;
9155 qpair->msix = msix;
9156 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9157 "Vector %x selected for qpair\n", msix->vector);
9158 break;
9159 }
9160 if (!qpair->msix) {
9161 ql_log(ql_log_warn, vha, 0x0184,
9162 "Out of MSI-X vectors!.\n");
9163 goto fail_msix;
9164 }
9165
9166 qpair->msix->in_use = 1;
9167 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9168 qpair->pdev = ha->pdev;
9169 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9170 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9171
9172 mutex_unlock(&ha->mq_lock);
9173
9174 /* Create response queue first */
9175 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9176 if (!rsp_id) {
9177 ql_log(ql_log_warn, vha, 0x0185,
9178 "Failed to create response queue.\n");
9179 goto fail_rsp;
9180 }
9181
9182 qpair->rsp = ha->rsp_q_map[rsp_id];
9183
9184 /* Create request queue */
9185 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9186 startqp);
9187 if (!req_id) {
9188 ql_log(ql_log_warn, vha, 0x0186,
9189 "Failed to create request queue.\n");
9190 goto fail_req;
9191 }
9192
9193 qpair->req = ha->req_q_map[req_id];
9194 qpair->rsp->req = qpair->req;
9195 qpair->rsp->qpair = qpair;
9196 /* init qpair to this cpu. Will adjust at run time. */
9197 qla_cpu_update(qpair, raw_smp_processor_id());
9198
9199 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9200 if (ha->fw_attributes & BIT_4)
9201 qpair->difdix_supported = 1;
9202 }
9203
9204 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9205 if (!qpair->srb_mempool) {
9206 ql_log(ql_log_warn, vha, 0xd036,
9207 "Failed to create srb mempool for qpair %d\n",
9208 qpair->id);
9209 goto fail_mempool;
9210 }
9211
9212 /* Mark as online */
9213 qpair->online = 1;
9214
9215 if (!vha->flags.qpairs_available)
9216 vha->flags.qpairs_available = 1;
9217
9218 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9219 "Request/Response queue pair created, id %d\n",
9220 qpair->id);
9221 ql_dbg(ql_dbg_init, vha, 0x0187,
9222 "Request/Response queue pair created, id %d\n",
9223 qpair->id);
9224 }
9225 return qpair;
9226
9227 fail_mempool:
9228 fail_req:
9229 qla25xx_delete_rsp_que(vha, qpair->rsp);
9230 fail_rsp:
9231 mutex_lock(&ha->mq_lock);
9232 qpair->msix->in_use = 0;
9233 list_del(&qpair->qp_list_elem);
9234 if (list_empty(&vha->qp_list))
9235 vha->flags.qpairs_available = 0;
9236 fail_msix:
9237 ha->queue_pair_map[qpair_id] = NULL;
9238 clear_bit(qpair_id, ha->qpair_qid_map);
9239 ha->num_qpairs--;
9240 mutex_unlock(&ha->mq_lock);
9241 fail_qid_map:
9242 kfree(qpair);
9243 return NULL;
9244 }
9245
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9246 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9247 {
9248 int ret = QLA_FUNCTION_FAILED;
9249 struct qla_hw_data *ha = qpair->hw;
9250
9251 qpair->delete_in_progress = 1;
9252
9253 ret = qla25xx_delete_req_que(vha, qpair->req);
9254 if (ret != QLA_SUCCESS)
9255 goto fail;
9256
9257 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9258 if (ret != QLA_SUCCESS)
9259 goto fail;
9260
9261 mutex_lock(&ha->mq_lock);
9262 ha->queue_pair_map[qpair->id] = NULL;
9263 clear_bit(qpair->id, ha->qpair_qid_map);
9264 ha->num_qpairs--;
9265 list_del(&qpair->qp_list_elem);
9266 if (list_empty(&vha->qp_list)) {
9267 vha->flags.qpairs_available = 0;
9268 vha->flags.qpairs_req_created = 0;
9269 vha->flags.qpairs_rsp_created = 0;
9270 }
9271 mempool_destroy(qpair->srb_mempool);
9272 kfree(qpair);
9273 mutex_unlock(&ha->mq_lock);
9274
9275 return QLA_SUCCESS;
9276 fail:
9277 return ret;
9278 }
9279