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/kernel/linux/linux-5.10/fs/cifs/
Dcifs_uniupr.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * uniupr.h - Unicode compressed case ranges
13 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
14 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
15 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
16 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
17 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
18 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
19 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, /* 060-06f */
20 -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32, 0, 0, 0, 0, 0, /* 070-07f */
[all …]
/kernel/linux/linux-5.10/fs/jfs/
Djfs_uniupr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2002
13 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
14 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
15 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
16 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
17 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
18 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
19 0,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32, /* 060-06f */
20 -32,-32,-32,-32,-32,-32,-32,-32,-32,-32,-32, 0, 0, 0, 0, 0, /* 070-07f */
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/
Duprobes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for x86
5 * Copyright (C) IBM Corporation, 2008-2011
21 /* Post-execution fixups. */
41 #define OPCODE1(insn) ((insn)->opcode.bytes[0])
42 #define OPCODE2(insn) ((insn)->opcode.bytes[1])
43 #define OPCODE3(insn) ((insn)->opcode.bytes[2])
44 #define MODRM_REG(insn) X86_MODRM_REG((insn)->modrm.value)
54 * Good-instruction tables for 32-bit apps. This is non-const and volatile
59 * 6c-6f - ins,outs. SEGVs if used in userspace
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
1270 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1272 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1273 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 #define STV090x_WIDTH_OUTSERRS1_HZ_FIELD 1
33 #define STV090x_WIDTH_OUTSERRS2_HZ_FIELD 1
35 #define STV090x_WIDTH_OUTSERRS3_HZ_FIELD 1
37 #define STV090x_WIDTH_OUTPARRS3_HZ_FIELD 1
43 #define STV090x_WIDTH_SPLL_LOCK_FIELD 1
45 #define STV090x_WIDTH_SSTREAM_LCK_3_FIELD 1
47 #define STV090x_WIDTH_SSTREAM_LCK_2_FIELD 1
49 #define STV090x_WIDTH_SSTREAM_LCK_1_FIELD 1
50 #define STV090x_OFFST_SDVBS1_PRF_2_FIELD 1
[all …]
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
Dfusb300_udc.h1 // SPDX-License-Identifier: GPL-2.0
7 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
21 #define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30)
22 #define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30)
23 #define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30)
24 #define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30)
25 #define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30)
54 #define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10)
55 #define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10)
56 #define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10)
[all …]
Domap_udc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * omap_udc.h -- for omap 3.2 udc, with OTG support
15 # define UDC_SETUP_SEL (1 << 6)
16 # define UDC_EP_SEL (1 << 5)
17 # define UDC_EP_DIR (1 << 4)
21 # define UDC_CLR_HALT (1 << 7)
22 # define UDC_SET_HALT (1 << 6)
23 # define UDC_CLRDATA_TOGGLE (1 << 3)
24 # define UDC_SET_FIFO_EN (1 << 2)
25 # define UDC_CLR_EP (1 << 1)
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
34 inkscape:connector-curvature="0"
[all …]
/kernel/linux/linux-5.10/drivers/clk/ingenic/
Dx1830-cgu.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/x1830-cgu.h>
59 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_enable()
60 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_enable()
69 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_disable()
70 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_disable()
78 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in x1830_usb_phy_is_enabled()
79 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in x1830_usb_phy_is_enabled()
93 0x0, 0x1, -1, 0x2, -1, -1, -1, 0x3,
[all …]
Djz4740-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/jz4740-cgu.h>
38 #define PLLCTL_STABLE (1 << 10)
39 #define PLLCTL_BYPASS (1 << 9)
40 #define PLLCTL_ENABLE (1 << 8)
43 #define LCR_SLEEP (1 << 0)
46 #define CLKGR_UDC (1 << 11)
51 0x0, 0x1, -1, 0x3,
55 1, 2, 3, 4, 6, 8, 12, 16, 24, 32,
[all …]
Djz4725b-cgu.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/jz4725b-cgu.h>
36 0x0, 0x1, -1, 0x3,
40 1, 2, 3, 4, 6, 8,
44 2, 1,
56 .parents = { JZ4725B_CLK_EXT, -1, -1, -1 },
59 .rate_multiplier = 1,
81 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 },
83 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1,
[all …]
Djz4780-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2013-2015 Imagination Technologies
10 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/jz4780-cgu.h>
111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
170 return -EINVAL; in jz4780_otg_phy_set_rate()
173 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
180 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/hns/
Dhns_roce_hw_v1.h14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
65 #define HNS_ROCE_V1_AEQE_VEC_NUM 1
66 #define HNS_ROCE_V1_ABNORMAL_VEC_NUM 1
80 #define HNS_ROCE_V1_TABLE_CHUNK_SIZE (1 << 17)
93 #define HNS_ROCE_V1_SDB_ALFUL (HNS_ROCE_V1_SDB_DEPTH - HNS_ROCE_V1_DB_RSVD)
95 #define HNS_ROCE_V1_ODB_ALFUL (HNS_ROCE_V1_ODB_DEPTH - HNS_ROCE_V1_DB_RSVD)
108 (HNS_ROCE_V1_EXT_SDB_DEPTH - HNS_ROCE_V1_DB_RSVD)
111 (HNS_ROCE_V1_EXT_ODB_DEPTH - HNS_ROCE_V1_DB_RSVD)
118 #define HNS_ROCE_BT_RSV_BUF_SIZE (1 << 17)
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/qcom/camss/
Dcamss-video.c1 // SPDX-License-Identifier: GPL-2.0
3 * camss-video.c
5 * Qualcomm MSM Camera Subsystem - V4L2 device node
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
11 #include <media/media-entity.h>
12 #include <media/v4l2-dev.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-ioctl.h>
15 #include <media/v4l2-mc.h>
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dmpc8641_hpcn_36b.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2008-2009 Freescale Semiconductor Inc.
8 /include/ "mpc8641si-pre.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
18 reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
29 compatible = "cfi-flash";
31 bank-width = <2>;
32 device-width = <2>;
33 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/alpha/kernel/
Dsys_sable.c1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
65 *------------------------------------------
67 * 1 NCR810 (builtin) 33
70 * 4 PCI slot 1 35
72 * 6 keyboard 1
76 *10 EISA irq 3 -
[all …]
/kernel/linux/linux-5.10/sound/soc/fsl/
Dfsl_esai.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * fsl_esai.h - ALSA ESAI interface for the Freescale i.MX SoC
52 /* ESAI Control Register -- REG_ESAI_ECR 0x8 */
54 #define ESAI_ECR_ETI_MASK (1 << ESAI_ECR_ETI_SHIFT)
55 #define ESAI_ECR_ETI (1 << ESAI_ECR_ETI_SHIFT)
57 #define ESAI_ECR_ETO_MASK (1 << ESAI_ECR_ETO_SHIFT)
58 #define ESAI_ECR_ETO (1 << ESAI_ECR_ETO_SHIFT)
60 #define ESAI_ECR_ERI_MASK (1 << ESAI_ECR_ERI_SHIFT)
61 #define ESAI_ECR_ERI (1 << ESAI_ECR_ERI_SHIFT)
63 #define ESAI_ECR_ERO_MASK (1 << ESAI_ECR_ERO_SHIFT)
[all …]
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dfixups-sdk7780.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/drivers/pci/fixups-sdk7780.c
8 * Copyright (C) 2004 - 2006 Paul Mundt
14 #include "pci-sh4.h"
24 { IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,
25 -1, -1, -1, -1, -1, -1 },
27 { IRQ_INTB, IRQ_INTA, -1, IRQ_INTA, -1, -1, -1, -1, -1, -1, -1, -1,
28 -1, -1, -1, -1 },
30 { IRQ_INTC, IRQ_INTB, -1, IRQ_INTB, -1, -1, -1, -1, -1, -1, -1, -1,
31 -1, -1, -1, -1 },
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 Hisilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
26 MUX_CFG_7XX("E2_7XX_KBR0", 12, 21, 0, 20, 1, 0)
27 MUX_CFG_7XX("J7_7XX_KBR1", 12, 25, 0, 24, 1, 0)
28 MUX_CFG_7XX("E1_7XX_KBR2", 12, 29, 0, 28, 1, 0)
29 MUX_CFG_7XX("F3_7XX_KBR3", 13, 1, 0, 0, 1, 0)
30 MUX_CFG_7XX("D2_7XX_KBR4", 13, 5, 0, 4, 1, 0)
31 MUX_CFG_7XX("C2_7XX_KBC0", 13, 9, 0, 8, 1, 0)
32 MUX_CFG_7XX("D3_7XX_KBC1", 13, 13, 0, 12, 1, 0)
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap1/include/mach/
Dusb.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * as does (on omap1) any nonzero value for config->otg port number
7 #define is_usb0_device(config) 1
12 #include <linux/platform_data/usb-omap1.h>
41 # define OTG_IDLE_EN (1 << 15)
42 # define HST_IDLE_EN (1 << 14)
43 # define DEV_IDLE_EN (1 << 13)
44 # define OTG_RESET_DONE (1 << 2)
45 # define OTG_SOFT_RESET (1 << 1)
47 # define OTG_EN (1 << 31)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm1 // SPDX-License-Identifier: MIT
9 * 1. Clear all 64 GRF registers assigned to the kernel with designated value;
15 mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N };
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
[all …]
Divb.asm1 // SPDX-License-Identifier: MIT
9 * 1. Clear all 64 GRF registers assigned to the kernel with designated value;
15 mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N };
20 * DW 1.0 - Block Offset to write Render Cache
21 * DW 1.1 [15:0] - Clear Word
22 * DW 1.2 - Delay iterations
23 * DW 1.3 - Enable Instrumentation (only for debug)
24 * DW 1.4 - Rsvd (intended for context ID)
25 * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount
26 * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count)
[all …]

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