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/kernel/linux/linux-5.10/arch/powerpc/boot/
Dgamecube-head.S28 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
42 li 8, 0
43 mtspr 0x210, 8 /* IBAT0U */
44 mtspr 0x212, 8 /* IBAT1U */
45 mtspr 0x214, 8 /* IBAT2U */
46 mtspr 0x216, 8 /* IBAT3U */
47 mtspr 0x218, 8 /* DBAT0U */
48 mtspr 0x21a, 8 /* DBAT1U */
49 mtspr 0x21c, 8 /* DBAT2U */
50 mtspr 0x21e, 8 /* DBAT3U */
[all …]
Dwii-head.S29 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
43 li 8, 0
44 mtspr 0x210, 8 /* IBAT0U */
45 mtspr 0x212, 8 /* IBAT1U */
46 mtspr 0x214, 8 /* IBAT2U */
47 mtspr 0x216, 8 /* IBAT3U */
48 mtspr 0x218, 8 /* DBAT0U */
49 mtspr 0x21a, 8 /* DBAT1U */
50 mtspr 0x21c, 8 /* DBAT2U */
51 mtspr 0x21e, 8 /* DBAT3U */
[all …]
/kernel/linux/linux-5.10/drivers/scsi/qedi/
Dqedi_nvm_iscsi_cfg.h37 union nvm_iscsi_ipv4_addr addr; /* 0x0 */
38 union nvm_iscsi_ipv4_addr subnet_mask; /* 0x4 */
39 union nvm_iscsi_ipv4_addr gateway; /* 0x8 */
40 union nvm_iscsi_ipv4_addr primary_dns; /* 0xC */
41 union nvm_iscsi_ipv4_addr secondary_dns; /* 0x10 */
42 union nvm_iscsi_ipv4_addr dhcp_addr; /* 0x14 */
44 union nvm_iscsi_ipv4_addr isns_server; /* 0x18 */
45 union nvm_iscsi_ipv4_addr slp_server; /* 0x1C */
46 union nvm_iscsi_ipv4_addr primay_radius_server; /* 0x20 */
47 union nvm_iscsi_ipv4_addr secondary_radius_server; /* 0x24 */
[all …]
/kernel/linux/linux-5.10/Documentation/input/
Dgameport-programming.rst16 Make sure struct gameport is initialized to 0 in all other fields. The
22 0x201 address is smaller.
24 Eg. if your driver supports addresses 0x200, 0x208, 0x210 and 0x218, then
25 0x218 would be the address of first choice.
28 space (is above 0x1000), use that one, and don't map the ISA mirror.
52 my_mmio = 0xff;
79 for (i = 0; i < 4; i++)
166 outb(0xff, io) will be used.
180 read function. It should fill axes[0..3] with four values of the joystick axes
181 and buttons[0] with four bits representing the buttons.
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/ioctl/
Dioctl-decoding.rst24 7-0 function #
28 So for example 0x82187201 is a read with arg length of 0x218,
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpci-sh7780.h13 #define PCIECR 0xFE000008
14 #define PCIECR_ENBL 0x01
17 #define SH7780_PCI_CONFIG_BASE 0xFD000000 /* Config space base addr */
18 #define SH7780_PCI_CONFIG_SIZE 0x01000000 /* Config space size */
20 #define SH7780_PCIREG_BASE 0xFE040000 /* PCI regs base address */
23 #define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
24 #define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
25 #define SH7780_PCIAIR 0x11C /* Error Address Register */
26 #define SH7780_PCICIR 0x120 /* Error Command/Data Register */
27 #define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/kernel/linux/linux-5.10/drivers/tty/
Dmoxa.h5 #define MOXA 0x400
17 #define Magic_code 0x404
22 #define C218_ConfBase 0x800
23 #define C218_status (C218_ConfBase + 0) /* BIOS running status */
25 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
28 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
29 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
30 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
31 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
32 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_reg.h17 #define RVU_PF_VFX_PFVF_MBOX0 (0x00000)
18 #define RVU_PF_VFX_PFVF_MBOX1 (0x00008)
19 #define RVU_PF_VFX_PFVF_MBOXX(a, b) (0x0 | (a) << 12 | (b) << 3)
20 #define RVU_PF_VF_BAR4_ADDR (0x10)
21 #define RVU_PF_BLOCK_ADDRX_DISC(a) (0x200 | (a) << 3)
22 #define RVU_PF_VFME_STATUSX(a) (0x800 | (a) << 3)
23 #define RVU_PF_VFTRPENDX(a) (0x820 | (a) << 3)
24 #define RVU_PF_VFTRPEND_W1SX(a) (0x840 | (a) << 3)
25 #define RVU_PF_VFPF_MBOX_INTX(a) (0x880 | (a) << 3)
26 #define RVU_PF_VFPF_MBOX_INT_W1SX(a) (0x8A0 | (a) << 3)
[all …]
/kernel/linux/linux-5.10/include/linux/bcma/
Dbcma_driver_gmac_cmn.h7 #define BCMA_GMAC_CMN_STAG0 0x000
8 #define BCMA_GMAC_CMN_STAG1 0x004
9 #define BCMA_GMAC_CMN_STAG2 0x008
10 #define BCMA_GMAC_CMN_STAG3 0x00C
11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
[all …]
/kernel/linux/linux-5.10/drivers/media/common/b2c2/
Dflexcop-reg.h11 FLEXCOP_UNK = 0,
18 FC_UNK = 0,
32 FC_USB = 0,
47 #define fc_data_Tag_ID_DVB 0x3e
48 #define fc_data_Tag_ID_ATSC 0x3f
49 #define fc_data_Tag_ID_IDSB 0x8b
51 #define fc_key_code_default 0x1
52 #define fc_key_code_even 0x2
53 #define fc_key_code_odd 0x3
64 FC_WRITE = 0,
[all …]
/kernel/linux/linux-5.10/sound/soc/fsl/
Dfsl_audmix.h15 #define FSL_AUDMIX_CTR 0x200 /* Control */
16 #define FSL_AUDMIX_STR 0x204 /* Status */
18 #define FSL_AUDMIX_ATCR0 0x208 /* Attenuation Control */
19 #define FSL_AUDMIX_ATIVAL0 0x20c /* Attenuation Initial Value */
20 #define FSL_AUDMIX_ATSTPUP0 0x210 /* Attenuation step up factor */
21 #define FSL_AUDMIX_ATSTPDN0 0x214 /* Attenuation step down factor */
22 #define FSL_AUDMIX_ATSTPTGT0 0x218 /* Attenuation step target */
23 #define FSL_AUDMIX_ATTNVAL0 0x21c /* Attenuation Value */
24 #define FSL_AUDMIX_ATSTP0 0x220 /* Attenuation step number */
26 #define FSL_AUDMIX_ATCR1 0x228 /* Attenuation Control */
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Dmachzwd.c44 #define ZF_IOBASE 0x218
45 #define INDEX 0x218
46 #define DATA_B 0x219
47 #define DATA_W 0x21A
48 #define DATA_D 0x21A
51 #define ZFL_VERSION 0x02 /* 16 */
52 #define CONTROL 0x10 /* 16 */
53 #define STATUS 0x12 /* 8 */
54 #define COUNTER_1 0x0C /* 16 */
55 #define COUNTER_2 0x0E /* 8 */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dnwl-dsi.h12 #define NWL_DSI_CFG_NUM_LANES 0x0
13 #define NWL_DSI_CFG_NONCONTINUOUS_CLK 0x4
14 #define NWL_DSI_CFG_T_PRE 0x8
15 #define NWL_DSI_CFG_T_POST 0xc
16 #define NWL_DSI_CFG_TX_GAP 0x10
17 #define NWL_DSI_CFG_AUTOINSERT_EOTP 0x14
18 #define NWL_DSI_CFG_EXTRA_CMDS_AFTER_EOTP 0x18
19 #define NWL_DSI_CFG_HTX_TO_COUNT 0x1c
20 #define NWL_DSI_CFG_LRX_H_TO_COUNT 0x20
21 #define NWL_DSI_CFG_BTA_H_TO_COUNT 0x24
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx50-pinfunc.h13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0
14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0
16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0
17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0
18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0
21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0
22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0
[all …]
Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_frontend.h12 #define SUN4I_FRONTEND_EN_REG 0x000
13 #define SUN4I_FRONTEND_EN_EN BIT(0)
15 #define SUN4I_FRONTEND_FRM_CTRL_REG 0x004
19 #define SUN4I_FRONTEND_FRM_CTRL_REG_RDY BIT(0)
21 #define SUN4I_FRONTEND_BYPASS_REG 0x008
24 #define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020
25 #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024
26 #define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
28 #define SUN4I_FRONTEND_TB_OFF0_REG 0x030
29 #define SUN4I_FRONTEND_TB_OFF1_REG 0x034
[all …]
/kernel/linux/linux-5.10/Documentation/sound/cards/
Djoystick.rst43 als4000 joystick_port 0 = disable (default), 1 = auto-detect,
44 manual: any address (e.g. 0x200)
46 azf3328 joystick 0 = disable, 1 = enable, -1 = auto (default)
47 ens1370 joystick 0 = disable (default), 1 = enable
48 ens1371 joystick_port 0 = disable (default), 1 = auto-detect,
49 manual: 0x200, 0x208, 0x210, 0x218
50 cmipci joystick_port 0 = disable (default), 1 = auto-detect,
51 manual: any address (e.g. 0x200)
55 es1968 joystick 0 = disable (default), 1 = enable
58 via82xx [#f1]_ joystick 0 = disable (default), 1 = enable
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/tw68/
Dtw68-reg.h23 #define TW68_DMAC 0x000
24 #define TW68_DMAP_SA 0x004
25 #define TW68_DMAP_EXE 0x008
26 #define TW68_DMAP_PP 0x00c
27 #define TW68_VBIC 0x010
28 #define TW68_SBUSC 0x014
29 #define TW68_SBUSSD 0x018
30 #define TW68_INTSTAT 0x01C
31 #define TW68_INTMASK 0x020
32 #define TW68_GPIOC 0x024
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxgk110b.c32 { 0x419e04, 1, 0x04, 0x00000000 },
33 { 0x419e08, 1, 0x04, 0x0000001d },
34 { 0x419e0c, 1, 0x04, 0x00000000 },
35 { 0x419e10, 1, 0x04, 0x00001c02 },
36 { 0x419e44, 1, 0x04, 0x0013eff2 },
37 { 0x419e48, 1, 0x04, 0x00000000 },
38 { 0x419e4c, 1, 0x04, 0x0000007f },
39 { 0x419e50, 2, 0x04, 0x00000000 },
40 { 0x419e58, 1, 0x04, 0x00000001 },
41 { 0x419e5c, 3, 0x04, 0x00000000 },
[all …]
Dctxgf104.c32 { 0x419a00, 1, 0x04, 0x000001f0 },
33 { 0x419a04, 1, 0x04, 0x00000001 },
34 { 0x419a08, 1, 0x04, 0x00000023 },
35 { 0x419a0c, 1, 0x04, 0x00020000 },
36 { 0x419a10, 1, 0x04, 0x00000000 },
37 { 0x419a14, 1, 0x04, 0x00000200 },
38 { 0x419a1c, 1, 0x04, 0x00000000 },
39 { 0x419a20, 1, 0x04, 0x00000800 },
40 { 0x419ac4, 1, 0x04, 0x0007f440 },
46 { 0x419cb0, 1, 0x04, 0x00020048 },
[all …]
/kernel/linux/linux-5.10/arch/arm/include/asm/hardware/
Dcache-l2x0.h13 #define L2X0_CACHE_ID 0x000
14 #define L2X0_CACHE_TYPE 0x004
15 #define L2X0_CTRL 0x100
16 #define L2X0_AUX_CTRL 0x104
17 #define L310_TAG_LATENCY_CTRL 0x108
18 #define L310_DATA_LATENCY_CTRL 0x10C
19 #define L2X0_EVENT_CNT_CTRL 0x200
20 #define L2X0_EVENT_CNT1_CFG 0x204
21 #define L2X0_EVENT_CNT0_CFG 0x208
22 #define L2X0_EVENT_CNT1_VAL 0x20C
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/nds32/n13/
Datcpmu.json4 "EventCode": "0x102",
10 "EventCode": "0x103",
16 "EventCode": "0x104",
22 "EventCode": "0x105",
28 "EventCode": "0x106",
34 "EventCode": "0x107",
40 "EventCode": "0x108",
46 "EventCode": "0x109",
52 "EventCode": "0x10a",
58 "EventCode": "0x10b",
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qmp-usb3-dp-phy.yaml81 "^usb3-phy@[0-9a-f]+$":
109 const: 0
112 const: 0
121 "^dp-phy@[0-9a-f]+$":
139 const: 0
167 reg = <0x088e9000 0x18c>,
168 <0x088e8000 0x10>,
169 <0x088ea000 0x40>;
174 ranges = <0x0 0x088e9000 0x2000>;
190 reg = <0x200 0x128>,
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mp-pinfunc.h13 #define MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x014 0x274 0x000 0x0 0x0
14 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT 0x014 0x274 0x000 0x1 0x0
15 #define MX8MP_IOMUXC_GPIO1_IO00__ISP_FL_TRIG_0 0x014 0x274 0x5D4 0x3 0x0
16 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1 0x014 0x274 0x000 0x6 0x0
17 #define MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x018 0x278 0x000 0x0 0x0
18 #define MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x018 0x278 0x000 0x1 0x0
19 #define MX8MP_IOMUXC_GPIO1_IO01__ISP_SHUTTER_TRIG_0 0x018 0x278 0x5DC 0x3 0x0
20 #define MX8MP_IOMUXC_GPIO1_IO01__CCM_EXT_CLK2 0x018 0x278 0x000 0x6 0x0
21 #define MX8MP_IOMUXC_GPIO1_IO02__GPIO1_IO02 0x01C 0x27C 0x000 0x0 0x0
22 #define MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x01C 0x27C 0x000 0x1 0x0
[all …]

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