Searched +full:0 +full:xee140000 (Results 1 – 24 of 24) sorted by relevance
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
D | renesas,sdhi.yaml | 100 pinctrl-0: 148 reg = <0xee100000 0x328>; 151 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 160 reg = <0xee120000 0x328>; 163 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 172 reg = <0xee140000 0x100>; 175 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 184 reg = <0xee160000 0x100>; 187 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | r8a73a4.dtsi | 21 #size-cells = <0>; 23 cpu0: cpu@0 { 26 reg = <0>; 33 L2_CA15: cache-controller-0 { 65 reg = <0 0xe6790000 0 0x10000>; 71 reg = <0 0xe67a0000 0 0x10000>; 86 reg = <0 0xe6700020 0 0x89e0>; 121 #size-cells = <0>; 123 reg = <0 0xe60b0000 0 0x428>; 133 reg = <0 0xe6130000 0 0x1004>; [all …]
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D | sh73a0.dtsi | 20 #size-cells = <0>; 22 cpu0: cpu@0 { 25 reg = <0>; 44 reg = <0xf0000200 0x100>; 51 reg = <0xf0000600 0x20>; 60 reg = <0xf0001000 0x1000>, 61 <0xf0000100 0x100>; 66 reg = <0xf0100000 0x1000>; 78 reg = <0xfb400000 0x400>; 87 reg = <0xfe400000 0x400>; [all …]
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D | r8a7794.dtsi | 34 * The external audio clocks are configured as 0 Hz fixed frequency 40 #clock-cells = <0>; 41 clock-frequency = <0>; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 57 #clock-cells = <0>; 59 clock-frequency = <0>; 64 #size-cells = <0>; [all …]
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D | r8a7793.dtsi | 32 * The external audio clocks are configured as 0 Hz fixed frequency 38 #clock-cells = <0>; 39 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 55 #clock-cells = <0>; 57 clock-frequency = <0>; 62 #size-cells = <0>; [all …]
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D | r8a7745.dtsi | 36 * The external audio clocks are configured as 0 Hz fixed 42 #clock-cells = <0>; 43 clock-frequency = <0>; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 59 #clock-cells = <0>; 61 clock-frequency = <0>; 66 #size-cells = <0>; [all …]
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D | r8a7742.dtsi | 19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 42 #clock-cells = <0>; 44 clock-frequency = <0>; 49 #size-cells = <0>; [all …]
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D | r8a7791.dtsi | 40 * The external audio clocks are configured as 0 Hz fixed frequency 46 #clock-cells = <0>; 47 clock-frequency = <0>; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 63 #clock-cells = <0>; 65 clock-frequency = <0>; 70 #size-cells = <0>; [all …]
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D | r8a7743.dtsi | 19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 46 clock-frequency = <0>; 51 #size-cells = <0>; [all …]
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D | r8a7744.dtsi | 19 * The external audio clocks are configured as 0 Hz fixed frequency 25 #clock-cells = <0>; 26 clock-frequency = <0>; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 44 #clock-cells = <0>; 46 clock-frequency = <0>; 51 #size-cells = <0>; [all …]
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D | r8a7790.dtsi | 41 * The external audio clocks are configured as 0 Hz fixed frequency 47 #clock-cells = <0>; 48 clock-frequency = <0>; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 64 #clock-cells = <0>; 66 clock-frequency = <0>; 71 #size-cells = <0>; [all …]
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/kernel/linux/linux-5.10/drivers/mmc/host/ |
D | renesas_sdhi_core.c | 42 #define HOST_MODE 0xe4 44 #define SDHI_VER_GEN2_SDR50 0x490c 45 #define SDHI_VER_RZ_A1 0x820b 46 /* very old datasheets said 0x490c for SDR104, too. They are wrong! */ 47 #define SDHI_VER_GEN2_SDR104 0xcb0d 48 #define SDHI_VER_GEN3_SD 0xcc10 49 #define SDHI_VER_GEN3_SDMMC 0xcd10 51 #define SDHI_GEN3_MMC0_ADDR 0xee140000 63 val = (width == 32) ? 0x0001 : 0x0000; in renesas_sdhi_sdbuf_width() 66 val = (width == 32) ? 0x0000 : 0x0001; in renesas_sdhi_sdbuf_width() [all …]
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/ |
D | r8a77995.dtsi | 21 #clock-cells = <0>; 22 clock-frequency = <0>; 27 #size-cells = <0>; 29 a53_0: cpu@0 { 31 reg = <0x0>; 48 #clock-cells = <0>; 50 clock-frequency = <0>; 65 #clock-cells = <0>; 66 clock-frequency = <0>; 79 reg = <0 0xe6020000 0 0x0c>; [all …]
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D | r8a77970.dtsi | 30 #clock-cells = <0>; 31 clock-frequency = <0>; 36 #size-cells = <0>; 38 a53_0: cpu@0 { 41 reg = <0>; 68 #clock-cells = <0>; 70 clock-frequency = <0>; 75 #clock-cells = <0>; 77 clock-frequency = <0>; 95 #clock-cells = <0>; [all …]
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D | r8a77980.dtsi | 31 #clock-cells = <0>; 32 clock-frequency = <0>; 37 #size-cells = <0>; 39 a53_0: cpu@0 { 42 reg = <0>; 89 #clock-cells = <0>; 91 clock-frequency = <0>; 96 #clock-cells = <0>; 98 clock-frequency = <0>; 104 #clock-cells = <0>; [all …]
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D | r8a77961.dtsi | 20 * The external audio clocks are configured as 0 Hz fixed frequency 26 #clock-cells = <0>; 27 clock-frequency = <0>; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 118 #size-cells = <0>; [all …]
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D | r8a774a1.dtsi | 32 * The external audio clocks are configured as 0 Hz fixed frequency 38 #clock-cells = <0>; 39 clock-frequency = <0>; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 106 #size-cells = <0>; [all …]
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D | r8a774b1.dtsi | 21 * The external audio clocks are configured as 0 Hz fixed frequency 27 #clock-cells = <0>; 28 clock-frequency = <0>; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 74 #size-cells = <0>; [all …]
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D | r8a77965.dtsi | 34 * The external audio clocks are configured as 0 Hz fixed frequency 40 #clock-cells = <0>; 41 clock-frequency = <0>; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 105 #size-cells = <0>; [all …]
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D | r8a774e1.dtsi | 21 * The external audio clocks are configured as 0 Hz fixed frequency 27 #clock-cells = <0>; 28 clock-frequency = <0>; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 95 #size-cells = <0>; [all …]
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D | r8a77960.dtsi | 31 * The external audio clocks are configured as 0 Hz fixed frequency 37 #clock-cells = <0>; 38 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 129 #size-cells = <0>; [all …]
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D | r8a77951.dtsi | 31 * The external audio clocks are configured as 0 Hz fixed frequency 37 #clock-cells = <0>; 38 clock-frequency = <0>; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 117 #size-cells = <0>; [all …]
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/kernel/linux/linux-5.10/arch/m68k/ifpsp060/ |
D | fpsp.sa | 1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000 2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000 3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000 4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000 5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc 6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f 10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930 [all …]
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
D | 0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch | 58 @@ -0,0 +1,628 @@ 94 +#define SENSOR_GET_MODEL_NAME _IOR(SENSOR_IOCTL_BASE, 0, char *) 101 +#define FXAS2100X_I2C_ADDR 0x20 102 +#define FXAS21000_CHIP_ID 0xD1 103 +#define FXAS21002_CHID_ID_1 0xD6 104 +#define FXAS21002_CHID_ID_2 0xD7 109 +#define FXAS2100X_STATUS_ZYXDR 0x08 122 + FXAS2100X_STATUS = 0x00, 148 + STANDBY = 0, 171 + { {0, -1, 0}, {1, 0, 0}, {0, 0, 1} }, [all …]
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